Commit 04d65a9d authored by Ashish Kalra's avatar Ashish Kalra Committed by Borislav Petkov (AMD)

iommu/amd: Don't rely on external callers to enable IOMMU SNP support

Currently, the expectation is that the kernel will call
amd_iommu_snp_enable() to perform various checks and set the
amd_iommu_snp_en flag that the IOMMU uses to adjust its setup routines
to account for additional requirements on hosts where SNP is enabled.

This is somewhat fragile as it relies on this call being done prior to
IOMMU setup. It is more robust to just do this automatically as part of
IOMMU initialization, so rework the code accordingly.

There is still a need to export information about whether or not the
IOMMU is configured in a manner compatible with SNP, so relocate the
existing amd_iommu_snp_en flag so it can be used to convey that
information in place of the return code that was previously provided by
calls to amd_iommu_snp_enable().

While here, also adjust the kernel messages related to IOMMU SNP
enablement for consistency/grammar/clarity.
Suggested-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: default avatarAshish Kalra <ashish.kalra@amd.com>
Co-developed-by: default avatarMichael Roth <michael.roth@amd.com>
Signed-off-by: default avatarMichael Roth <michael.roth@amd.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Acked-by: default avatarJoerg Roedel <jroedel@suse.de>
Link: https://lore.kernel.org/r/20240126041126.1927228-4-michael.roth@amd.com
parent acaa4b5c
...@@ -10,6 +10,7 @@ extern int force_iommu, no_iommu; ...@@ -10,6 +10,7 @@ extern int force_iommu, no_iommu;
extern int iommu_detected; extern int iommu_detected;
extern int iommu_merge; extern int iommu_merge;
extern int panic_on_overflow; extern int panic_on_overflow;
extern bool amd_iommu_snp_en;
#ifdef CONFIG_SWIOTLB #ifdef CONFIG_SWIOTLB
extern bool x86_swiotlb_enable; extern bool x86_swiotlb_enable;
......
...@@ -164,5 +164,4 @@ void amd_iommu_domain_set_pgtable(struct protection_domain *domain, ...@@ -164,5 +164,4 @@ void amd_iommu_domain_set_pgtable(struct protection_domain *domain,
u64 *root, int mode); u64 *root, int mode);
struct dev_table_entry *get_dev_table(struct amd_iommu *iommu); struct dev_table_entry *get_dev_table(struct amd_iommu *iommu);
extern bool amd_iommu_snp_en;
#endif #endif
...@@ -3221,6 +3221,36 @@ static bool __init detect_ivrs(void) ...@@ -3221,6 +3221,36 @@ static bool __init detect_ivrs(void)
return true; return true;
} }
static void iommu_snp_enable(void)
{
#ifdef CONFIG_KVM_AMD_SEV
if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP))
return;
/*
* The SNP support requires that IOMMU must be enabled, and is
* not configured in the passthrough mode.
*/
if (no_iommu || iommu_default_passthrough()) {
pr_err("SNP: IOMMU disabled or configured in passthrough mode, SNP cannot be supported.\n");
return;
}
amd_iommu_snp_en = check_feature(FEATURE_SNP);
if (!amd_iommu_snp_en) {
pr_err("SNP: IOMMU SNP feature not enabled, SNP cannot be supported.\n");
return;
}
pr_info("IOMMU SNP support enabled.\n");
/* Enforce IOMMU v1 pagetable when SNP is enabled. */
if (amd_iommu_pgtable != AMD_IOMMU_V1) {
pr_warn("Forcing use of AMD IOMMU v1 page table due to SNP.\n");
amd_iommu_pgtable = AMD_IOMMU_V1;
}
#endif
}
/**************************************************************************** /****************************************************************************
* *
* AMD IOMMU Initialization State Machine * AMD IOMMU Initialization State Machine
...@@ -3256,6 +3286,7 @@ static int __init state_next(void) ...@@ -3256,6 +3286,7 @@ static int __init state_next(void)
break; break;
case IOMMU_ENABLED: case IOMMU_ENABLED:
register_syscore_ops(&amd_iommu_syscore_ops); register_syscore_ops(&amd_iommu_syscore_ops);
iommu_snp_enable();
ret = amd_iommu_init_pci(); ret = amd_iommu_init_pci();
init_state = ret ? IOMMU_INIT_ERROR : IOMMU_PCI_INIT; init_state = ret ? IOMMU_INIT_ERROR : IOMMU_PCI_INIT;
break; break;
...@@ -3766,41 +3797,3 @@ int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 ...@@ -3766,41 +3797,3 @@ int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64
return iommu_pc_get_set_reg(iommu, bank, cntr, fxn, value, true); return iommu_pc_get_set_reg(iommu, bank, cntr, fxn, value, true);
} }
#ifdef CONFIG_AMD_MEM_ENCRYPT
int amd_iommu_snp_enable(void)
{
/*
* The SNP support requires that IOMMU must be enabled, and is
* not configured in the passthrough mode.
*/
if (no_iommu || iommu_default_passthrough()) {
pr_err("SNP: IOMMU is disabled or configured in passthrough mode, SNP cannot be supported");
return -EINVAL;
}
/*
* Prevent enabling SNP after IOMMU_ENABLED state because this process
* affect how IOMMU driver sets up data structures and configures
* IOMMU hardware.
*/
if (init_state > IOMMU_ENABLED) {
pr_err("SNP: Too late to enable SNP for IOMMU.\n");
return -EINVAL;
}
amd_iommu_snp_en = check_feature(FEATURE_SNP);
if (!amd_iommu_snp_en)
return -EINVAL;
pr_info("SNP enabled\n");
/* Enforce IOMMU v1 pagetable when SNP is enabled. */
if (amd_iommu_pgtable != AMD_IOMMU_V1) {
pr_warn("Force to using AMD IOMMU v1 page table due to SNP\n");
amd_iommu_pgtable = AMD_IOMMU_V1;
}
return 0;
}
#endif
...@@ -85,8 +85,4 @@ int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, ...@@ -85,8 +85,4 @@ int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn,
u64 *value); u64 *value);
struct amd_iommu *get_amd_iommu(unsigned int idx); struct amd_iommu *get_amd_iommu(unsigned int idx);
#ifdef CONFIG_AMD_MEM_ENCRYPT
int amd_iommu_snp_enable(void);
#endif
#endif /* _ASM_X86_AMD_IOMMU_H */ #endif /* _ASM_X86_AMD_IOMMU_H */
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment