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Commit 050abc45 authored by Jes Sorensen's avatar Jes Sorensen Committed by Greg Kroah-Hartman
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staging: rtl8723au: Call usb_read*() functions directly 

Signed-off-by: default avatarJes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 1c1bc5f1
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Showing with 209 additions and 235 deletions
drivers/staging/rtl8723au/core/rtw_efuse.c
View file @ 050abc45
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <rtw_efuse.h> #include <rtw_efuse.h>
#include <rtl8723a_hal.h> #include <rtl8723a_hal.h>
#include <usb_ops_linux.h>
/*------------------------Define local variable------------------------------*/ /*------------------------Define local variable------------------------------*/
...@@ -59,13 +60,13 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter, ...@@ -59,13 +60,13 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter,
/* 1.2V Power: From VDDON with Power /* 1.2V Power: From VDDON with Power
Cut(0x0000h[15]), defualt valid */ Cut(0x0000h[15]), defualt valid */
tmpV16 = rtw_read16(padapter, REG_SYS_ISO_CTRL); tmpV16 = rtl8723au_read16(padapter, REG_SYS_ISO_CTRL);
if (!(tmpV16 & PWC_EV12V)) { if (!(tmpV16 & PWC_EV12V)) {
tmpV16 |= PWC_EV12V; tmpV16 |= PWC_EV12V;
rtw_write16(padapter, REG_SYS_ISO_CTRL, tmpV16); rtw_write16(padapter, REG_SYS_ISO_CTRL, tmpV16);
} }
/* Reset: 0x0000h[28], default valid */ /* Reset: 0x0000h[28], default valid */
tmpV16 = rtw_read16(padapter, REG_SYS_FUNC_EN); tmpV16 = rtl8723au_read16(padapter, REG_SYS_FUNC_EN);
if (!(tmpV16 & FEN_ELDR)) { if (!(tmpV16 & FEN_ELDR)) {
tmpV16 |= FEN_ELDR; tmpV16 |= FEN_ELDR;
rtw_write16(padapter, REG_SYS_FUNC_EN, tmpV16); rtw_write16(padapter, REG_SYS_FUNC_EN, tmpV16);
...@@ -73,7 +74,7 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter, ...@@ -73,7 +74,7 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter,
/* Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock /* Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock
from ANA, default valid */ from ANA, default valid */
tmpV16 = rtw_read16(padapter, REG_SYS_CLKR); tmpV16 = rtl8723au_read16(padapter, REG_SYS_CLKR);
if ((!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M))) { if ((!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M))) {
tmpV16 |= (LOADER_CLK_EN | ANA8M); tmpV16 |= (LOADER_CLK_EN | ANA8M);
rtw_write16(padapter, REG_SYS_CLKR, tmpV16); rtw_write16(padapter, REG_SYS_CLKR, tmpV16);
...@@ -81,7 +82,7 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter, ...@@ -81,7 +82,7 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter,
if (bWrite == true) { if (bWrite == true) {
/* Enable LDO 2.5V before read/write action */ /* Enable LDO 2.5V before read/write action */
tempval = rtw_read8(padapter, EFUSE_TEST + 3); tempval = rtl8723au_read8(padapter, EFUSE_TEST + 3);
tempval &= 0x0F; tempval &= 0x0F;
tempval |= (VOLTAGE_V25 << 4); tempval |= (VOLTAGE_V25 << 4);
rtw_write8(padapter, EFUSE_TEST + 3, (tempval | 0x80)); rtw_write8(padapter, EFUSE_TEST + 3, (tempval | 0x80));
...@@ -91,7 +92,7 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter, ...@@ -91,7 +92,7 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter,
if (bWrite == true) { if (bWrite == true) {
/* Disable LDO 2.5V after read/write action */ /* Disable LDO 2.5V after read/write action */
tempval = rtw_read8(padapter, EFUSE_TEST + 3); tempval = rtl8723au_read8(padapter, EFUSE_TEST + 3);
rtw_write8(padapter, EFUSE_TEST + 3, (tempval & 0x7F)); rtw_write8(padapter, EFUSE_TEST + 3, (tempval & 0x7F));
} }
} }
...@@ -158,20 +159,20 @@ ReadEFuseByte23a(struct rtw_adapter *Adapter, u16 _offset, u8 *pbuf) ...@@ -158,20 +159,20 @@ ReadEFuseByte23a(struct rtw_adapter *Adapter, u16 _offset, u8 *pbuf)
/* Write Address */ /* Write Address */
rtw_write8(Adapter, EFUSE_CTRL+1, (_offset & 0xff)); rtw_write8(Adapter, EFUSE_CTRL+1, (_offset & 0xff));
readbyte = rtw_read8(Adapter, EFUSE_CTRL+2); readbyte = rtl8723au_read8(Adapter, EFUSE_CTRL+2);
rtw_write8(Adapter, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc)); rtw_write8(Adapter, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc));
/* Write bit 32 0 */ /* Write bit 32 0 */
readbyte = rtw_read8(Adapter, EFUSE_CTRL+3); readbyte = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
rtw_write8(Adapter, EFUSE_CTRL+3, (readbyte & 0x7f)); rtw_write8(Adapter, EFUSE_CTRL+3, (readbyte & 0x7f));
/* Check bit 32 read-ready */ /* Check bit 32 read-ready */
retry = 0; retry = 0;
value32 = rtw_read32(Adapter, EFUSE_CTRL); value32 = rtl8723au_read32(Adapter, EFUSE_CTRL);
/* while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10)) */ /* while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10)) */
while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10000)) while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10000))
{ {
value32 = rtw_read32(Adapter, EFUSE_CTRL); value32 = rtl8723au_read32(Adapter, EFUSE_CTRL);
retry++; retry++;
} }
...@@ -180,7 +181,7 @@ ReadEFuseByte23a(struct rtw_adapter *Adapter, u16 _offset, u8 *pbuf) ...@@ -180,7 +181,7 @@ ReadEFuseByte23a(struct rtw_adapter *Adapter, u16 _offset, u8 *pbuf)
/* Designer says that there shall be some delay after ready bit is set, or the */ /* Designer says that there shall be some delay after ready bit is set, or the */
/* result will always stay on last data we read. */ /* result will always stay on last data we read. */
udelay(50); udelay(50);
value32 = rtw_read32(Adapter, EFUSE_CTRL); value32 = rtl8723au_read32(Adapter, EFUSE_CTRL);
*pbuf = (u8)(value32 & 0xff); *pbuf = (u8)(value32 & 0xff);
} }
...@@ -302,21 +303,21 @@ EFUSE_Read1Byte23a(struct rtw_adapter *Adapter, u16 Address) ...@@ -302,21 +303,21 @@ EFUSE_Read1Byte23a(struct rtw_adapter *Adapter, u16 Address)
/* Write E-fuse Register address bit0~7 */ /* Write E-fuse Register address bit0~7 */
temp = Address & 0xFF; temp = Address & 0xFF;
rtw_write8(Adapter, EFUSE_CTRL+1, temp); rtw_write8(Adapter, EFUSE_CTRL+1, temp);
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2); Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+2);
/* Write E-fuse Register address bit8~9 */ /* Write E-fuse Register address bit8~9 */
temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC); temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
rtw_write8(Adapter, EFUSE_CTRL+2, temp); rtw_write8(Adapter, EFUSE_CTRL+2, temp);
/* Write 0x30[31]= 0 */ /* Write 0x30[31]= 0 */
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
temp = Bytetemp & 0x7F; temp = Bytetemp & 0x7F;
rtw_write8(Adapter, EFUSE_CTRL+3, temp); rtw_write8(Adapter, EFUSE_CTRL+3, temp);
/* Wait Write-ready (0x30[31]= 1) */ /* Wait Write-ready (0x30[31]= 1) */
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
while(!(Bytetemp & 0x80)) while(!(Bytetemp & 0x80))
{ {
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
k++; k++;
if (k == 1000) if (k == 1000)
{ {
...@@ -324,7 +325,7 @@ EFUSE_Read1Byte23a(struct rtw_adapter *Adapter, u16 Address) ...@@ -324,7 +325,7 @@ EFUSE_Read1Byte23a(struct rtw_adapter *Adapter, u16 Address)
break; break;
} }
} }
data = rtw_read8(Adapter, EFUSE_CTRL); data = rtl8723au_read8(Adapter, EFUSE_CTRL);
return data; return data;
} }
else else
...@@ -376,22 +377,22 @@ EFUSE_Write1Byte( ...@@ -376,22 +377,22 @@ EFUSE_Write1Byte(
/* Write E-fuse Register address bit0~7 */ /* Write E-fuse Register address bit0~7 */
temp = Address & 0xFF; temp = Address & 0xFF;
rtw_write8(Adapter, EFUSE_CTRL+1, temp); rtw_write8(Adapter, EFUSE_CTRL+1, temp);
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2); Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+2);
/* Write E-fuse Register address bit8~9 */ /* Write E-fuse Register address bit8~9 */
temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC); temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
rtw_write8(Adapter, EFUSE_CTRL+2, temp); rtw_write8(Adapter, EFUSE_CTRL+2, temp);
/* Write 0x30[31]= 1 */ /* Write 0x30[31]= 1 */
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
temp = Bytetemp | 0x80; temp = Bytetemp | 0x80;
rtw_write8(Adapter, EFUSE_CTRL+3, temp); rtw_write8(Adapter, EFUSE_CTRL+3, temp);
/* Wait Write-ready (0x30[31]= 0) */ /* Wait Write-ready (0x30[31]= 0) */
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
while(Bytetemp & 0x80) while(Bytetemp & 0x80)
{ {
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
k++; k++;
if (k == 100) if (k == 100)
{ {
...@@ -413,14 +414,14 @@ efuse_OneByteRead23a(struct rtw_adapter *pAdapter, u16 addr, u8 *data) ...@@ -413,14 +414,14 @@ efuse_OneByteRead23a(struct rtw_adapter *pAdapter, u16 addr, u8 *data)
/* address */ /* address */
rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff)); rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff));
rtw_write8(pAdapter, EFUSE_CTRL+2, ((u8)((addr>>8) &0x03)) | rtw_write8(pAdapter, EFUSE_CTRL+2, ((u8)((addr>>8) &0x03)) |
(rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC)); (rtl8723au_read8(pAdapter, EFUSE_CTRL+2)&0xFC));
rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72);/* read cmd */ rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72);/* read cmd */
while(!(0x80 &rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100)) while(!(0x80 &rtl8723au_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100))
tmpidx++; tmpidx++;
if (tmpidx < 100) { if (tmpidx < 100) {
*data = rtw_read8(pAdapter, EFUSE_CTRL); *data = rtl8723au_read8(pAdapter, EFUSE_CTRL);
bResult = _SUCCESS; bResult = _SUCCESS;
} else { } else {
*data = 0xff; *data = 0xff;
...@@ -444,12 +445,13 @@ efuse_OneByteWrite23a(struct rtw_adapter *pAdapter, u16 addr, u8 data) ...@@ -444,12 +445,13 @@ efuse_OneByteWrite23a(struct rtw_adapter *pAdapter, u16 addr, u8 data)
/* address */ /* address */
rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff)); rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff));
rtw_write8(pAdapter, EFUSE_CTRL+2, rtw_write8(pAdapter, EFUSE_CTRL+2,
(rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC)|(u8)((addr>>8)&0x03)); (rtl8723au_read8(pAdapter, EFUSE_CTRL+2)&0xFC)|(u8)((addr>>8)&0x03));
rtw_write8(pAdapter, EFUSE_CTRL, data);/* data */ rtw_write8(pAdapter, EFUSE_CTRL, data);/* data */
rtw_write8(pAdapter, EFUSE_CTRL+3, 0xF2);/* write cmd */ rtw_write8(pAdapter, EFUSE_CTRL+3, 0xF2);/* write cmd */
while((0x80 & rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100)) { while((0x80 & rtl8723au_read8(pAdapter, EFUSE_CTRL+3)) &&
(tmpidx<100)) {
tmpidx++; tmpidx++;
} }
......
drivers/staging/rtl8723au/core/rtw_io.c
View file @ 050abc45
...@@ -39,30 +39,6 @@ jackson@realtek.com.tw ...@@ -39,30 +39,6 @@ jackson@realtek.com.tw
#include <usb_ops.h> #include <usb_ops.h>
u8 _rtw_read823a(struct rtw_adapter *adapter, u32 addr)
{
u8 r_val;
struct _io_ops *io_ops = &adapter->io_ops;
r_val = io_ops->_read8(adapter, addr);
return r_val;
}
u16 _rtw_read1623a(struct rtw_adapter *adapter, u32 addr)
{
struct _io_ops *io_ops = &adapter->io_ops;
return io_ops->_read16(adapter, addr);
}
u32 _rtw_read3223a(struct rtw_adapter *adapter, u32 addr)
{
struct _io_ops *io_ops = &adapter->io_ops;
return io_ops->_read32(adapter, addr);
}
int _rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val) int _rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val)
{ {
struct _io_ops *io_ops = &adapter->io_ops; struct _io_ops *io_ops = &adapter->io_ops;
......
drivers/staging/rtl8723au/core/rtw_pwrctrl.c
View file @ 050abc45
...@@ -22,6 +22,7 @@ ...@@ -22,6 +22,7 @@
#ifdef CONFIG_8723AU_BT_COEXIST #ifdef CONFIG_8723AU_BT_COEXIST
#include <rtl8723a_hal.h> #include <rtl8723a_hal.h>
#endif #endif
#include <usb_ops_linux.h>
void ips_enter23a(struct rtw_adapter * padapter) void ips_enter23a(struct rtw_adapter * padapter)
{ {
...@@ -98,7 +99,7 @@ int ips_leave23a(struct rtw_adapter * padapter) ...@@ -98,7 +99,7 @@ int ips_leave23a(struct rtw_adapter * padapter)
} }
DBG_8723A("==> ips_leave23a.....LED(0x%08x)...\n", DBG_8723A("==> ips_leave23a.....LED(0x%08x)...\n",
rtw_read32(padapter, 0x4c)); rtl8723au_read32(padapter, 0x4c));
pwrpriv->bips_processing = false; pwrpriv->bips_processing = false;
pwrpriv->bkeepfwalive = false; pwrpriv->bkeepfwalive = false;
......
drivers/staging/rtl8723au/core/rtw_sreset.c
View file @ 050abc45
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
******************************************************************************/ ******************************************************************************/
#include <rtw_sreset.h> #include <rtw_sreset.h>
#include <usb_ops_linux.h>
void rtw_sreset_init(struct rtw_adapter *padapter) void rtw_sreset_init(struct rtw_adapter *padapter)
{ {
...@@ -47,7 +48,7 @@ u8 rtw_sreset_get_wifi_status(struct rtw_adapter *padapter) ...@@ -47,7 +48,7 @@ u8 rtw_sreset_get_wifi_status(struct rtw_adapter *padapter)
if (psrtpriv->silent_reset_inprogress) if (psrtpriv->silent_reset_inprogress)
return status; return status;
val32 = rtw_read32(padapter, REG_TXDMA_STATUS); val32 = rtl8723au_read32(padapter, REG_TXDMA_STATUS);
if (val32 == 0xeaeaeaea) { if (val32 == 0xeaeaeaea) {
psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST; psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST;
} else if (val32 != 0) { } else if (val32 != 0) {
......
drivers/staging/rtl8723au/hal/HalDMOutSrc8723A_CE.c
View file @ 050abc45
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
/* include files */ /* include files */
#include "odm_precomp.h" #include "odm_precomp.h"
#include <usb_ops_linux.h>
#define DPK_DELTA_MAPPING_NUM 13 #define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15 #define index_mapping_HP_NUM 15
...@@ -581,9 +582,9 @@ static void _PHY_SaveMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, u32 ...@@ -581,9 +582,9 @@ static void _PHY_SaveMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, u32
u32 i; u32 i;
for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++) { for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++) {
MACBackup[i] = rtw_read8(pAdapter, MACReg[i]); MACBackup[i] = rtl8723au_read8(pAdapter, MACReg[i]);
} }
MACBackup[i] = rtw_read32(pAdapter, MACReg[i]); MACBackup[i] = rtl8723au_read32(pAdapter, MACReg[i]);
} }
static void _PHY_ReloadADDARegisters(struct rtw_adapter *pAdapter, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum) static void _PHY_ReloadADDARegisters(struct rtw_adapter *pAdapter, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum)
...@@ -878,7 +879,7 @@ static void _PHY_LCCalibrate(struct rtw_adapter *pAdapter, bool is2T) ...@@ -878,7 +879,7 @@ static void _PHY_LCCalibrate(struct rtw_adapter *pAdapter, bool is2T)
u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal; u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal;
/* Check continuous TX and Packet TX */ /* Check continuous TX and Packet TX */
tmpReg = rtw_read8(pAdapter, 0xd03); tmpReg = rtl8723au_read8(pAdapter, 0xd03);
if ((tmpReg&0x70) != 0) /* Deal with contisuous TX case */ if ((tmpReg&0x70) != 0) /* Deal with contisuous TX case */
rtw_write8(pAdapter, 0xd03, tmpReg&0x8F); /* disable all continuous TX */ rtw_write8(pAdapter, 0xd03, tmpReg&0x8F); /* disable all continuous TX */
......
drivers/staging/rtl8723au/hal/HalPwrSeqCmd.c
View file @ 050abc45
...@@ -30,6 +30,7 @@ Major Change History: ...@@ -30,6 +30,7 @@ Major Change History:
--*/ --*/
#include <HalPwrSeqCmd.h> #include <HalPwrSeqCmd.h>
#include <usb_ops_linux.h>
/* */ /* */
/* Description: */ /* Description: */
...@@ -89,7 +90,7 @@ u8 HalPwrSeqCmdParsing23a(struct rtw_adapter *padapter, u8 CutVersion, ...@@ -89,7 +90,7 @@ u8 HalPwrSeqCmdParsing23a(struct rtw_adapter *padapter, u8 CutVersion,
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
/* Read the value from system register */ /* Read the value from system register */
value = rtw_read8(padapter, offset); value = rtl8723au_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd)); value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) &
...@@ -107,7 +108,8 @@ u8 HalPwrSeqCmdParsing23a(struct rtw_adapter *padapter, u8 CutVersion, ...@@ -107,7 +108,8 @@ u8 HalPwrSeqCmdParsing23a(struct rtw_adapter *padapter, u8 CutVersion,
bPollingBit = false; bPollingBit = false;
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
do { do {
value = rtw_read8(padapter, offset); value = rtl8723au_read8(padapter,
offset);
value &= GET_PWR_CFG_MASK(PwrCfgCmd); value &= GET_PWR_CFG_MASK(PwrCfgCmd);
if (value == if (value ==
......
drivers/staging/rtl8723au/hal/hal_com.c
View file @ 050abc45
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
#include <hal_intf.h> #include <hal_intf.h>
#include <hal_com.h> #include <hal_com.h>
#include <rtl8723a_hal.h> #include <rtl8723a_hal.h>
#include <usb_ops_linux.h>
#define _HAL_INIT_C_ #define _HAL_INIT_C_
...@@ -225,7 +226,7 @@ void HalSetBrateCfg23a(struct rtw_adapter *padapter, u8 *mBratesOS) ...@@ -225,7 +226,7 @@ void HalSetBrateCfg23a(struct rtw_adapter *padapter, u8 *mBratesOS)
rtw_write8(padapter, REG_RRSR, brate_cfg & 0xff); rtw_write8(padapter, REG_RRSR, brate_cfg & 0xff);
rtw_write8(padapter, REG_RRSR + 1, (brate_cfg >> 8) & 0xff); rtw_write8(padapter, REG_RRSR + 1, (brate_cfg >> 8) & 0xff);
rtw_write8(padapter, REG_RRSR + 2, rtw_write8(padapter, REG_RRSR + 2,
rtw_read8(padapter, REG_RRSR + 2) & 0xf0); rtl8723au_read8(padapter, REG_RRSR + 2) & 0xf0);
rate_index = 0; rate_index = 0;
/* Set RTS initial rate */ /* Set RTS initial rate */
...@@ -365,7 +366,7 @@ int c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf) ...@@ -365,7 +366,7 @@ int c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf)
if (buf == NULL) if (buf == NULL)
goto exit; goto exit;
trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR); trigger = rtl8723au_read8(adapter, REG_C2HEVT_CLEAR);
if (trigger == C2H_EVT_HOST_CLOSE) if (trigger == C2H_EVT_HOST_CLOSE)
goto exit; /* Not ready */ goto exit; /* Not ready */
...@@ -376,8 +377,8 @@ int c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf) ...@@ -376,8 +377,8 @@ int c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf)
memset(c2h_evt, 0, 16); memset(c2h_evt, 0, 16);
*buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL); *buf = rtl8723au_read8(adapter, REG_C2HEVT_MSG_NORMAL);
*(buf + 1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1); *(buf + 1) = rtl8723au_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read23a(): ", RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read23a(): ",
&c2h_evt, sizeof(c2h_evt)); &c2h_evt, sizeof(c2h_evt));
...@@ -390,7 +391,7 @@ int c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf) ...@@ -390,7 +391,7 @@ int c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf)
/* Read the content */ /* Read the content */
for (i = 0; i < c2h_evt->plen; i++) for (i = 0; i < c2h_evt->plen; i++)
c2h_evt->payload[i] = rtw_read8(adapter, c2h_evt->payload[i] = rtl8723au_read8(adapter,
REG_C2HEVT_MSG_NORMAL + REG_C2HEVT_MSG_NORMAL +
sizeof(*c2h_evt) + i); sizeof(*c2h_evt) + i);
...@@ -441,7 +442,7 @@ rtl8723a_set_ampdu_min_space(struct rtw_adapter *padapter, u8 MinSpacingToSet) ...@@ -441,7 +442,7 @@ rtl8723a_set_ampdu_min_space(struct rtw_adapter *padapter, u8 MinSpacingToSet)
("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
padapter->MgntInfo.MinSpaceCfg)); */ padapter->MgntInfo.MinSpaceCfg)); */
MinSpacingToSet |= MinSpacingToSet |=
rtw_read8(padapter, REG_AMPDU_MIN_SPACE) & 0xf8; rtl8723au_read8(padapter, REG_AMPDU_MIN_SPACE) & 0xf8;
rtw_write8(padapter, REG_AMPDU_MIN_SPACE, rtw_write8(padapter, REG_AMPDU_MIN_SPACE,
MinSpacingToSet); MinSpacingToSet);
} }
...@@ -513,7 +514,7 @@ void rtl8723a_set_media_status(struct rtw_adapter *padapter, u8 status) ...@@ -513,7 +514,7 @@ void rtl8723a_set_media_status(struct rtw_adapter *padapter, u8 status)
{ {
u8 val8; u8 val8;
val8 = rtw_read8(padapter, MSR) & 0x0c; val8 = rtl8723au_read8(padapter, MSR) & 0x0c;
val8 |= status; val8 |= status;
rtw_write8(padapter, MSR, val8); rtw_write8(padapter, MSR, val8);
} }
...@@ -522,7 +523,7 @@ void rtl8723a_set_media_status1(struct rtw_adapter *padapter, u8 status) ...@@ -522,7 +523,7 @@ void rtl8723a_set_media_status1(struct rtw_adapter *padapter, u8 status)
{ {
u8 val8; u8 val8;
val8 = rtw_read8(padapter, MSR) & 0x03; val8 = rtl8723au_read8(padapter, MSR) & 0x03;
val8 |= status << 2; val8 |= status << 2;
rtw_write8(padapter, MSR, val8); rtw_write8(padapter, MSR, val8);
} }
...@@ -538,7 +539,7 @@ void rtl8723a_set_bcn_func(struct rtw_adapter *padapter, u8 val) ...@@ -538,7 +539,7 @@ void rtl8723a_set_bcn_func(struct rtw_adapter *padapter, u8 val)
void rtl8723a_check_bssid(struct rtw_adapter *padapter, u8 val) void rtl8723a_check_bssid(struct rtw_adapter *padapter, u8 val)
{ {
u32 val32; u32 val32;
val32 = rtw_read32(padapter, REG_RCR); val32 = rtl8723au_read32(padapter, REG_RCR);
if (val) if (val)
val32 |= RCR_CBSSID_DATA | RCR_CBSSID_BCN; val32 |= RCR_CBSSID_DATA | RCR_CBSSID_BCN;
else else
...@@ -553,7 +554,7 @@ void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag) ...@@ -553,7 +554,7 @@ void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag)
/* config RCR to receive different BSSID & not /* config RCR to receive different BSSID & not
to receive data frame */ to receive data frame */
v32 = rtw_read32(padapter, REG_RCR); v32 = rtl8723au_read32(padapter, REG_RCR);
v32 &= ~(RCR_CBSSID_BCN); v32 &= ~(RCR_CBSSID_BCN);
rtw_write32(padapter, REG_RCR, v32); rtw_write32(padapter, REG_RCR, v32);
/* reject all data frame */ /* reject all data frame */
...@@ -579,7 +580,7 @@ void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag) ...@@ -579,7 +580,7 @@ void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag)
SetBcnCtrlReg23a(padapter, 0, DIS_TSF_UDT); SetBcnCtrlReg23a(padapter, 0, DIS_TSF_UDT);
} }
v32 = rtw_read32(padapter, REG_RCR); v32 = rtl8723au_read32(padapter, REG_RCR);
v32 |= RCR_CBSSID_BCN; v32 |= RCR_CBSSID_BCN;
rtw_write32(padapter, REG_RCR, v32); rtw_write32(padapter, REG_RCR, v32);
} }
...@@ -591,17 +592,18 @@ void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag) ...@@ -591,17 +592,18 @@ void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag)
void rtl8723a_on_rcr_am(struct rtw_adapter *padapter) void rtl8723a_on_rcr_am(struct rtw_adapter *padapter)
{ {
rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR) | RCR_AM); rtw_write32(padapter, REG_RCR,
rtl8723au_read32(padapter, REG_RCR) | RCR_AM);
DBG_8723A("%s, %d, RCR = %x \n", __FUNCTION__, __LINE__, DBG_8723A("%s, %d, RCR = %x \n", __FUNCTION__, __LINE__,
rtw_read32(padapter, REG_RCR)); rtl8723au_read32(padapter, REG_RCR));
} }
void rtl8723a_off_rcr_am(struct rtw_adapter *padapter) void rtl8723a_off_rcr_am(struct rtw_adapter *padapter)
{ {
rtw_write32(padapter, REG_RCR, rtw_write32(padapter, REG_RCR,
rtw_read32(padapter, REG_RCR) & (~RCR_AM)); rtl8723au_read32(padapter, REG_RCR) & (~RCR_AM));
DBG_8723A("%s, %d, RCR = %x \n", __FUNCTION__, __LINE__, DBG_8723A("%s, %d, RCR = %x \n", __FUNCTION__, __LINE__,
rtw_read32(padapter, REG_RCR)); rtl8723au_read32(padapter, REG_RCR));
} }
void rtl8723a_set_slot_time(struct rtw_adapter *padapter, u8 slottime) void rtl8723a_set_slot_time(struct rtw_adapter *padapter, u8 slottime)
...@@ -730,17 +732,18 @@ void rtl8723a_fifo_cleanup(struct rtw_adapter *padapter) ...@@ -730,17 +732,18 @@ void rtl8723a_fifo_cleanup(struct rtw_adapter *padapter)
rtw_write8(padapter, REG_TXPAUSE, 0xff); rtw_write8(padapter, REG_TXPAUSE, 0xff);
/* keep sn */ /* keep sn */
padapter->xmitpriv.nqos_ssn = rtw_read16(padapter, REG_NQOS_SEQ); padapter->xmitpriv.nqos_ssn = rtl8723au_read16(padapter, REG_NQOS_SEQ);
if (pwrpriv->bkeepfwalive != true) { if (pwrpriv->bkeepfwalive != true) {
u32 v32; u32 v32;
/* RX DMA stop */ /* RX DMA stop */
v32 = rtw_read32(padapter, REG_RXPKT_NUM); v32 = rtl8723au_read32(padapter, REG_RXPKT_NUM);
v32 |= RW_RELEASE_EN; v32 |= RW_RELEASE_EN;
rtw_write32(padapter, REG_RXPKT_NUM, v32); rtw_write32(padapter, REG_RXPKT_NUM, v32);
do { do {
v32 = rtw_read32(padapter, REG_RXPKT_NUM) & RXDMA_IDLE; v32 = rtl8723au_read32(padapter,
REG_RXPKT_NUM) & RXDMA_IDLE;
if (!v32) if (!v32)
break; break;
} while (trycnt--); } while (trycnt--);
...@@ -760,14 +763,14 @@ void rtl8723a_bcn_valid(struct rtw_adapter *padapter) ...@@ -760,14 +763,14 @@ void rtl8723a_bcn_valid(struct rtw_adapter *padapter)
/* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2,
write 1 to clear, Clear by sw */ write 1 to clear, Clear by sw */
rtw_write8(padapter, REG_TDECTRL + 2, rtw_write8(padapter, REG_TDECTRL + 2,
rtw_read8(padapter, REG_TDECTRL + 2) | BIT(0)); rtl8723au_read8(padapter, REG_TDECTRL + 2) | BIT(0));
} }
bool rtl8723a_get_bcn_valid(struct rtw_adapter *padapter) bool rtl8723a_get_bcn_valid(struct rtw_adapter *padapter)
{ {
bool retval; bool retval;
retval = (rtw_read8(padapter, REG_TDECTRL + 2) & BIT(0)) ? true : false; retval = (rtl8723au_read8(padapter, REG_TDECTRL + 2) & BIT(0)) ? true : false;
return retval; return retval;
} }
...@@ -910,7 +913,7 @@ bool rtl8723a_get_fwlps_rf_on(struct rtw_adapter *padapter) ...@@ -910,7 +913,7 @@ bool rtl8723a_get_fwlps_rf_on(struct rtw_adapter *padapter)
not check Fw LPS Leave, because Fw is unload. */ not check Fw LPS Leave, because Fw is unload. */
retval = true; retval = true;
} else { } else {
valRCR = rtw_read32(padapter, REG_RCR); valRCR = rtl8723au_read32(padapter, REG_RCR);
if (valRCR & 0x00070000) if (valRCR & 0x00070000)
retval = false; retval = false;
else else
...@@ -924,7 +927,7 @@ bool rtl8723a_chk_hi_queue_empty(struct rtw_adapter *padapter) ...@@ -924,7 +927,7 @@ bool rtl8723a_chk_hi_queue_empty(struct rtw_adapter *padapter)
{ {
u32 hgq; u32 hgq;
hgq = rtw_read32(padapter, REG_HGQ_INFORMATION); hgq = rtl8723au_read32(padapter, REG_HGQ_INFORMATION);
return ((hgq & 0x0000ff00) == 0) ? true : false; return ((hgq & 0x0000ff00) == 0) ? true : false;
} }
drivers/staging/rtl8723au/hal/odm.c
View file @ 050abc45
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
******************************************************************************/ ******************************************************************************/
#include "odm_precomp.h" #include "odm_precomp.h"
#include "usb_ops_linux.h"
static const u16 dB_Invert_Table[8][12] = { static const u16 dB_Invert_Table[8][12] = {
{1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4}, {1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4},
...@@ -1444,7 +1445,8 @@ void odm_DynamicTxPower23aSavePowerIndex(struct dm_odm_t *pDM_Odm) ...@@ -1444,7 +1445,8 @@ void odm_DynamicTxPower23aSavePowerIndex(struct dm_odm_t *pDM_Odm)
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv; struct dm_priv *pdmpriv = &pHalData->dmpriv;
for (index = 0; index < 6; index++) for (index = 0; index < 6; index++)
pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]); pdmpriv->PowerIndex_backup[index] =
rtl8723au_read8(Adapter, Power_Index_REG[index]);
} }
void odm_DynamicTxPower23aRestorePowerIndex(struct dm_odm_t *pDM_Odm) void odm_DynamicTxPower23aRestorePowerIndex(struct dm_odm_t *pDM_Odm)
......
drivers/staging/rtl8723au/hal/odm_interface.c
View file @ 050abc45
...@@ -21,6 +21,7 @@ ...@@ -21,6 +21,7 @@
/* */ /* */
/* ODM IO Relative API. */ /* ODM IO Relative API. */
/* */ /* */
#include <usb_ops_linux.h>
u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm, u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm,
u32 RegAddr u32 RegAddr
...@@ -28,25 +29,21 @@ u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm, ...@@ -28,25 +29,21 @@ u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm,
{ {
struct rtw_adapter *Adapter = pDM_Odm->Adapter; struct rtw_adapter *Adapter = pDM_Odm->Adapter;
return rtw_read8(Adapter, RegAddr); return rtl8723au_read8(Adapter, RegAddr);
} }
u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm, u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr)
u32 RegAddr
)
{ {
struct rtw_adapter *Adapter = pDM_Odm->Adapter; struct rtw_adapter *Adapter = pDM_Odm->Adapter;
return rtw_read16(Adapter, RegAddr); return rtl8723au_read16(Adapter, RegAddr);
} }
u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm, u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr)
u32 RegAddr
)
{ {
struct rtw_adapter *Adapter = pDM_Odm->Adapter; struct rtw_adapter *Adapter = pDM_Odm->Adapter;
return rtw_read32(Adapter, RegAddr); return rtl8723au_read32(Adapter, RegAddr);
} }
void ODM_Write1Byte( void ODM_Write1Byte(
......
drivers/staging/rtl8723au/hal/rtl8723a_bt-coexist.c
View file @ 050abc45
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <drv_types.h> #include <drv_types.h>
#include <rtl8723a_hal.h> #include <rtl8723a_hal.h>
#include <rtw_ioctl_set.h> #include <rtw_ioctl_set.h>
#include <usb_ops_linux.h>
#define DIS_PS_RX_BCN #define DIS_PS_RX_BCN
...@@ -5271,7 +5272,7 @@ static void btdm_1AntTSFSwitch(struct rtw_adapter *padapter, u8 enable) ...@@ -5271,7 +5272,7 @@ static void btdm_1AntTSFSwitch(struct rtw_adapter *padapter, u8 enable)
{ {
u8 oldVal, newVal; u8 oldVal, newVal;
oldVal = rtw_read8(padapter, 0x550); oldVal = rtl8723au_read8(padapter, 0x550);
if (enable) if (enable)
newVal = oldVal | EN_BCN_FUNCTION; newVal = oldVal | EN_BCN_FUNCTION;
...@@ -9031,11 +9032,11 @@ static void btdm_BtHwCountersMonitor(struct rtw_adapter *padapter) ...@@ -9031,11 +9032,11 @@ static void btdm_BtHwCountersMonitor(struct rtw_adapter *padapter)
regHPTxRx = REG_HIGH_PRIORITY_TXRX; regHPTxRx = REG_HIGH_PRIORITY_TXRX;
regLPTxRx = REG_LOW_PRIORITY_TXRX; regLPTxRx = REG_LOW_PRIORITY_TXRX;
u4Tmp = rtw_read32(padapter, regHPTxRx); u4Tmp = rtl8723au_read32(padapter, regHPTxRx);
regHPTx = u4Tmp & bMaskLWord; regHPTx = u4Tmp & bMaskLWord;
regHPRx = (u4Tmp & bMaskHWord)>>16; regHPRx = (u4Tmp & bMaskHWord)>>16;
u4Tmp = rtw_read32(padapter, regLPTxRx); u4Tmp = rtl8723au_read32(padapter, regLPTxRx);
regLPTx = u4Tmp & bMaskLWord; regLPTx = u4Tmp & bMaskLWord;
regLPRx = (u4Tmp & bMaskHWord)>>16; regLPRx = (u4Tmp & bMaskHWord)>>16;
...@@ -9061,7 +9062,7 @@ static void btdm_BtEnableDisableCheck8723A(struct rtw_adapter *padapter) ...@@ -9061,7 +9062,7 @@ static void btdm_BtEnableDisableCheck8723A(struct rtw_adapter *padapter)
u8 val8; u8 val8;
/* ox68[28]= 1 => BT enable; otherwise disable */ /* ox68[28]= 1 => BT enable; otherwise disable */
val8 = rtw_read8(padapter, 0x6B); val8 = rtl8723au_read8(padapter, 0x6B);
if (!(val8 & BIT(4))) if (!(val8 & BIT(4)))
btAlife = false; btAlife = false;
...@@ -9345,7 +9346,7 @@ BTDM_SetSwPenaltyTxRateAdaptive( ...@@ -9345,7 +9346,7 @@ BTDM_SetSwPenaltyTxRateAdaptive(
struct hal_data_8723a *pHalData = GET_HAL_DATA(padapter); struct hal_data_8723a *pHalData = GET_HAL_DATA(padapter);
u8 tmpU1; u8 tmpU1;
tmpU1 = rtw_read8(padapter, 0x4fd); tmpU1 = rtl8723au_read8(padapter, 0x4fd);
tmpU1 |= BIT(0); tmpU1 |= BIT(0);
if (BT_TX_RATE_ADAPTIVE_LOW_PENALTY == raType) { if (BT_TX_RATE_ADAPTIVE_LOW_PENALTY == raType) {
tmpU1 &= ~BIT(2); tmpU1 &= ~BIT(2);
...@@ -9585,9 +9586,9 @@ static void BTDM_Display8723ABtCoexInfo(struct rtw_adapter *padapter) ...@@ -9585,9 +9586,9 @@ static void BTDM_Display8723ABtCoexInfo(struct rtw_adapter *padapter)
pBtCoex->btdm2Ant.bCurDecBtPwr); pBtCoex->btdm2Ant.bCurDecBtPwr);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
} }
u1Tmp = rtw_read8(padapter, 0x778); u1Tmp = rtl8723au_read8(padapter, 0x778);
u1Tmp1 = rtw_read8(padapter, 0x783); u1Tmp1 = rtl8723au_read8(padapter, 0x783);
u1Tmp2 = rtw_read8(padapter, 0x796); u1Tmp2 = rtl8723au_read8(padapter, 0x796);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/ 0x783/ 0x796", \ rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/ 0x783/ 0x796", \
u1Tmp, u1Tmp1, u1Tmp2); u1Tmp, u1Tmp1, u1Tmp2);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
...@@ -9597,7 +9598,7 @@ static void BTDM_Display8723ABtCoexInfo(struct rtw_adapter *padapter) ...@@ -9597,7 +9598,7 @@ static void BTDM_Display8723ABtCoexInfo(struct rtw_adapter *padapter)
pBtCoex->btdm2Ant.bCurDacSwingOn, pBtCoex->btdm2Ant.curDacSwingLvl); pBtCoex->btdm2Ant.bCurDacSwingOn, pBtCoex->btdm2Ant.curDacSwingLvl);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
} }
u4Tmp[0] = rtw_read32(padapter, 0x880); u4Tmp[0] = rtl8723au_read32(padapter, 0x880);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x880", \ rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x880", \
u4Tmp[0]); u4Tmp[0]);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
...@@ -9608,56 +9609,56 @@ static void BTDM_Display8723ABtCoexInfo(struct rtw_adapter *padapter) ...@@ -9608,56 +9609,56 @@ static void BTDM_Display8723ABtCoexInfo(struct rtw_adapter *padapter)
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
} }
u1Tmp = rtw_read8(padapter, 0x40); u1Tmp = rtl8723au_read8(padapter, 0x40);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \
u1Tmp); u1Tmp);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
u4Tmp[0] = rtw_read32(padapter, 0x550); u4Tmp[0] = rtl8723au_read32(padapter, 0x550);
u1Tmp = rtw_read8(padapter, 0x522); u1Tmp = rtl8723au_read8(padapter, 0x522);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x", "0x550(bcn contrl)/0x522", \ rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x", "0x550(bcn contrl)/0x522", \
u4Tmp[0], u1Tmp); u4Tmp[0], u1Tmp);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
u4Tmp[0] = rtw_read32(padapter, 0x484); u4Tmp[0] = rtl8723au_read32(padapter, 0x484);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x484(rate adaptive)", \ rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x484(rate adaptive)", \
u4Tmp[0]); u4Tmp[0]);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
u4Tmp[0] = rtw_read32(padapter, 0x50); u4Tmp[0] = rtl8723au_read32(padapter, 0x50);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \
u4Tmp[0]); u4Tmp[0]);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
u4Tmp[0] = rtw_read32(padapter, 0xda0); u4Tmp[0] = rtl8723au_read32(padapter, 0xda0);
u4Tmp[1] = rtw_read32(padapter, 0xda4); u4Tmp[1] = rtl8723au_read32(padapter, 0xda4);
u4Tmp[2] = rtw_read32(padapter, 0xda8); u4Tmp[2] = rtl8723au_read32(padapter, 0xda8);
u4Tmp[3] = rtw_read32(padapter, 0xdac); u4Tmp[3] = rtl8723au_read32(padapter, 0xdac);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xda0/0xda4/0xda8/0xdac(FA cnt)", \ rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xda0/0xda4/0xda8/0xdac(FA cnt)", \
u4Tmp[0], u4Tmp[1], u4Tmp[2], u4Tmp[3]); u4Tmp[0], u4Tmp[1], u4Tmp[2], u4Tmp[3]);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
u4Tmp[0] = rtw_read32(padapter, 0x6c0); u4Tmp[0] = rtl8723au_read32(padapter, 0x6c0);
u4Tmp[1] = rtw_read32(padapter, 0x6c4); u4Tmp[1] = rtl8723au_read32(padapter, 0x6c4);
u4Tmp[2] = rtw_read32(padapter, 0x6c8); u4Tmp[2] = rtl8723au_read32(padapter, 0x6c8);
u1Tmp = rtw_read8(padapter, 0x6cc); u1Tmp = rtl8723au_read8(padapter, 0x6cc);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \
u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp); u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
/* u4Tmp = rtw_read32(padapter, 0x770); */ /* u4Tmp = rtl8723au_read32(padapter, 0x770); */
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "0x770(Hi pri Rx[31:16]/Tx[15:0])", \ rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "0x770(Hi pri Rx[31:16]/Tx[15:0])", \
pHalData->bt_coexist.halCoex8723.highPriorityRx, pHalData->bt_coexist.halCoex8723.highPriorityRx,
pHalData->bt_coexist.halCoex8723.highPriorityTx); pHalData->bt_coexist.halCoex8723.highPriorityTx);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
/* u4Tmp = rtw_read32(padapter, 0x774); */ /* u4Tmp = rtl8723au_read32(padapter, 0x774); */
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "0x774(Lo pri Rx[31:16]/Tx[15:0])", \ rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "0x774(Lo pri Rx[31:16]/Tx[15:0])", \
pHalData->bt_coexist.halCoex8723.lowPriorityRx, pHalData->bt_coexist.halCoex8723.lowPriorityRx,
pHalData->bt_coexist.halCoex8723.lowPriorityTx); pHalData->bt_coexist.halCoex8723.lowPriorityTx);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
/* Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang */ /* Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang */
u1Tmp = rtw_read8(padapter, 0x41b); u1Tmp = rtl8723au_read8(padapter, 0x41b);
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x41b (hang chk == 0xf)", \ rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x41b (hang chk == 0xf)", \
u1Tmp); u1Tmp);
DCMD_Printf(btCoexDbgBuf); DCMD_Printf(btCoexDbgBuf);
...@@ -9941,15 +9942,15 @@ void BTDM_CheckBTIdleChange1Ant(struct rtw_adapter *padapter) ...@@ -9941,15 +9942,15 @@ void BTDM_CheckBTIdleChange1Ant(struct rtw_adapter *padapter)
else else
regBTPolling = REG_BT_POLLING; regBTPolling = REG_BT_POLLING;
BT_Active = rtw_read32(padapter, regBTActive); BT_Active = rtl8723au_read32(padapter, regBTActive);
RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Active(0x%x) =%x\n", regBTActive, BT_Active)); RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Active(0x%x) =%x\n", regBTActive, BT_Active));
BT_Active = BT_Active & 0x00ffffff; BT_Active = BT_Active & 0x00ffffff;
BT_State = rtw_read32(padapter, regBTState); BT_State = rtl8723au_read32(padapter, regBTState);
RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_State(0x%x) =%x\n", regBTState, BT_State)); RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_State(0x%x) =%x\n", regBTState, BT_State));
BT_State = BT_State & 0x00ffffff; BT_State = BT_State & 0x00ffffff;
BT_Polling = rtw_read32(padapter, regBTPolling); BT_Polling = rtl8723au_read32(padapter, regBTPolling);
RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Polling(0x%x) =%x\n", regBTPolling, BT_Polling)); RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Polling(0x%x) =%x\n", regBTPolling, BT_Polling));
if (BT_Active == 0xffffffff && BT_State == 0xffffffff && BT_Polling == 0xffffffff) if (BT_Active == 0xffffffff && BT_State == 0xffffffff && BT_Polling == 0xffffffff)
...@@ -10585,7 +10586,7 @@ u8 BTDM_DisableEDCATurbo(struct rtw_adapter *padapter) ...@@ -10585,7 +10586,7 @@ u8 BTDM_DisableEDCATurbo(struct rtw_adapter *padapter)
pHalData->odmpriv.DM_EDCA_Table.bCurrentTurboEDCA = false; pHalData->odmpriv.DM_EDCA_Table.bCurrentTurboEDCA = false;
pHalData->dmpriv.prv_traffic_idx = 3; pHalData->dmpriv.prv_traffic_idx = 3;
} }
cur_EDCA_reg = rtw_read32(padapter, REG_EDCA_BE_PARAM); cur_EDCA_reg = rtl8723au_read32(padapter, REG_EDCA_BE_PARAM);
if (cur_EDCA_reg != EDCA_BT_BE) if (cur_EDCA_reg != EDCA_BT_BE)
bBtChangeEDCA = true; bBtChangeEDCA = true;
......
drivers/staging/rtl8723au/hal/rtl8723a_cmd.c
View file @ 050abc45
...@@ -20,6 +20,7 @@ ...@@ -20,6 +20,7 @@
#include <mlme_osdep.h> #include <mlme_osdep.h>
#include <rtw_ioctl_set.h> #include <rtw_ioctl_set.h>
#include <rtl8723a_hal.h> #include <rtl8723a_hal.h>
#include <usb_ops_linux.h>
#define RTL92C_MAX_H2C_BOX_NUMS 4 #define RTL92C_MAX_H2C_BOX_NUMS 4
#define RTL92C_MAX_CMD_LEN 5 #define RTL92C_MAX_CMD_LEN 5
...@@ -33,7 +34,7 @@ static u8 _is_fw_read_cmd_down(struct rtw_adapter *padapter, u8 msgbox_num) ...@@ -33,7 +34,7 @@ static u8 _is_fw_read_cmd_down(struct rtw_adapter *padapter, u8 msgbox_num)
u8 valid; u8 valid;
do { do {
valid = rtw_read8(padapter, REG_HMETFR) & BIT(msgbox_num); valid = rtl8723au_read8(padapter, REG_HMETFR) & BIT(msgbox_num);
if (0 == valid) if (0 == valid)
read_down = true; read_down = true;
} while ((!read_down) && (retry_cnts--)); } while ((!read_down) && (retry_cnts--));
...@@ -610,7 +611,7 @@ void rtl8723a_set_FwJoinBssReport_cmd(struct rtw_adapter *padapter, u8 mstatus) ...@@ -610,7 +611,7 @@ void rtl8723a_set_FwJoinBssReport_cmd(struct rtw_adapter *padapter, u8 mstatus)
/* rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); */ /* rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); */
/* set REG_CR bit 8 */ /* set REG_CR bit 8 */
v8 = rtw_read8(padapter, REG_CR+1); v8 = rtl8723au_read8(padapter, REG_CR+1);
v8 |= BIT(0); /* ENSWBCN */ v8 |= BIT(0); /* ENSWBCN */
rtw_write8(padapter, REG_CR+1, v8); rtw_write8(padapter, REG_CR+1, v8);
...@@ -626,7 +627,7 @@ void rtl8723a_set_FwJoinBssReport_cmd(struct rtw_adapter *padapter, u8 mstatus) ...@@ -626,7 +627,7 @@ void rtl8723a_set_FwJoinBssReport_cmd(struct rtw_adapter *padapter, u8 mstatus)
bRecover = true; bRecover = true;
/* To tell Hw the packet is not a real beacon frame. */ /* To tell Hw the packet is not a real beacon frame. */
/* U1bTmp = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2); */ /* U1bTmp = rtl8723au_read8(padapter, REG_FWHW_TXQ_CTRL+2); */
rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl & ~BIT(6)); rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl & ~BIT(6));
pHalData->RegFwHwTxQCtrl &= ~BIT(6); pHalData->RegFwHwTxQCtrl &= ~BIT(6);
SetFwRsvdPagePkt(padapter, 0); SetFwRsvdPagePkt(padapter, 0);
...@@ -645,7 +646,7 @@ void rtl8723a_set_FwJoinBssReport_cmd(struct rtw_adapter *padapter, u8 mstatus) ...@@ -645,7 +646,7 @@ void rtl8723a_set_FwJoinBssReport_cmd(struct rtw_adapter *padapter, u8 mstatus)
} }
/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */ /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
v8 = rtw_read8(padapter, REG_CR+1); v8 = rtl8723au_read8(padapter, REG_CR+1);
v8 &= ~BIT(0); /* ~ENSWBCN */ v8 &= ~BIT(0); /* ~ENSWBCN */
rtw_write8(padapter, REG_CR+1, v8); rtw_write8(padapter, REG_CR+1, v8);
} }
......
drivers/staging/rtl8723au/hal/rtl8723a_dm.c
View file @ 050abc45
...@@ -28,6 +28,7 @@ ...@@ -28,6 +28,7 @@
#include <drv_types.h> #include <drv_types.h>
#include <rtl8723a_hal.h> #include <rtl8723a_hal.h>
#include <usb_ops_linux.h>
/* */ /* */
/* Global var */ /* Global var */
...@@ -45,18 +46,18 @@ static void dm_CheckPbcGPIO(struct rtw_adapter *padapter) ...@@ -45,18 +46,18 @@ static void dm_CheckPbcGPIO(struct rtw_adapter *padapter)
if (!padapter->registrypriv.hw_wps_pbc) if (!padapter->registrypriv.hw_wps_pbc)
return; return;
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); tmp1byte = rtl8723au_read8(padapter, GPIO_IO_SEL);
tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT); tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */
tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */ rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); tmp1byte = rtl8723au_read8(padapter, GPIO_IO_SEL);
tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */
tmp1byte = rtw_read8(padapter, GPIO_IN); tmp1byte = rtl8723au_read8(padapter, GPIO_IN);
if (tmp1byte == 0xff) if (tmp1byte == 0xff)
return; return;
...@@ -197,7 +198,7 @@ void rtl8723a_InitHalDm(struct rtw_adapter *Adapter) ...@@ -197,7 +198,7 @@ void rtl8723a_InitHalDm(struct rtw_adapter *Adapter)
ODM23a_DMInit(pDM_Odm); ODM23a_DMInit(pDM_Odm);
/* Save REG_INIDATA_RATE_SEL value for TXDESC. */ /* Save REG_INIDATA_RATE_SEL value for TXDESC. */
for (i = 0; i < 32; i++) for (i = 0; i < 32; i++)
pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f; pdmpriv->INIDATA_RATE[i] = rtl8723au_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f;
} }
void void
...@@ -225,11 +226,11 @@ rtl8723a_HalDmWatchDog( ...@@ -225,11 +226,11 @@ rtl8723a_HalDmWatchDog(
/* Read REG_INIDATA_RATE_SEL value for TXDESC. */ /* Read REG_INIDATA_RATE_SEL value for TXDESC. */
if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE)) { if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE)) {
pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f; pdmpriv->INIDATA_RATE[0] = rtl8723au_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f;
} else { } else {
u8 i; u8 i;
for (i = 1 ; i < (Adapter->stapriv.asoc_sta_count + 1); i++) for (i = 1 ; i < (Adapter->stapriv.asoc_sta_count + 1); i++)
pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f; pdmpriv->INIDATA_RATE[i] = rtl8723au_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f;
} }
} }
......
drivers/staging/rtl8723au/hal/rtl8723a_phycfg.c
View file @ 050abc45
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
#include <drv_types.h> #include <drv_types.h>
#include <rtl8723a_hal.h> #include <rtl8723a_hal.h>
#include <usb_ops_linux.h>
/*---------------------------Define Local Constant---------------------------*/ /*---------------------------Define Local Constant---------------------------*/
/* Channel switch:The size of command tables for switch channel*/ /* Channel switch:The size of command tables for switch channel*/
...@@ -87,7 +88,7 @@ PHY_QueryBBReg(struct rtw_adapter *Adapter, u32 RegAddr, u32 BitMask) ...@@ -87,7 +88,7 @@ PHY_QueryBBReg(struct rtw_adapter *Adapter, u32 RegAddr, u32 BitMask)
{ {
u32 ReturnValue = 0, OriginalValue, BitShift; u32 ReturnValue = 0, OriginalValue, BitShift;
OriginalValue = rtw_read32(Adapter, RegAddr); OriginalValue = rtl8723au_read32(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask); BitShift = phy_CalculateBitShift(BitMask);
ReturnValue = (OriginalValue & BitMask) >> BitShift; ReturnValue = (OriginalValue & BitMask) >> BitShift;
return ReturnValue; return ReturnValue;
...@@ -123,7 +124,7 @@ PHY_SetBBReg(struct rtw_adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data) ...@@ -123,7 +124,7 @@ PHY_SetBBReg(struct rtw_adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data)
/* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */ /* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */
if (BitMask != bMaskDWord) {/* if not "double word" write */ if (BitMask != bMaskDWord) {/* if not "double word" write */
OriginalValue = rtw_read32(Adapter, RegAddr); OriginalValue = rtl8723au_read32(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask); BitShift = phy_CalculateBitShift(BitMask);
Data = ((OriginalValue & (~BitMask)) | (Data << BitShift)); Data = ((OriginalValue & (~BitMask)) | (Data << BitShift));
} }
...@@ -804,7 +805,7 @@ PHY_BBConfig8723A(struct rtw_adapter *Adapter) ...@@ -804,7 +805,7 @@ PHY_BBConfig8723A(struct rtw_adapter *Adapter)
/* Suggested by Scott. tynli_test. 2010.12.30. */ /* Suggested by Scott. tynli_test. 2010.12.30. */
/* 1. 0x28[1] = 1 */ /* 1. 0x28[1] = 1 */
TmpU1B = rtw_read8(Adapter, REG_AFE_PLL_CTRL); TmpU1B = rtl8723au_read8(Adapter, REG_AFE_PLL_CTRL);
udelay(2); udelay(2);
rtw_write8(Adapter, REG_AFE_PLL_CTRL, TmpU1B | BIT(1)); rtw_write8(Adapter, REG_AFE_PLL_CTRL, TmpU1B | BIT(1));
udelay(2); udelay(2);
...@@ -814,16 +815,16 @@ PHY_BBConfig8723A(struct rtw_adapter *Adapter) ...@@ -814,16 +815,16 @@ PHY_BBConfig8723A(struct rtw_adapter *Adapter)
udelay(2); udelay(2);
/* 3. 0x02[1:0] = 2b'11 */ /* 3. 0x02[1:0] = 2b'11 */
TmpU1B = rtw_read8(Adapter, REG_SYS_FUNC_EN); TmpU1B = rtl8723au_read8(Adapter, REG_SYS_FUNC_EN);
rtw_write8(Adapter, REG_SYS_FUNC_EN, rtw_write8(Adapter, REG_SYS_FUNC_EN,
(TmpU1B | FEN_BB_GLB_RSTn | FEN_BBRSTB)); (TmpU1B | FEN_BB_GLB_RSTn | FEN_BBRSTB));
/* 4. 0x25[6] = 0 */ /* 4. 0x25[6] = 0 */
TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL + 1); TmpU1B = rtl8723au_read8(Adapter, REG_AFE_XTAL_CTRL + 1);
rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, TmpU1B & ~BIT(6)); rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, TmpU1B & ~BIT(6));
/* 5. 0x24[20] = 0 Advised by SD3 Alex Wang. 2011.02.09. */ /* 5. 0x24[20] = 0 Advised by SD3 Alex Wang. 2011.02.09. */
TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+2); TmpU1B = rtl8723au_read8(Adapter, REG_AFE_XTAL_CTRL+2);
rtw_write8(Adapter, REG_AFE_XTAL_CTRL+2, TmpU1B & ~BIT(4)); rtw_write8(Adapter, REG_AFE_XTAL_CTRL+2, TmpU1B & ~BIT(4));
/* 6. 0x1f[7:0] = 0x07 */ /* 6. 0x1f[7:0] = 0x07 */
...@@ -956,8 +957,8 @@ _PHY_SetBWMode23a92C(struct rtw_adapter *Adapter) ...@@ -956,8 +957,8 @@ _PHY_SetBWMode23a92C(struct rtw_adapter *Adapter)
/* 3<1>Set MAC register */ /* 3<1>Set MAC register */
/* 3 */ /* 3 */
regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); regBwOpMode = rtl8723au_read8(Adapter, REG_BWOPMODE);
regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2); regRRSR_RSC = rtl8723au_read8(Adapter, REG_RRSR+2);
switch (pHalData->CurrentChannelBW) { switch (pHalData->CurrentChannelBW) {
case HT_CHANNEL_WIDTH_20: case HT_CHANNEL_WIDTH_20:
......
drivers/staging/rtl8723au/hal/rtl8723a_sreset.c
View file @ 050abc45
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <rtl8723a_sreset.h> #include <rtl8723a_sreset.h>
#include <rtl8723a_hal.h> #include <rtl8723a_hal.h>
#include <usb_ops_linux.h>
void rtl8723a_sreset_xmit_status_check(struct rtw_adapter *padapter) void rtl8723a_sreset_xmit_status_check(struct rtw_adapter *padapter)
{ {
...@@ -27,7 +28,7 @@ void rtl8723a_sreset_xmit_status_check(struct rtw_adapter *padapter) ...@@ -27,7 +28,7 @@ void rtl8723a_sreset_xmit_status_check(struct rtw_adapter *padapter)
unsigned int diff_time; unsigned int diff_time;
u32 txdma_status; u32 txdma_status;
txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS); txdma_status = rtl8723au_read32(padapter, REG_TXDMA_STATUS);
if (txdma_status != 0) { if (txdma_status != 0) {
DBG_8723A("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status); DBG_8723A("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
rtw_sreset_reset(padapter); rtw_sreset_reset(padapter);
......
drivers/staging/rtl8723au/hal/rtl8723au_led.c
View file @ 050abc45
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include "drv_types.h" #include "drv_types.h"
#include "rtl8723a_hal.h" #include "rtl8723a_hal.h"
#include "rtl8723a_led.h" #include "rtl8723a_led.h"
#include "usb_ops_linux.h"
/* */ /* */
/* LED object. */ /* LED object. */
...@@ -49,7 +50,7 @@ void SwLedOn23a(struct rtw_adapter *padapter, struct led_8723a *pLed) ...@@ -49,7 +50,7 @@ void SwLedOn23a(struct rtw_adapter *padapter, struct led_8723a *pLed)
rtw_write8(padapter, REG_LEDCFG1, (LedCfg&0x00)|BIT(6)); rtw_write8(padapter, REG_LEDCFG1, (LedCfg&0x00)|BIT(6));
break; break;
case LED_PIN_LED2: case LED_PIN_LED2:
LedCfg = rtw_read8(padapter, REG_LEDCFG2); LedCfg = rtl8723au_read8(padapter, REG_LEDCFG2);
/* SW control led1 on. */ /* SW control led1 on. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x80)|BIT(5)); rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x80)|BIT(5));
break; break;
...@@ -81,7 +82,7 @@ void SwLedOff23a(struct rtw_adapter *padapter, struct led_8723a *pLed) ...@@ -81,7 +82,7 @@ void SwLedOff23a(struct rtw_adapter *padapter, struct led_8723a *pLed)
rtw_write8(padapter, REG_LEDCFG1, (LedCfg&0x00)|BIT(5)|BIT(6)); rtw_write8(padapter, REG_LEDCFG1, (LedCfg&0x00)|BIT(5)|BIT(6));
break; break;
case LED_PIN_LED2: case LED_PIN_LED2:
LedCfg = rtw_read8(padapter, REG_LEDCFG2); LedCfg = rtl8723au_read8(padapter, REG_LEDCFG2);
/* SW control led1 on. */ /* SW control led1 on. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x80)|BIT(3)|BIT(5)); rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x80)|BIT(3)|BIT(5));
break; break;
......
drivers/staging/rtl8723au/hal/usb_halinit.c
View file @ 050abc45
...@@ -36,7 +36,7 @@ _ConfigChipOutEP(struct rtw_adapter *pAdapter, u8 NumOutPipe) ...@@ -36,7 +36,7 @@ _ConfigChipOutEP(struct rtw_adapter *pAdapter, u8 NumOutPipe)
pHalData->OutEpNumber = 0; pHalData->OutEpNumber = 0;
/* Normal and High queue */ /* Normal and High queue */
value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 1)); value8 = rtl8723au_read8(pAdapter, (REG_NORMAL_SIE_EP + 1));
if (value8 & USB_NORMAL_SIE_EP_MASK) { if (value8 & USB_NORMAL_SIE_EP_MASK) {
pHalData->OutEpQueueSel |= TX_SELE_HQ; pHalData->OutEpQueueSel |= TX_SELE_HQ;
...@@ -49,7 +49,7 @@ _ConfigChipOutEP(struct rtw_adapter *pAdapter, u8 NumOutPipe) ...@@ -49,7 +49,7 @@ _ConfigChipOutEP(struct rtw_adapter *pAdapter, u8 NumOutPipe)
} }
/* Low queue */ /* Low queue */
value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 2)); value8 = rtl8723au_read8(pAdapter, (REG_NORMAL_SIE_EP + 2));
if (value8 & USB_NORMAL_SIE_EP_MASK) { if (value8 & USB_NORMAL_SIE_EP_MASK) {
pHalData->OutEpQueueSel |= TX_SELE_LQ; pHalData->OutEpQueueSel |= TX_SELE_LQ;
pHalData->OutEpNumber++; pHalData->OutEpNumber++;
...@@ -108,13 +108,13 @@ static int _InitPowerOn(struct rtw_adapter *padapter) ...@@ -108,13 +108,13 @@ static int _InitPowerOn(struct rtw_adapter *padapter)
return _FAIL; return _FAIL;
/* 0x04[19] = 1, suggest by Jackie 2011.05.09, reset 8051 */ /* 0x04[19] = 1, suggest by Jackie 2011.05.09, reset 8051 */
value8 = rtw_read8(padapter, REG_APS_FSMCO+2); value8 = rtl8723au_read8(padapter, REG_APS_FSMCO+2);
rtw_write8(padapter, REG_APS_FSMCO + 2, value8 | BIT(3)); rtw_write8(padapter, REG_APS_FSMCO + 2, value8 | BIT(3));
/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */ /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
/* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. /* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy.
Added by tynli. 2011.08.31. */ Added by tynli. 2011.08.31. */
value16 = rtw_read16(padapter, REG_CR); value16 = rtl8723au_read16(padapter, REG_CR);
value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN | value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN |
PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN | PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN |
ENSEC | CALTMR_EN); ENSEC | CALTMR_EN);
...@@ -216,7 +216,7 @@ static void ...@@ -216,7 +216,7 @@ static void
_InitNormalChipRegPriority(struct rtw_adapter *Adapter, u16 beQ, u16 bkQ, _InitNormalChipRegPriority(struct rtw_adapter *Adapter, u16 beQ, u16 bkQ,
u16 viQ, u16 voQ, u16 mgtQ, u16 hiQ) u16 viQ, u16 voQ, u16 mgtQ, u16 hiQ)
{ {
u16 value16 = rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7; u16 value16 = rtl8723au_read16(Adapter, REG_TRXDMA_CTRL) & 0x7;
value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
_TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
...@@ -346,7 +346,7 @@ static void _InitNetworkType(struct rtw_adapter *Adapter) ...@@ -346,7 +346,7 @@ static void _InitNetworkType(struct rtw_adapter *Adapter)
{ {
u32 value32; u32 value32;
value32 = rtw_read32(Adapter, REG_CR); value32 = rtl8723au_read32(Adapter, REG_CR);
/* TODO: use the other function to set network type */ /* TODO: use the other function to set network type */
value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
...@@ -402,7 +402,7 @@ static void _InitWMACSetting(struct rtw_adapter *Adapter) ...@@ -402,7 +402,7 @@ static void _InitWMACSetting(struct rtw_adapter *Adapter)
/* rtw_write16(Adapter, REG_RXFLTMAP0, value16); */ /* rtw_write16(Adapter, REG_RXFLTMAP0, value16); */
/* enable RX_SHIFT bits */ /* enable RX_SHIFT bits */
/* rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, /* rtw_write8(Adapter, REG_TRXDMA_CTRL, rtl8723au_read8(Adapter,
REG_TRXDMA_CTRL)|BIT(1)); */ REG_TRXDMA_CTRL)|BIT(1)); */
} }
...@@ -412,7 +412,7 @@ static void _InitAdaptiveCtrl(struct rtw_adapter *Adapter) ...@@ -412,7 +412,7 @@ static void _InitAdaptiveCtrl(struct rtw_adapter *Adapter)
u32 value32; u32 value32;
/* Response Rate Set */ /* Response Rate Set */
value32 = rtw_read32(Adapter, REG_RRSR); value32 = rtl8723au_read32(Adapter, REG_RRSR);
value32 &= ~RATE_BITMAP_ALL; value32 &= ~RATE_BITMAP_ALL;
value32 |= RATE_RRSR_CCK_ONLY_1M; value32 |= RATE_RRSR_CCK_ONLY_1M;
rtw_write32(Adapter, REG_RRSR, value32); rtw_write32(Adapter, REG_RRSR, value32);
...@@ -480,7 +480,7 @@ static void _InitRetryFunction(struct rtw_adapter *Adapter) ...@@ -480,7 +480,7 @@ static void _InitRetryFunction(struct rtw_adapter *Adapter)
{ {
u8 value8; u8 value8;
value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL); value8 = rtl8723au_read8(Adapter, REG_FWHW_TXQ_CTRL);
value8 |= EN_AMPDU_RTY_NEW; value8 |= EN_AMPDU_RTY_NEW;
rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8); rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
...@@ -589,13 +589,14 @@ enum rt_rf_power_state RfOnOffDetect23a(struct rtw_adapter *pAdapter) ...@@ -589,13 +589,14 @@ enum rt_rf_power_state RfOnOffDetect23a(struct rtw_adapter *pAdapter)
enum rt_rf_power_state rfpowerstate = rf_off; enum rt_rf_power_state rfpowerstate = rf_off;
if (pAdapter->pwrctrlpriv.bHWPowerdown) { if (pAdapter->pwrctrlpriv.bHWPowerdown) {
val8 = rtw_read8(pAdapter, REG_HSISR); val8 = rtl8723au_read8(pAdapter, REG_HSISR);
DBG_8723A("pwrdown, 0x5c(BIT7) =%02x\n", val8); DBG_8723A("pwrdown, 0x5c(BIT7) =%02x\n", val8);
rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on; rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on;
} else { /* rf on/off */ } else { /* rf on/off */
rtw_write8(pAdapter, REG_MAC_PINMUX_CFG, rtw_write8(pAdapter, REG_MAC_PINMUX_CFG,
rtw_read8(pAdapter, REG_MAC_PINMUX_CFG) & ~BIT(3)); rtl8723au_read8(pAdapter, REG_MAC_PINMUX_CFG) &
val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL); ~BIT(3));
val8 = rtl8723au_read8(pAdapter, REG_GPIO_IO_SEL);
DBG_8723A("GPIO_IN =%02x\n", val8); DBG_8723A("GPIO_IN =%02x\n", val8);
rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off; rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off;
} }
...@@ -634,7 +635,7 @@ static int rtl8723au_hal_init(struct rtw_adapter *Adapter) ...@@ -634,7 +635,7 @@ static int rtl8723au_hal_init(struct rtw_adapter *Adapter)
} }
/* Check if MAC has already power on. by tynli. 2011.05.27. */ /* Check if MAC has already power on. by tynli. 2011.05.27. */
val8 = rtw_read8(Adapter, REG_CR); val8 = rtl8723au_read8(Adapter, REG_CR);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_, RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
("%s: REG_CR 0x100 = 0x%02x\n", __func__, val8)); ("%s: REG_CR 0x100 = 0x%02x\n", __func__, val8));
/* Fix 92DU-VC S3 hang with the reason is that secondary mac is not /* Fix 92DU-VC S3 hang with the reason is that secondary mac is not
...@@ -881,13 +882,15 @@ static int rtl8723au_hal_init(struct rtw_adapter *Adapter) ...@@ -881,13 +882,15 @@ static int rtl8723au_hal_init(struct rtw_adapter *Adapter)
rtl8723a_set_nav_upper(Adapter, WiFiNavUpperUs); rtl8723a_set_nav_upper(Adapter, WiFiNavUpperUs);
/* 2011/03/09 MH debug only, UMC-B cut pass 2500 S5 test, but we need to fin root cause. */ /* 2011/03/09 MH debug only, UMC-B cut pass 2500 S5 test, but we need to fin root cause. */
if (((rtw_read32(Adapter, rFPGA0_RFMOD) & 0xFF000000) != 0x83000000)) { if (((rtl8723au_read32(Adapter, rFPGA0_RFMOD) & 0xFF000000) !=
0x83000000)) {
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT(24), 1); PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT(24), 1);
RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("%s: IQK fail recorver\n", __func__)); RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("%s: IQK fail recorver\n", __func__));
} }
/* ack for xmit mgmt frames. */ /* ack for xmit mgmt frames. */
rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12)); rtw_write32(Adapter, REG_FWHW_TXQ_CTRL,
rtl8723au_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12));
exit: exit:
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
...@@ -914,7 +917,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter, ...@@ -914,7 +917,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter,
/* 2. Force PWM, Enable SPS18_LDO_Marco_Block */ /* 2. Force PWM, Enable SPS18_LDO_Marco_Block */
rtw_write8(Adapter, REG_SPS0_CTRL, rtw_write8(Adapter, REG_SPS0_CTRL,
rtw_read8(Adapter, REG_SPS0_CTRL) | rtl8723au_read8(Adapter, REG_SPS0_CTRL) |
BIT(0) | BIT(3)); BIT(0) | BIT(3));
/* 3. restore BB, AFE control register. */ /* 3. restore BB, AFE control register. */
...@@ -958,7 +961,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter, ...@@ -958,7 +961,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter,
/* 2. Force PWM, Enable SPS18_LDO_Marco_Block */ /* 2. Force PWM, Enable SPS18_LDO_Marco_Block */
rtw_write8(Adapter, REG_SPS0_CTRL, rtw_write8(Adapter, REG_SPS0_CTRL,
rtw_read8(Adapter, REG_SPS0_CTRL) | rtl8723au_read8(Adapter, REG_SPS0_CTRL) |
BIT(0) | BIT(3)); BIT(0) | BIT(3));
/* 3. restore BB, AFE control register. */ /* 3. restore BB, AFE control register. */
...@@ -992,7 +995,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter, ...@@ -992,7 +995,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter,
} }
/* 5. gated MAC Clock */ /* 5. gated MAC Clock */
bytetmp = rtw_read8(Adapter, REG_APSD_CTRL); bytetmp = rtl8723au_read8(Adapter, REG_APSD_CTRL);
rtw_write8(Adapter, REG_APSD_CTRL, bytetmp & ~BIT(6)); rtw_write8(Adapter, REG_APSD_CTRL, bytetmp & ~BIT(6));
mdelay(10); mdelay(10);
...@@ -1006,7 +1009,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter, ...@@ -1006,7 +1009,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter,
break; break;
case rf_sleep: case rf_sleep:
case rf_off: case rf_off:
value8 = rtw_read8(Adapter, REG_SPS0_CTRL) ; value8 = rtl8723au_read8(Adapter, REG_SPS0_CTRL) ;
if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
value8 &= ~BIT(0); value8 &= ~BIT(0);
else else
...@@ -1170,12 +1173,12 @@ static void CardDisableRTL8723U(struct rtw_adapter *Adapter) ...@@ -1170,12 +1173,12 @@ static void CardDisableRTL8723U(struct rtw_adapter *Adapter)
rtw_write8(Adapter, REG_RF_CTRL, 0x00); rtw_write8(Adapter, REG_RF_CTRL, 0x00);
/* ==== Reset digital sequence ====== */ /* ==== Reset digital sequence ====== */
if ((rtw_read8(Adapter, REG_MCUFWDL) & BIT(7)) && if ((rtl8723au_read8(Adapter, REG_MCUFWDL) & BIT(7)) &&
Adapter->bFWReady) /* 8051 RAM code */ Adapter->bFWReady) /* 8051 RAM code */
rtl8723a_FirmwareSelfReset(Adapter); rtl8723a_FirmwareSelfReset(Adapter);
/* Reset MCU. Suggested by Filen. 2011.01.26. by tynli. */ /* Reset MCU. Suggested by Filen. 2011.01.26. by tynli. */
u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); u1bTmp = rtl8723au_read8(Adapter, REG_SYS_FUNC_EN+1);
rtw_write8(Adapter, REG_SYS_FUNC_EN+1, u1bTmp & ~BIT(2)); rtw_write8(Adapter, REG_SYS_FUNC_EN+1, u1bTmp & ~BIT(2));
/* g. MCUFWDL 0x80[1:0]= 0 reset MCU ready status */ /* g. MCUFWDL 0x80[1:0]= 0 reset MCU ready status */
...@@ -1188,9 +1191,9 @@ static void CardDisableRTL8723U(struct rtw_adapter *Adapter) ...@@ -1188,9 +1191,9 @@ static void CardDisableRTL8723U(struct rtw_adapter *Adapter)
rtl8723AU_card_disable_flow); rtl8723AU_card_disable_flow);
/* Reset MCU IO Wrapper, added by Roger, 2011.08.30. */ /* Reset MCU IO Wrapper, added by Roger, 2011.08.30. */
u1bTmp = rtw_read8(Adapter, REG_RSV_CTRL + 1); u1bTmp = rtl8723au_read8(Adapter, REG_RSV_CTRL + 1);
rtw_write8(Adapter, REG_RSV_CTRL+1, u1bTmp & ~BIT(0)); rtw_write8(Adapter, REG_RSV_CTRL+1, u1bTmp & ~BIT(0));
u1bTmp = rtw_read8(Adapter, REG_RSV_CTRL + 1); u1bTmp = rtl8723au_read8(Adapter, REG_RSV_CTRL + 1);
rtw_write8(Adapter, REG_RSV_CTRL+1, u1bTmp | BIT(0)); rtw_write8(Adapter, REG_RSV_CTRL+1, u1bTmp | BIT(0));
/* 7. RSV_CTRL 0x1C[7:0] = 0x0E lock ISO/CLK/Power control register */ /* 7. RSV_CTRL 0x1C[7:0] = 0x0E lock ISO/CLK/Power control register */
...@@ -1242,7 +1245,7 @@ int rtl8723au_inirp_init(struct rtw_adapter *Adapter) ...@@ -1242,7 +1245,7 @@ int rtl8723au_inirp_init(struct rtw_adapter *Adapter)
("usb_rx_init: usb_read_interrupt error\n")); ("usb_rx_init: usb_read_interrupt error\n"));
status = _FAIL; status = _FAIL;
} }
pHalData->IntrMask[0] = rtw_read32(Adapter, REG_USB_HIMR); pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR);
MSG_8723A("pHalData->IntrMask = 0x%04x\n", pHalData->IntrMask[0]); MSG_8723A("pHalData->IntrMask = 0x%04x\n", pHalData->IntrMask[0]);
pHalData->IntrMask[0] |= UHIMR_C2HCMD|UHIMR_CPWM; pHalData->IntrMask[0] |= UHIMR_C2HCMD|UHIMR_CPWM;
rtw_write32(Adapter, REG_USB_HIMR, pHalData->IntrMask[0]); rtw_write32(Adapter, REG_USB_HIMR, pHalData->IntrMask[0]);
...@@ -1259,7 +1262,7 @@ int rtl8723au_inirp_deinit(struct rtw_adapter *Adapter) ...@@ -1259,7 +1262,7 @@ int rtl8723au_inirp_deinit(struct rtw_adapter *Adapter)
RT_TRACE(_module_hci_hal_init_c_, _drv_info_, RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
("\n ===> usb_rx_deinit\n")); ("\n ===> usb_rx_deinit\n"));
rtl8723a_usb_read_port_cancel(Adapter); rtl8723a_usb_read_port_cancel(Adapter);
pHalData->IntrMask[0] = rtw_read32(Adapter, REG_USB_HIMR); pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR);
MSG_8723A("%s pHalData->IntrMask = 0x%04x\n", __func__, MSG_8723A("%s pHalData->IntrMask = 0x%04x\n", __func__,
pHalData->IntrMask[0]); pHalData->IntrMask[0]);
pHalData->IntrMask[0] = 0x0; pHalData->IntrMask[0] = 0x0;
...@@ -1400,7 +1403,7 @@ static void _ReadPROMContent(struct rtw_adapter *Adapter) ...@@ -1400,7 +1403,7 @@ static void _ReadPROMContent(struct rtw_adapter *Adapter)
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
u8 eeValue; u8 eeValue;
eeValue = rtw_read8(Adapter, REG_9346CR); eeValue = rtl8723au_read8(Adapter, REG_9346CR);
/* To check system boot selection. */ /* To check system boot selection. */
pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false; pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false;
pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true; pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true;
...@@ -1439,7 +1442,7 @@ static void hal_EfuseCellSel(struct rtw_adapter *Adapter) ...@@ -1439,7 +1442,7 @@ static void hal_EfuseCellSel(struct rtw_adapter *Adapter)
{ {
u32 value32; u32 value32;
value32 = rtw_read32(Adapter, EFUSE_TEST); value32 = rtl8723au_read32(Adapter, EFUSE_TEST);
value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
rtw_write32(Adapter, EFUSE_TEST, value32); rtw_write32(Adapter, EFUSE_TEST, value32);
} }
......
drivers/staging/rtl8723au/hal/usb_ops_linux.c
View file @ 050abc45
...@@ -132,7 +132,7 @@ static int usbctrl_vendorreq(struct rtw_adapter *padapter, u8 request, ...@@ -132,7 +132,7 @@ static int usbctrl_vendorreq(struct rtw_adapter *padapter, u8 request,
return status; return status;
} }
static u8 usb_read8(struct rtw_adapter *padapter, u32 addr) u8 rtl8723au_read8(struct rtw_adapter *padapter, u32 addr)
{ {
u8 request; u8 request;
u8 requesttype; u8 requesttype;
...@@ -154,7 +154,7 @@ static u8 usb_read8(struct rtw_adapter *padapter, u32 addr) ...@@ -154,7 +154,7 @@ static u8 usb_read8(struct rtw_adapter *padapter, u32 addr)
return data; return data;
} }
static u16 usb_read16(struct rtw_adapter *padapter, u32 addr) u16 rtl8723au_read16(struct rtw_adapter *padapter, u32 addr)
{ {
u8 request; u8 request;
u8 requesttype; u8 requesttype;
...@@ -176,7 +176,7 @@ static u16 usb_read16(struct rtw_adapter *padapter, u32 addr) ...@@ -176,7 +176,7 @@ static u16 usb_read16(struct rtw_adapter *padapter, u32 addr)
return le16_to_cpu(data); return le16_to_cpu(data);
} }
static u32 usb_read32(struct rtw_adapter *padapter, u32 addr) u32 rtl8723au_read32(struct rtw_adapter *padapter, u32 addr)
{ {
u8 request; u8 request;
u8 requesttype; u8 requesttype;
...@@ -839,10 +839,6 @@ void rtl8723au_set_intf_ops(struct rtw_adapter *padapter) ...@@ -839,10 +839,6 @@ void rtl8723au_set_intf_ops(struct rtw_adapter *padapter)
memset((u8 *)pops, 0, sizeof(struct _io_ops)); memset((u8 *)pops, 0, sizeof(struct _io_ops));
pops->_read8 = &usb_read8;
pops->_read16 = &usb_read16;
pops->_read32 = &usb_read32;
pops->_write8 = &usb_write8; pops->_write8 = &usb_write8;
pops->_write16 = &usb_write16; pops->_write16 = &usb_write16;
pops->_write32 = &usb_write32; pops->_write32 = &usb_write32;
......
drivers/staging/rtl8723au/include/rtw_io.h
View file @ 050abc45
...@@ -100,10 +100,6 @@ struct intf_priv; ...@@ -100,10 +100,6 @@ struct intf_priv;
struct _io_ops struct _io_ops
{ {
u8 (*_read8)(struct rtw_adapter *adapter, u32 addr);
u16 (*_read16)(struct rtw_adapter *adapter, u32 addr);
u32 (*_read32)(struct rtw_adapter *adapter, u32 addr);
int (*_write8)(struct rtw_adapter *adapter, u32 addr, u8 val); int (*_write8)(struct rtw_adapter *adapter, u32 addr, u8 val);
int (*_write16)(struct rtw_adapter *adapter, u32 addr, u16 val); int (*_write16)(struct rtw_adapter *adapter, u32 addr, u16 val);
int (*_write32)(struct rtw_adapter *adapter, u32 addr, u32 val); int (*_write32)(struct rtw_adapter *adapter, u32 addr, u32 val);
...@@ -240,9 +236,6 @@ struct reg_protocol_wt { ...@@ -240,9 +236,6 @@ struct reg_protocol_wt {
void _rtw_attrib_read(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); void _rtw_attrib_read(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
void _rtw_attrib_write(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); void _rtw_attrib_write(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
u8 _rtw_read823a(struct rtw_adapter *adapter, u32 addr);
u16 _rtw_read1623a(struct rtw_adapter *adapter, u32 addr);
u32 _rtw_read3223a(struct rtw_adapter *adapter, u32 addr);
void _rtw_read_port23a_cancel(struct rtw_adapter *adapter); void _rtw_read_port23a_cancel(struct rtw_adapter *adapter);
int _rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val); int _rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val);
...@@ -256,28 +249,16 @@ void _rtw_write_port23a_cancel(struct rtw_adapter *adapter); ...@@ -256,28 +249,16 @@ void _rtw_write_port23a_cancel(struct rtw_adapter *adapter);
bool match_read_sniff_ranges(u16 addr, u16 len); bool match_read_sniff_ranges(u16 addr, u16 len);
bool match_write_sniff_ranges(u16 addr, u16 len); bool match_write_sniff_ranges(u16 addr, u16 len);
u8 dbg_rtw_read823a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
u16 dbg_rtw_read1623a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
u32 dbg_rtw_read3223a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
int dbg_rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val, const char *caller, const int line); int dbg_rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val, const char *caller, const int line);
int dbg_rtw_write1623a(struct rtw_adapter *adapter, u32 addr, u16 val, const char *caller, const int line); int dbg_rtw_write1623a(struct rtw_adapter *adapter, u32 addr, u16 val, const char *caller, const int line);
int dbg_rtw_write3223a(struct rtw_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); int dbg_rtw_write3223a(struct rtw_adapter *adapter, u32 addr, u32 val, const char *caller, const int line);
int dbg_rtw_writeN23a(struct rtw_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line); int dbg_rtw_writeN23a(struct rtw_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line);
#define rtw_read8(adapter, addr) dbg_rtw_read823a((adapter), (addr), __FUNCTION__, __LINE__)
#define rtw_read16(adapter, addr) dbg_rtw_read1623a((adapter), (addr), __FUNCTION__, __LINE__)
#define rtw_read32(adapter, addr) dbg_rtw_read3223a((adapter), (addr), __FUNCTION__, __LINE__)
#define rtw_write8(adapter, addr, val) dbg_rtw_write823a((adapter), (addr), (val), __FUNCTION__, __LINE__) #define rtw_write8(adapter, addr, val) dbg_rtw_write823a((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_write16(adapter, addr, val) dbg_rtw_write1623a((adapter), (addr), (val), __FUNCTION__, __LINE__) #define rtw_write16(adapter, addr, val) dbg_rtw_write1623a((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_write32(adapter, addr, val) dbg_rtw_write3223a((adapter), (addr), (val), __FUNCTION__, __LINE__) #define rtw_write32(adapter, addr, val) dbg_rtw_write3223a((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN23a((adapter), (addr), (length), (data), __FUNCTION__, __LINE__) #define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN23a((adapter), (addr), (length), (data), __FUNCTION__, __LINE__)
#else /* DBG_IO */ #else /* DBG_IO */
#define rtw_read8(adapter, addr) _rtw_read823a((adapter), (addr))
#define rtw_read16(adapter, addr) _rtw_read1623a((adapter), (addr))
#define rtw_read32(adapter, addr) _rtw_read3223a((adapter), (addr))
#define rtw_write8(adapter, addr, val) _rtw_write823a((adapter), (addr), (val)) #define rtw_write8(adapter, addr, val) _rtw_write823a((adapter), (addr), (val))
#define rtw_write16(adapter, addr, val) _rtw_write1623a((adapter), (addr), (val)) #define rtw_write16(adapter, addr, val) _rtw_write1623a((adapter), (addr), (val))
#define rtw_write32(adapter, addr, val) _rtw_write3223a((adapter), (addr), (val)) #define rtw_write32(adapter, addr, val) _rtw_write3223a((adapter), (addr), (val))
...@@ -291,11 +272,8 @@ int dbg_rtw_writeN23a(struct rtw_adapter *adapter, u32 addr ,u32 length , u8 *da ...@@ -291,11 +272,8 @@ int dbg_rtw_writeN23a(struct rtw_adapter *adapter, u32 addr ,u32 length , u8 *da
#define PlatformEFIOWrite4Byte(_a,_b,_c) \ #define PlatformEFIOWrite4Byte(_a,_b,_c) \
rtw_write32(_a,_b,_c) rtw_write32(_a,_b,_c)
#define PlatformEFIORead1Byte(_a,_b) \ #define PlatformEFIORead1Byte(_a,_b) rtl8723au_read8(_a,_b)
rtw_read8(_a,_b) #define PlatformEFIORead2Byte(_a,_b) rtl8723au_read16(_a,_b)
#define PlatformEFIORead2Byte(_a,_b) \ #define PlatformEFIORead4Byte(_a,_b) rtl8723au_read32(_a,_b)
rtw_read16(_a,_b)
#define PlatformEFIORead4Byte(_a,_b) \
rtw_read32(_a,_b)
#endif /* _RTL8711_IO_H_ */ #endif /* _RTL8711_IO_H_ */
drivers/staging/rtl8723au/include/usb_ops_linux.h
View file @ 050abc45
...@@ -29,4 +29,8 @@ int rtl8723a_usb_write_port(struct rtw_adapter *padapter, u32 addr, u32 cnt, ...@@ -29,4 +29,8 @@ int rtl8723a_usb_write_port(struct rtw_adapter *padapter, u32 addr, u32 cnt,
void rtl8723a_usb_write_port_cancel(struct rtw_adapter *padapter); void rtl8723a_usb_write_port_cancel(struct rtw_adapter *padapter);
int rtl8723a_usb_read_interrupt(struct rtw_adapter *adapter, u32 addr); int rtl8723a_usb_read_interrupt(struct rtw_adapter *adapter, u32 addr);
u8 rtl8723au_read8(struct rtw_adapter *padapter, u32 addr);
u16 rtl8723au_read16(struct rtw_adapter *padapter, u32 addr);
u32 rtl8723au_read32(struct rtw_adapter *padapter, u32 addr);
#endif #endif
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