[ARM PATCH] 2463/1: Hynix h7202 serial ports fixes

Patch from Sascha Hauer

This patch fixes the membase/mapbase of serial ports 1-4 and actually
enables them.

Signed-off-by: Sascha Hauer
Signed-off-by: Russell King

arch/arm/mach-h720x/Kconfig

@@ -27,5 +27,12 @@ config CPU_H7202
 	bool
 	help
 	  Select code specific to h7202 variants
+config H7202_SERIAL23
+	depends on CPU_H7202
+	bool "Use serial ports 2+3"
+	help
+	  Say Y here if you wish to use serial ports 2+3. They share their
+	  pins with the keyboard matrix controller, so you have to decide.
+
 
 endif

arch/arm/mach-h720x/cpu-h7202.c

@@ -5,7 +5,7 @@
  *               2003 Robert Schwebel <r.schwebel@pengutronix.de>
  *               2004 Sascha Hauer    <s.hauer@pengutronix.de>
  *
- * processor specific stuff for the Hynix h7201
+ * processor specific stuff for the Hynix h7202
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -48,7 +48,8 @@ static struct platform_device h7202ps2_device = {
 
 static struct plat_serial8250_port serial_platform_data[] = {
 	{
-		.membase	= SERIAL0_BASE,
+		.membase	= (void*)SERIAL0_VIRT,
+		.mapbase	= SERIAL0_BASE,
 		.irq		= IRQ_UART0,
 		.uartclk	= 2*1843200,
 		.regshift	= 2,
@@ -56,15 +57,18 @@ static struct plat_serial8250_port serial_platform_data[] = {
 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 	},
 	{
-		.membase	= SERIAL1_BASE,
+		.membase	= (void*)SERIAL1_VIRT,
+		.mapbase	= SERIAL1_BASE,
 		.irq		= IRQ_UART1,
 		.uartclk	= 2*1843200,
 		.regshift	= 2,
 		.iotype		= UPIO_MEM,
 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 	},
+#ifdef CONFIG_H7202_SERIAL23
 	{
-		.membase	= SERIAL2_BASE,
+		.membase	= (void*)SERIAL2_VIRT,
+		.mapbase	= SERIAL2_BASE,
 		.irq		= IRQ_UART2,
 		.uartclk	= 2*1843200,
 		.regshift	= 2,
@@ -72,13 +76,15 @@ static struct plat_serial8250_port serial_platform_data[] = {
 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 	},
 	{
-		.membase	= SERIAL3_BASE,
+		.membase	= (void*)SERIAL3_VIRT,
+		.mapbase	= SERIAL3_BASE,
 		.irq		= IRQ_UART3,
 		.uartclk	= 2*1843200,
 		.regshift	= 2,
 		.iotype		= UPIO_MEM,
 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 	},
+#endif
 	{ },
 };
 
@@ -210,5 +216,13 @@ void __init init_hw_h7202(void)
 	/* Enable clocks */
 	CPU_REG (PMU_BASE, PMU_PLL_CTRL) |= PLL_2_EN | PLL_1_EN | PLL_3_MUTE;
 
+	CPU_REG (SERIAL0_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN;
+	CPU_REG (SERIAL1_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN;
+#ifdef CONFIG_H7202_SERIAL23
+	CPU_REG (SERIAL2_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN;
+	CPU_REG (SERIAL3_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN;
+	CPU_IO (GPIO_AMULSEL) = AMULSEL_USIN2 | AMULSEL_USOUT2 |
+	                        AMULSEL_USIN3 | AMULSEL_USOUT3;
+#endif
 	(void) platform_add_devices(devices, ARRAY_SIZE(devices));
 }

include/asm-arm/arch-h720x/h7202-regs.h

@@ -17,8 +17,12 @@
  * which is included by this file.
  */
 
-#define SERIAL2_VIRT 		(IO_VIRT + 0x2d000)
-#define SERIAL3_VIRT 		(IO_VIRT + 0x2e000)
+#define SERIAL2_OFS		0x2d000
+#define SERIAL2_BASE		(IO_PHYS + SERIAL2_OFS)
+#define SERIAL2_VIRT 		(IO_VIRT + SERIAL2_OFS)
+#define SERIAL3_OFS		0x2e000
+#define SERIAL3_BASE		(IO_PHYS + SERIAL3_OFS)
+#define SERIAL3_VIRT 		(IO_VIRT + SERIAL3_OFS)
 
 /* Matrix Keyboard Controller */
 #define KBD_VIRT		(IO_VIRT + 0x22000)

include/asm-arm/arch-h720x/hardware.h

@@ -52,7 +52,15 @@
 #define GPIO_C_VIRT		(GPIO_VIRT(2))
 #define GPIO_D_VIRT		(GPIO_VIRT(3))
 #define GPIO_E_VIRT		(GPIO_VIRT(4))
-#define GPIO_AMULSEL		(GPIO_VIRT + 0xA4)
+#define GPIO_AMULSEL		(GPIO_VIRT(0) + 0xA4)
+
+#define AMULSEL_USIN2	(1<<5)
+#define AMULSEL_USOUT2	(1<<6)
+#define AMULSEL_USIN3	(1<<13)
+#define AMULSEL_USOUT3	(1<<14)
+#define AMULSEL_IRDIN	(1<<15)
+#define AMULSEL_IRDOUT	(1<<7)
+
 /* Register offsets general purpose I/O */
 #define GPIO_DATA		0x00
 #define GPIO_DIR		0x04
@@ -162,14 +170,16 @@
 #define LCD_PALETTE_BASE 	(IO_VIRT + 0x10400)
 
 /* Serial ports */
-#define SERIAL0_VIRT 		(IO_VIRT + 0x20000)
-#define SERIAL1_VIRT 		(IO_VIRT + 0x21000)
+#define SERIAL0_OFS		0x20000
+#define SERIAL0_VIRT 		(IO_VIRT + SERIAL0_OFS)
+#define SERIAL0_BASE		(IO_PHYS + SERIAL0_OFS)
 
-#define SERIAL0_BASE		SERIAL0_VIRT
-#define SERIAL1_BASE		SERIAL1_VIRT
-#define SERIAL2_BASE		SERIAL2_VIRT
-#define SERIAL3_BASE		SERIAL3_VIRT
+#define SERIAL1_OFS		0x21000
+#define SERIAL1_VIRT 		(IO_VIRT + SERIAL1_OFS)
+#define SERIAL1_BASE		(IO_PHYS + SERIAL1_OFS)
 
+#define SERIAL_ENABLE		0x30
+#define SERIAL_ENABLE_EN	(1<<0)
 
 /* General defines to pacify gcc */
 #define PCIO_BASE 		(0)	/* for inb, outb and friends */