Commit 055223d4 authored by Claudiu Manoil's avatar Claudiu Manoil Committed by Shawn Guo

ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWR

This enables the available eTSEC ethernet ports for the
ls1021aqds and ls1021atwr boards.
For the QDS, SGMII connections (via riser cards) are assumed
for the eTSEC0 and eTSEC1 ports as default configuration.
Signed-off-by: default avatarAlison Wang <alison.wang@freescale.com>
Signed-off-by: default avatarClaudiu Manoil <claudiu.manoil@freescale.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent d69cb5d7
......@@ -124,6 +124,26 @@ dspiflash: at45db021d@0 {
};
};
&enet0 {
tbi-handle = <&tbi0>;
phy-handle = <&sgmii_phy1c>;
phy-connection-type = "sgmii";
status = "okay";
};
&enet1 {
tbi-handle = <&tbi0>;
phy-handle = <&sgmii_phy1d>;
phy-connection-type = "sgmii";
status = "okay";
};
&enet2 {
phy-handle = <&rgmii_phy3>;
phy-connection-type = "rgmii-id";
status = "okay";
};
&i2c0 {
status = "okay";
......
......@@ -122,6 +122,26 @@ dspiflash: s25fl064k@0 {
};
};
&enet0 {
tbi-handle = <&tbi1>;
phy-handle = <&sgmii_phy2>;
phy-connection-type = "sgmii";
status = "okay";
};
&enet1 {
tbi-handle = <&tbi1>;
phy-handle = <&sgmii_phy0>;
phy-connection-type = "sgmii";
status = "okay";
};
&enet2 {
phy-handle = <&rgmii_phy1>;
phy-connection-type = "rgmii-id";
status = "okay";
};
&i2c0 {
status = "okay";
};
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment