Commit 0560cf5a authored by Russell King's avatar Russell King Committed by Russell King

[ARM] Add a common typesafe __io implementation

As Al did for Versatile in 2ad4f86b,
add a typesafe __io implementation for platforms to use.  Convert
platforms to use this new simple typesafe implementation.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent cd32a48d
......@@ -79,6 +79,14 @@ extern void __iounmap(volatile void __iomem *addr);
*/
extern void __readwrite_bug(const char *fn);
/*
* A typesafe __io() helper
*/
static inline void __iomem *__typesafe_io(unsigned long addr)
{
return (void __iomem *)addr;
}
/*
* Now, pick up the machine-defined IO definitions
*/
......
......@@ -12,7 +12,7 @@
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -23,8 +23,8 @@
#define IO_SPACE_LIMIT 0xFFFFFFFF
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#ifndef __ASSEMBLY__
......
......@@ -22,8 +22,8 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
/*
* We don't support ins[lb]/outs[lb]. Make them fault.
......
......@@ -29,8 +29,7 @@
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define PCIO_BASE 0
#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
......
......@@ -4,5 +4,5 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem *)(p))
#define __mem_pci(p) (p)
#define __io(p) __typesafe_io(p)
#define __mem_pci(p) (p)
......@@ -16,7 +16,7 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -22,7 +22,7 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -239,7 +239,7 @@ __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
#ifndef CONFIG_PCI
#define __io(v) v
#define __io(v) __typesafe_io(v)
#else
......
......@@ -13,7 +13,7 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -15,11 +15,7 @@
/*
* There are not real ISA nor PCI buses, so we fake it.
*/
static inline void __iomem *__io(unsigned long addr)
{
return (void __iomem *)addr;
}
#define __io(a) __io(a)
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -14,7 +14,7 @@
#define IO_SPACE_LIMIT 0xffffffff
/* No ISA or PCI bus on this machine. */
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif /* __ASM_ARCH_IO_H */
......@@ -23,11 +23,7 @@
void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
static inline void __iomem *__io(unsigned long addr)
{
return (void __iomem *)addr;
}
#define __io(a) __io(a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -22,7 +22,7 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -13,7 +13,7 @@
#define IO_SPACE_LIMIT 0xffffffff /* XXX */
#define __io(a) ((void __iomem *)(a))
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#define __mem_isa(a) (IO_BASE + (a))
......
......@@ -38,14 +38,9 @@ __arch_iounmap(void __iomem *addr)
__iounmap(addr);
}
static inline void __iomem *__io(unsigned long addr)
{
return (void __iomem *)addr;
}
#define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m)
#define __arch_iounmap(a) __arch_iounmap(a)
#define __io(a) __io(a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
......
......@@ -15,7 +15,7 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -12,7 +12,7 @@
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -22,12 +22,7 @@
#define IO_SPACE_LIMIT 0xffffffff
static inline void __iomem *__io(unsigned long addr)
{
return (void __iomem *)addr;
}
#define __io(a) __io(a)
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -16,11 +16,7 @@
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
static inline void __iomem *__io(unsigned long addr)
{
return (void __iomem *)addr;
}
#define __io(a) __io(a)
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -22,11 +22,7 @@
#define IO_SPACE_LIMIT 0xffffffff
static inline void __iomem *__io(unsigned long addr)
{
return (void __iomem *)addr;
}
#define __io(a) __io(a)
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -35,8 +35,8 @@ __mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
#endif
/* io address mapping macro */
#define __io(a) ((void __iomem *)(a))
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#define __mem_pci(a) (a)
#endif
......@@ -42,8 +42,8 @@
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
/*
* ----------------------------------------------------------------------------
......@@ -51,8 +51,6 @@
* ----------------------------------------------------------------------------
*/
#define PCIO_BASE 0
#if defined(CONFIG_ARCH_OMAP1)
#define IO_PHYS 0xFFFB0000
......
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