Commit 05c34837 authored by Chris Wilson's avatar Chris Wilson

drm/i915: Skip final clflush if LLC is coherent

If the LLC is coherent with the object, we do not need to worry about
whether main memory and cache mismatch when we hand the object back to
the system.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161118211747.25197-2-chris@chris-wilson.co.uk
parent a6a7cc4b
...@@ -229,7 +229,8 @@ __i915_gem_object_release_shmem(struct drm_i915_gem_object *obj, ...@@ -229,7 +229,8 @@ __i915_gem_object_release_shmem(struct drm_i915_gem_object *obj,
if (obj->mm.madv == I915_MADV_DONTNEED) if (obj->mm.madv == I915_MADV_DONTNEED)
obj->mm.dirty = false; obj->mm.dirty = false;
if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0) if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0 &&
!cpu_cache_is_coherent(obj->base.dev, obj->cache_level))
drm_clflush_sg(pages); drm_clflush_sg(pages);
obj->base.read_domains = I915_GEM_DOMAIN_CPU; obj->base.read_domains = I915_GEM_DOMAIN_CPU;
......
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