Commit 05e62b6b authored by George Shen's avatar George Shen Committed by Alex Deucher

drm/amd/display: Filter out YCbCr420 timing if VSC SDP not supported

[Why]
Per DP specification, YCbCr420 shall use VSC SDP.

[How]
For YCbCr420 timings, fail DP mode timing validation
if DPCD caps do not indicate VSC SDP colorimetry
support.
Signed-off-by: default avatarGeorge Shen <george.shen@amd.com>
Reviewed-by: default avatarWenjing Liu <Wenjing.Liu@amd.com>
Acked-by: default avatarWayne Lin <Wayne.Lin@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 70c14a1d
......@@ -2411,6 +2411,12 @@ bool dp_validate_mode_timing(
const struct dc_link_settings *link_setting;
/* According to spec, VSC SDP should be used if pixel format is YCbCr420 */
if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420 &&
!link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED &&
dal_graphics_object_id_get_connector_id(link->link_id) != CONNECTOR_ID_VIRTUAL)
return false;
/*always DP fail safe mode*/
if ((timing->pix_clk_100hz / 10) == (uint32_t) 25175 &&
timing->h_addressable == (uint32_t) 640 &&
......
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