Commit 07373a5c authored by Henryk Dembkowski's avatar Henryk Dembkowski Committed by Dan Williams

isci: add support for 2 more oem parmeters

1/ add OEM paramater support for mode_type (MPC vs APC)
2/ add OEM parameter support for max_number_concurrent_device_spin_up
3/ cleanup scic_sds_controller_start_next_phy

todo: hook up the amp control afe parameters into the afe init code
Signed-off-by: default avatarHenryk Dembkowski <henryk.dembkowski@intel.com>
Signed-off-by: default avatarJacek Danecki <Jacek.Danecki@intel.com>
[cleaned up scic_sds_controller_start_next_phy]
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 8db37aab
...@@ -224,6 +224,8 @@ union scic_user_parameters { ...@@ -224,6 +224,8 @@ union scic_user_parameters {
*/ */
#define SCIC_SDS_PARM_PHY_MASK_MAX 0xF #define SCIC_SDS_PARM_PHY_MASK_MAX 0xF
#define MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT 4
/** /**
* This structure/union specifies the various different OEM parameter sets * This structure/union specifies the various different OEM parameter sets
* available. Each type is specific to a hardware controller version. * available. Each type is specific to a hardware controller version.
...@@ -237,7 +239,6 @@ union scic_oem_parameters { ...@@ -237,7 +239,6 @@ union scic_oem_parameters {
* 1. * 1.
*/ */
struct scic_sds_oem_params sds1; struct scic_sds_oem_params sds1;
}; };
/** /**
......
...@@ -121,23 +121,6 @@ enum SCIC_SDS_CONTROLLER_MEMORY_DESCRIPTORS { ...@@ -121,23 +121,6 @@ enum SCIC_SDS_CONTROLLER_MEMORY_DESCRIPTORS {
}; };
/**
*
*
* Allowed PORT configuration modes APC Automatic PORT configuration mode is
* defined by the OEM configuration parameters providing no PHY_MASK parameters
* for any PORT. i.e. There are no phys assigned to any of the ports at start.
* MPC Manual PORT configuration mode is defined by the OEM configuration
* parameters providing a PHY_MASK value for any PORT. It is assumed that any
* PORT with no PHY_MASK is an invalid port and not all PHYs must be assigned.
* A PORT_PHY mask that assigns just a single PHY to a port and no other PHYs
* being assigned is sufficient to declare manual PORT configuration.
*/
enum SCIC_PORT_CONFIGURATION_MODE {
SCIC_PORT_MANUAL_CONFIGURATION_MODE,
SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE
};
/** /**
* struct scic_power_control - * struct scic_power_control -
* *
...@@ -163,6 +146,11 @@ struct scic_power_control { ...@@ -163,6 +146,11 @@ struct scic_power_control {
*/ */
u8 phys_waiting; u8 phys_waiting;
/**
* This field is used to keep track of how many phys have been granted to consume power
*/
u8 phys_granted_power;
/** /**
* This field is an array of phys that we are waiting on. The phys are direct * This field is an array of phys that we are waiting on. The phys are direct
* mapped into requesters via struct scic_sds_phy.phy_index * mapped into requesters via struct scic_sds_phy.phy_index
...@@ -560,14 +548,6 @@ u32 scic_sds_controller_get_object_size(void); ...@@ -560,14 +548,6 @@ u32 scic_sds_controller_get_object_size(void);
/* --------------------------------------------------------------------------- */ /* --------------------------------------------------------------------------- */
/* --------------------------------------------------------------------------- */
enum SCIC_PORT_CONFIGURATION_MODE scic_sds_controller_get_port_configuration_mode(
struct scic_sds_controller *this_controller);
/* --------------------------------------------------------------------------- */
void scic_sds_controller_post_request( void scic_sds_controller_post_request(
struct scic_sds_controller *this_controller, struct scic_sds_controller *this_controller,
u32 request); u32 request);
......
...@@ -822,7 +822,7 @@ enum sci_status scic_sds_port_configuration_agent_initialize( ...@@ -822,7 +822,7 @@ enum sci_status scic_sds_port_configuration_agent_initialize(
enum sci_status status = SCI_SUCCESS; enum sci_status status = SCI_SUCCESS;
enum SCIC_PORT_CONFIGURATION_MODE mode; enum SCIC_PORT_CONFIGURATION_MODE mode;
mode = scic_sds_controller_get_port_configuration_mode(controller); mode = controller->oem_parameters.sds1.controller.mode_type;
if (mode == SCIC_PORT_MANUAL_CONFIGURATION_MODE) { if (mode == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
status = scic_sds_mpc_agent_validate_phy_configuration(controller, port_agent); status = scic_sds_mpc_agent_validate_phy_configuration(controller, port_agent);
......
#ifndef _CREATE_FW_H_ #ifndef _CREATE_FW_H_
#define _CREATE_FW_H_ #define _CREATE_FW_H_
#include "../probe_roms.h"
/* we are configuring for 2 SCUs */ /* we are configuring for 2 SCUs */
...@@ -24,16 +25,16 @@ static const int num_elements = 2; ...@@ -24,16 +25,16 @@ static const int num_elements = 2;
* if there is a port/phy on which you do not wish to override the default * if there is a port/phy on which you do not wish to override the default
* values, use the value assigned to UNINIT_PARAM (255). * values, use the value assigned to UNINIT_PARAM (255).
*/ */
/* discovery mode type (port auto config mode by default ) */
#ifdef MPC #ifdef MPC
static const int mode_type = SCIC_PORT_MANUAL_CONFIGURATION_MODE;
static const __u8 phy_mask[2][4] = { {1, 2, 4, 8}, static const __u8 phy_mask[2][4] = { {1, 2, 4, 8},
{1, 2, 4, 8} }; {1, 2, 4, 8} };
#else /* APC (default) */ #else /* APC (default) */
static const int mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
static const __u8 phy_mask[2][4]; static const __u8 phy_mask[2][4];
#endif #endif
/* discovery mode type (port auto config mode by default ) */
static const int mode_type;
/* Maximum number of concurrent device spin up */ /* Maximum number of concurrent device spin up */
static const int max_num_concurrent_dev_spin_up = 1; static const int max_num_concurrent_dev_spin_up = 1;
......
...@@ -86,6 +86,20 @@ struct isci_orom *isci_get_efi_var(struct pci_dev *pdev); ...@@ -86,6 +86,20 @@ struct isci_orom *isci_get_efi_var(struct pci_dev *pdev);
#define ISCI_EFI_ATTRIBUTES 0 #define ISCI_EFI_ATTRIBUTES 0
#define ISCI_EFI_VAR_NAME "isci_oemb" #define ISCI_EFI_VAR_NAME "isci_oemb"
/* Allowed PORT configuration modes APC Automatic PORT configuration mode is
* defined by the OEM configuration parameters providing no PHY_MASK parameters
* for any PORT. i.e. There are no phys assigned to any of the ports at start.
* MPC Manual PORT configuration mode is defined by the OEM configuration
* parameters providing a PHY_MASK value for any PORT. It is assumed that any
* PORT with no PHY_MASK is an invalid port and not all PHYs must be assigned.
* A PORT_PHY mask that assigns just a single PHY to a port and no other PHYs
* being assigned is sufficient to declare manual PORT configuration.
*/
enum SCIC_PORT_CONFIGURATION_MODE {
SCIC_PORT_MANUAL_CONFIGURATION_MODE = 0,
SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE = 1
};
struct sci_bios_oem_param_block_hdr { struct sci_bios_oem_param_block_hdr {
uint8_t signature[ISCI_ROM_SIG_SIZE]; uint8_t signature[ISCI_ROM_SIG_SIZE];
uint16_t total_block_length; uint16_t total_block_length;
......
:10000000495343554F454D42E70017100002000089 :10000000495343554F454D42E70017100002000089
:10001000000000000000000001000000000000FFE0 :10001000000000000000000101000000000000FFDF
:10002000FFCF5F000000F0000000000000000000B3 :10002000FFCF5F000000F0000000000000000000B3
:1000300000000000000000FFFFCF5F000000F100A3 :1000300000000000000000FFFFCF5F000000F100A3
:10004000000000000000000000000000000000FFB1 :10004000000000000000000000000000000000FFB1
:10005000FFCF5F000000F200000000000000000081 :10005000FFCF5F000000F200000000000000000081
:1000600000000000000000FFFFCF5F000000F30071 :1000600000000000000000FFFFCF5F000000F30071
:100070000000000000000000000000000000000080 :10007000000000000000000000000000000000017F
:1000800001000000000000FFFFCF5F000000F4004F :1000800001000000000000FFFFCF5F000000F4004F
:10009000000000000000000000000000000000FF61 :10009000000000000000000000000000000000FF61
:1000A000FFCF5F000000F50000000000000000002E :1000A000FFCF5F000000F50000000000000000002E
......
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