Commit 076fcb17 authored by Mark Brown's avatar Mark Brown

Merge remote-tracking branches 'spi/topic/ath97', 'spi/topic/atmel',...

Merge remote-tracking branches 'spi/topic/ath97', 'spi/topic/atmel', 'spi/topic/au1550', 'spi/topic/bcm2835' and 'spi/topic/bcm2835aux' into spi-next
Broadcom BCM2835 auxiliar SPI1/2 controller
The BCM2835 contains two forms of SPI master controller, one known simply as
SPI0, and the other known as the "Universal SPI Master"; part of the
auxiliary block. This binding applies to the SPI1/2 controller.
Required properties:
- compatible: Should be "brcm,bcm2835-aux-spi".
- reg: Should contain register location and length for the spi block
- interrupts: Should contain shared interrupt of the aux block
- clocks: The clock feeding the SPI controller - needs to
point to the auxiliar clock driver of the bcm2835,
as this clock will enable the output gate for the specific
clock.
- cs-gpios: the cs-gpios (native cs is NOT supported)
see also spi-bus.txt
Example:
spi1@7e215080 {
compatible = "brcm,bcm2835-aux-spi";
reg = <0x7e215080 0x40>;
interrupts = <1 29>;
clocks = <&aux_clocks BCM2835_AUX_CLOCK_SPI1>;
#address-cells = <1>;
#size-cells = <0>;
cs-gpios = <&gpio 18>, <&gpio 17>, <&gpio 16>;
};
spi2@7e2150c0 {
compatible = "brcm,bcm2835-aux-spi";
reg = <0x7e2150c0 0x40>;
interrupts = <1 29>;
clocks = <&aux_clocks BCM2835_AUX_CLOCK_SPI2>;
#address-cells = <1>;
#size-cells = <0>;
cs-gpios = <&gpio 43>, <&gpio 44>, <&gpio 45>;
};
......@@ -88,6 +88,17 @@ config SPI_BCM2835
is for the regular SPI controller. Slave mode operation is not also
not supported.
config SPI_BCM2835AUX
tristate "BCM2835 SPI auxiliary controller"
depends on ARCH_BCM2835 || COMPILE_TEST
depends on GPIOLIB
help
This selects a driver for the Broadcom BCM2835 SPI aux master.
The BCM2835 contains two types of SPI master controller; the
"universal SPI master", and the regular SPI controller.
This driver is for the universal/auxiliary SPI controller.
config SPI_BFIN5XX
tristate "SPI controller driver for ADI Blackfin5xx"
depends on BLACKFIN && !BF60x
......
......@@ -15,6 +15,7 @@ obj-$(CONFIG_SPI_ATMEL) += spi-atmel.o
obj-$(CONFIG_SPI_ATH79) += spi-ath79.o
obj-$(CONFIG_SPI_AU1550) += spi-au1550.o
obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o
obj-$(CONFIG_SPI_BCM2835AUX) += spi-bcm2835aux.o
obj-$(CONFIG_SPI_BCM53XX) += spi-bcm53xx.o
obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o
obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o
......
......@@ -240,14 +240,9 @@ static int ath79_spi_probe(struct platform_device *pdev)
sp->bitbang.flags = SPI_CS_HIGH;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (r == NULL) {
ret = -ENOENT;
goto err_put_master;
}
sp->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
if (!sp->base) {
ret = -ENXIO;
sp->base = devm_ioremap_resource(&pdev->dev, r);
if (IS_ERR(sp->base)) {
ret = PTR_ERR(sp->base);
goto err_put_master;
}
......
......@@ -872,14 +872,7 @@ static int atmel_spi_set_xfer_speed(struct atmel_spi *as,
* Calculate the lowest divider that satisfies the
* constraint, assuming div32/fdiv/mbz == 0.
*/
if (xfer->speed_hz)
scbr = DIV_ROUND_UP(bus_hz, xfer->speed_hz);
else
/*
* This can happend if max_speed is null.
* In this case, we set the lowest possible speed
*/
scbr = 0xff;
scbr = DIV_ROUND_UP(bus_hz, xfer->speed_hz);
/*
* If the resulting divider doesn't fit into the
......@@ -1301,14 +1294,12 @@ static int atmel_spi_one_transfer(struct spi_master *master,
return -EINVAL;
}
if (xfer->bits_per_word) {
asd = spi->controller_state;
bits = (asd->csr >> 4) & 0xf;
if (bits != xfer->bits_per_word - 8) {
dev_dbg(&spi->dev,
asd = spi->controller_state;
bits = (asd->csr >> 4) & 0xf;
if (bits != xfer->bits_per_word - 8) {
dev_dbg(&spi->dev,
"you can't yet change bits_per_word in transfers\n");
return -ENOPROTOOPT;
}
return -ENOPROTOOPT;
}
/*
......
......@@ -233,13 +233,12 @@ static int au1550_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t)
unsigned bpw, hz;
u32 cfg, stat;
bpw = spi->bits_per_word;
hz = spi->max_speed_hz;
if (t) {
if (t->bits_per_word)
bpw = t->bits_per_word;
if (t->speed_hz)
hz = t->speed_hz;
bpw = t->bits_per_word;
hz = t->speed_hz;
} else {
bpw = spi->bits_per_word;
hz = spi->max_speed_hz;
}
if (!hz)
......
......@@ -777,7 +777,7 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
goto out_master_put;
}
bs->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
bs->irq = platform_get_irq(pdev, 0);
if (bs->irq <= 0) {
dev_err(&pdev->dev, "could not get IRQ: %d\n", bs->irq);
err = bs->irq ? bs->irq : -ENODEV;
......@@ -786,6 +786,12 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
clk_prepare_enable(bs->clk);
bcm2835_dma_init(master, &pdev->dev);
/* initialise the hardware with the default polarities */
bcm2835_wr(bs, BCM2835_SPI_CS,
BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
err = devm_request_irq(&pdev->dev, bs->irq, bcm2835_spi_interrupt, 0,
dev_name(&pdev->dev), master);
if (err) {
......@@ -793,12 +799,6 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
goto out_clk_disable;
}
bcm2835_dma_init(master, &pdev->dev);
/* initialise the hardware with the default polarities */
bcm2835_wr(bs, BCM2835_SPI_CS,
BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
err = devm_spi_register_master(&pdev->dev, master);
if (err) {
dev_err(&pdev->dev, "could not register SPI master: %d\n", err);
......
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