Commit 07ce734d authored by Kan Liang's avatar Kan Liang Committed by Ingo Molnar

perf/x86/intel/uncore: Clean up client IMC

The client IMC block is accessed by MMIO. Current code uses an informal
way to access the block, which is not recommended.

Clean up the code by using __iomem annotation and the accessor
functions (read[lq]()).

Move exit_box() and read_counter() to generic code, which can be shared
with the server code later.
Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: acme@kernel.org
Cc: eranian@google.com
Link: https://lkml.kernel.org/r/1556672028-119221-6-git-send-email-kan.liang@linux.intel.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 3da04b8a
...@@ -120,6 +120,21 @@ u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *eve ...@@ -120,6 +120,21 @@ u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *eve
return count; return count;
} }
void uncore_mmio_exit_box(struct intel_uncore_box *box)
{
if (box->io_addr)
iounmap(box->io_addr);
}
u64 uncore_mmio_read_counter(struct intel_uncore_box *box,
struct perf_event *event)
{
if (!box->io_addr)
return 0;
return readq(box->io_addr + event->hw.event_base);
}
/* /*
* generic get constraint function for shared match/mask registers. * generic get constraint function for shared match/mask registers.
*/ */
......
...@@ -2,6 +2,7 @@ ...@@ -2,6 +2,7 @@
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/pci.h> #include <linux/pci.h>
#include <asm/apicdef.h> #include <asm/apicdef.h>
#include <linux/io-64-nonatomic-lo-hi.h>
#include <linux/perf_event.h> #include <linux/perf_event.h>
#include "../perf_event.h" #include "../perf_event.h"
...@@ -128,7 +129,7 @@ struct intel_uncore_box { ...@@ -128,7 +129,7 @@ struct intel_uncore_box {
struct hrtimer hrtimer; struct hrtimer hrtimer;
struct list_head list; struct list_head list;
struct list_head active_list; struct list_head active_list;
void *io_addr; void __iomem *io_addr;
struct intel_uncore_extra_reg shared_regs[0]; struct intel_uncore_extra_reg shared_regs[0];
}; };
...@@ -502,6 +503,9 @@ static inline struct intel_uncore_box *uncore_event_to_box(struct perf_event *ev ...@@ -502,6 +503,9 @@ static inline struct intel_uncore_box *uncore_event_to_box(struct perf_event *ev
struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu); struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *event); u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *event);
void uncore_mmio_exit_box(struct intel_uncore_box *box);
u64 uncore_mmio_read_counter(struct intel_uncore_box *box,
struct perf_event *event);
void uncore_pmu_start_hrtimer(struct intel_uncore_box *box); void uncore_pmu_start_hrtimer(struct intel_uncore_box *box);
void uncore_pmu_cancel_hrtimer(struct intel_uncore_box *box); void uncore_pmu_cancel_hrtimer(struct intel_uncore_box *box);
void uncore_pmu_event_start(struct perf_event *event, int flags); void uncore_pmu_event_start(struct perf_event *event, int flags);
......
...@@ -428,11 +428,6 @@ static void snb_uncore_imc_init_box(struct intel_uncore_box *box) ...@@ -428,11 +428,6 @@ static void snb_uncore_imc_init_box(struct intel_uncore_box *box)
box->hrtimer_duration = UNCORE_SNB_IMC_HRTIMER_INTERVAL; box->hrtimer_duration = UNCORE_SNB_IMC_HRTIMER_INTERVAL;
} }
static void snb_uncore_imc_exit_box(struct intel_uncore_box *box)
{
iounmap(box->io_addr);
}
static void snb_uncore_imc_enable_box(struct intel_uncore_box *box) static void snb_uncore_imc_enable_box(struct intel_uncore_box *box)
{} {}
...@@ -445,13 +440,6 @@ static void snb_uncore_imc_enable_event(struct intel_uncore_box *box, struct per ...@@ -445,13 +440,6 @@ static void snb_uncore_imc_enable_event(struct intel_uncore_box *box, struct per
static void snb_uncore_imc_disable_event(struct intel_uncore_box *box, struct perf_event *event) static void snb_uncore_imc_disable_event(struct intel_uncore_box *box, struct perf_event *event)
{} {}
static u64 snb_uncore_imc_read_counter(struct intel_uncore_box *box, struct perf_event *event)
{
struct hw_perf_event *hwc = &event->hw;
return (u64)*(unsigned int *)(box->io_addr + hwc->event_base);
}
/* /*
* Keep the custom event_init() function compatible with old event * Keep the custom event_init() function compatible with old event
* encoding for free running counters. * encoding for free running counters.
...@@ -578,13 +566,13 @@ static struct pmu snb_uncore_imc_pmu = { ...@@ -578,13 +566,13 @@ static struct pmu snb_uncore_imc_pmu = {
static struct intel_uncore_ops snb_uncore_imc_ops = { static struct intel_uncore_ops snb_uncore_imc_ops = {
.init_box = snb_uncore_imc_init_box, .init_box = snb_uncore_imc_init_box,
.exit_box = snb_uncore_imc_exit_box, .exit_box = uncore_mmio_exit_box,
.enable_box = snb_uncore_imc_enable_box, .enable_box = snb_uncore_imc_enable_box,
.disable_box = snb_uncore_imc_disable_box, .disable_box = snb_uncore_imc_disable_box,
.disable_event = snb_uncore_imc_disable_event, .disable_event = snb_uncore_imc_disable_event,
.enable_event = snb_uncore_imc_enable_event, .enable_event = snb_uncore_imc_enable_event,
.hw_config = snb_uncore_imc_hw_config, .hw_config = snb_uncore_imc_hw_config,
.read_counter = snb_uncore_imc_read_counter, .read_counter = uncore_mmio_read_counter,
}; };
static struct intel_uncore_type snb_uncore_imc = { static struct intel_uncore_type snb_uncore_imc = {
......
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