Commit 07de07de authored by Linus Torvalds's avatar Linus Torvalds

Merge http://linux-isdn.bkbits.net/linux-2.5.make

into home.transmeta.com:/home/torvalds/v2.5/linux
parents 4d6b10c5 2eb80fd2
......@@ -53,9 +53,12 @@ The following processors for the x86 architecture are supported by cpufreq:
AMD Elan - SC400, SC410
AMD mobile K6-2+
AMD mobile K6-3+
AMD mobile Duron
AMD mobile Athlon
Cyrix Media GXm
Intel mobile PIII [*] and Intel mobile PIII-M on certain chipsets
Intel Pentium 4, Intel Xeon
Intel Pentium M (Centrino)
National Semiconductors Geode GX
Transmeta Crusoe
VIA Cyrix 3 / C3
......@@ -117,7 +120,7 @@ the processor shall run at.
The preferred interface is located in the sysfs filesystem. If you
mounted it at /sys, the cpufreq interface is located in a subdirectory
"cpufreq" within the cpu-device directory
(e.g. /sys/devices/sys/cpu0/cpufreq/ for the first CPU).
(e.g. /sys/class/cpu/cpu0/cpufreq/ for the first CPU).
cpuinfo_min_freq : this file shows the minimum operating
frequency the processor can run at(in kHz)
......
......@@ -74,6 +74,9 @@ SECTIONS
__con_initcall_end = .;
}
. = ALIGN(8);
SECURITY_INIT
. = ALIGN(64);
__per_cpu_start = .;
.data.percpu : { *(.data.percpu) }
......
......@@ -43,6 +43,7 @@ SECTIONS
__con_initcall_start = .;
*(.con_initcall.init)
__con_initcall_end = .;
SECURITY_INIT
. = ALIGN(32768);
__init_end = .;
}
......
......@@ -53,6 +53,7 @@ SECTIONS
__con_initcall_start = .;
*(.con_initcall.init)
__con_initcall_end = .;
SECURITY_INIT
. = ALIGN(32);
__initramfs_start = .;
usr/built-in.o(.init.ramfs)
......
......@@ -74,7 +74,12 @@ SECTIONS
__con_initcall_start = .;
*(.con_initcall.init)
__con_initcall_end = .;
}
.security_initcall.init : {
__security_initcall_start = .;
*(.security_initcall.init)
__security_initcall_end = .;
/* We fill to the next page, so we can discard all init
pages without needing to consider what payload might be
appended to the kernel image. */
......
......@@ -83,6 +83,7 @@ SECTIONS
___con_initcall_start = .;
*(.con_initcall.init)
___con_initcall_end = .;
SECURITY_INIT
. = ALIGN(4);
___initramfs_start = .;
*(.init.ramfs)
......
......@@ -11,7 +11,7 @@ config CPU_FREQ
fly. This is a nice method to save battery power on notebooks,
because the lower the clock speed, the less power the CPU consumes.
For more information, take a look at linux/Documentation/cpufreq or
For more information, take a look at linux/Documentation/cpu-freq or
at <http://www.brodo.de/cpufreq/>
If in doubt, say N.
......@@ -38,7 +38,7 @@ config X86_ACPI_CPUFREQ
This driver adds a CPUFreq driver which utilizes the ACPI
Processor Performance States.
For details, take a look at linux/Documentation/cpufreq.
For details, take a look at linux/Documentation/cpu-freq.
If in doubt, say N.
......@@ -63,7 +63,7 @@ config ELAN_CPUFREQ
parameter: elanfreq=maxspeed (in kHz) or as module
parameter "max_freq".
For details, take a look at linux/Documentation/cpufreq.
For details, take a look at linux/Documentation/cpu-freq.
If in doubt, say N.
......@@ -74,7 +74,7 @@ config X86_POWERNOW_K6
This adds the CPUFreq driver for mobile AMD K6-2+ and mobile
AMD K6-3+ processors.
For details, take a look at linux/Documentation/cpufreq.
For details, take a look at linux/Documentation/cpu-freq.
If in doubt, say N.
......@@ -84,7 +84,7 @@ config X86_POWERNOW_K7
help
This adds the CPUFreq driver for mobile AMD K7 mobile processors.
For details, take a look at linux/Documentation/cpufreq.
For details, take a look at linux/Documentation/cpu-freq.
If in doubt, say N.
......@@ -95,22 +95,34 @@ config X86_GX_SUSPMOD
This add the CPUFreq driver for NatSemi Geode processors which
support suspend modulation.
For details, take a look at linux/Documentation/cpufreq.
For details, take a look at linux/Documentation/cpu-freq.
If in doubt, say N.
config X86_SPEEDSTEP
config X86_SPEEDSTEP_ICH
tristate "Intel Speedstep"
depends on CPU_FREQ_TABLE
help
This adds the CPUFreq driver for certain mobile Intel Pentium III
(Coppermine), all mobile Intel Pentium III-M (Tulatin) and all
mobile Intel Pentium 4 P4-Ms.
(Coppermine), all mobile Intel Pentium III-M (Tualatin) and all
mobile Intel Pentium 4 P4-Ms, with an Intel ICH2, ICH3,
or ICH4 southbridge.
For details, take a look at linux/Documentation/cpufreq.
For details, take a look at linux/Documentation/cpu-freq.
If in doubt, say N.
config X86_SPEEDSTEP_CENTRINO
tristate "Intel Enhanced SpeedStep"
depends on CPU_FREQ_TABLE
help
This adds the CPUFreq driver for Enhanced SpeedStep enabled
mobile CPUs. This means Intel Pentium M (Centrino) CPUs.
For details, take a look at linux/Documentation/cpu-freq.
If in doubt, say N.
config X86_P4_CLOCKMOD
tristate "Intel Pentium 4 clock modulation"
depends on CPU_FREQ_TABLE
......@@ -118,7 +130,7 @@ config X86_P4_CLOCKMOD
This adds the CPUFreq driver for Intel Pentium 4 / XEON
processors.
For details, take a look at linux/Documentation/cpufreq.
For details, take a look at linux/Documentation/cpu-freq.
If in doubt, say N.
......@@ -129,7 +141,7 @@ config X86_LONGRUN
This adds the CPUFreq driver for Transmeta Crusoe processors which
support LongRun.
For details, take a look at linux/Documentation/cpufreq.
For details, take a look at linux/Documentation/cpu-freq.
If in doubt, say N.
......@@ -141,7 +153,7 @@ config X86_LONGHAUL
VIA Cyrix Samuel/C3, VIA Cyrix Ezra and VIA Cyrix Ezra-T
processors.
For details, take a look at linux/Documentation/cpufreq.
For details, take a look at linux/Documentation/cpu-freq.
If in doubt, say N.
......
obj-$(CONFIG_X86_POWERNOW_K6) += powernow-k6.o
obj-$(CONFIG_X86_POWERNOW_K7) += powernow-k7.o
obj-$(CONFIG_X86_LONGHAUL) += longhaul.o
obj-$(CONFIG_X86_SPEEDSTEP) += speedstep.o
obj-$(CONFIG_X86_P4_CLOCKMOD) += p4-clockmod.o
obj-$(CONFIG_ELAN_CPUFREQ) += elanfreq.o
obj-$(CONFIG_X86_LONGRUN) += longrun.o
obj-$(CONFIG_X86_GX_SUSPMOD) += gx-suspmod.o
obj-$(CONFIG_X86_ACPI_CPUFREQ) += acpi.o
obj-$(CONFIG_X86_SPEEDSTEP_ICH) += speedstep-ich.o
obj-$(CONFIG_X86_SPEEDSTEP_CENTRINO) += speedstep-centrino.o
ifdef CONFIG_X86_ACPI_CPUFREQ
ifdef CONFIG_ACPI_DEBUG
......
......@@ -10,7 +10,6 @@
*
* Errata 5: Processor may fail to execute a FID/VID change in presence of interrupt.
* - We cli/sti on stepping A0 CPUs around the FID/VID transition.
* (ADDENDUM: This seems to be needed on more systems, so we do it unconditionally now).
* Errata 15: Processors with half frequency multipliers may hang upon wakeup from disconnect.
* - We disable half multipliers if ACPI is used on A0 stepping CPUs.
*/
......@@ -260,7 +259,8 @@ static void change_speed (unsigned int index)
/* Now do the magic poking into the MSRs. */
__asm__("\tcli\n");
if (have_a0 == 1) /* A0 errata 5 */
__asm__("\tcli\n");
if (freqs.old > freqs.new) {
/* Going down, so change FID first */
......@@ -272,7 +272,9 @@ static void change_speed (unsigned int index)
change_FID(vid);
}
__asm__("\tsti\n");
if (have_a0 == 1)
__asm__("\tsti\n");
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
}
......
/*
* cpufreq driver for Enhanced SpeedStep, as found in Intel's Pentium
* M (part of the Centrino chipset).
*
* Despite the "SpeedStep" in the name, this is almost entirely unlike
* traditional SpeedStep.
*
* Modelled on speedstep.c
*
* Copyright (C) 2003 Jeremy Fitzhardinge <jeremy@goop.org>
*
* WARNING WARNING WARNING
*
* This driver manipulates the PERF_CTL MSR, which is only somewhat
* documented. While it seems to work on my laptop, it has not been
* tested anywhere else, and it may not work for you, do strange
* things or simply crash.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/cpufreq.h>
#include <asm/msr.h>
#include <asm/processor.h>
#include <asm/cpufeature.h>
#define PFX "speedstep-centrino: "
#define MAINTAINER "Jeremy Fitzhardinge <jeremy@goop.org>"
#define CENTRINO_DEBUG
#ifdef CENTRINO_DEBUG
#define dprintk(msg...) printk(msg)
#else
#define dprintk(msg...) do { } while(0)
#endif
struct cpu_model
{
const char *model_name;
unsigned max_freq; /* max clock in kHz */
struct cpufreq_frequency_table *op_points; /* clock/voltage pairs */
};
/* Operating points for current CPU */
static const struct cpu_model *centrino_model;
/* Computes the correct form for IA32_PERF_CTL MSR for a particular
frequency/voltage operating point; frequency in MHz, volts in mV.
This is stored as "index" in the structure. */
#define OP(mhz, mv) \
{ \
.frequency = (mhz) * 1000, \
.index = (((mhz)/100) << 8) | ((mv - 700) / 16) \
}
/*
* These voltage tables were derived from the Intel Pentium M
* datasheet, document 25261202.pdf, Table 5. I have verified they
* are consistent with my IBM ThinkPad X31, which has a 1.3GHz Pentium
* M.
*/
/* Ultra Low Voltage Intel Pentium M processor 900MHz */
static struct cpufreq_frequency_table op_900[] =
{
OP(600, 844),
OP(800, 988),
OP(900, 1004),
{ .frequency = CPUFREQ_TABLE_END }
};
/* Low Voltage Intel Pentium M processor 1.10GHz */
static struct cpufreq_frequency_table op_1100[] =
{
OP( 600, 956),
OP( 800, 1020),
OP( 900, 1100),
OP(1000, 1164),
OP(1100, 1180),
{ .frequency = CPUFREQ_TABLE_END }
};
/* Low Voltage Intel Pentium M processor 1.20GHz */
static struct cpufreq_frequency_table op_1200[] =
{
OP( 600, 956),
OP( 800, 1004),
OP( 900, 1020),
OP(1000, 1100),
OP(1100, 1164),
OP(1200, 1180),
{ .frequency = CPUFREQ_TABLE_END }
};
/* Intel Pentium M processor 1.30GHz */
static struct cpufreq_frequency_table op_1300[] =
{
OP( 600, 956),
OP( 800, 1260),
OP(1000, 1292),
OP(1200, 1356),
OP(1300, 1388),
{ .frequency = CPUFREQ_TABLE_END }
};
/* Intel Pentium M processor 1.40GHz */
static struct cpufreq_frequency_table op_1400[] =
{
OP( 600, 956),
OP( 800, 1180),
OP(1000, 1308),
OP(1200, 1436),
OP(1400, 1484),
{ .frequency = CPUFREQ_TABLE_END }
};
/* Intel Pentium M processor 1.50GHz */
static struct cpufreq_frequency_table op_1500[] =
{
OP( 600, 956),
OP( 800, 1116),
OP(1000, 1228),
OP(1200, 1356),
OP(1400, 1452),
OP(1500, 1484),
{ .frequency = CPUFREQ_TABLE_END }
};
/* Intel Pentium M processor 1.60GHz */
static struct cpufreq_frequency_table op_1600[] =
{
OP( 600, 956),
OP( 800, 1036),
OP(1000, 1164),
OP(1200, 1276),
OP(1400, 1420),
OP(1600, 1484),
{ .frequency = CPUFREQ_TABLE_END }
};
/* Intel Pentium M processor 1.70GHz */
static struct cpufreq_frequency_table op_1700[] =
{
OP( 600, 956),
OP( 800, 1004),
OP(1000, 1116),
OP(1200, 1228),
OP(1400, 1308),
OP(1700, 1484),
{ .frequency = CPUFREQ_TABLE_END }
};
#undef OP
#define CPU(max) \
{ "Intel(R) Pentium(R) M processor " #max "MHz", (max)*1000, op_##max }
/* CPU models, their operating frequency range, and freq/voltage
operating points */
static const struct cpu_model models[] =
{
CPU( 900),
CPU(1100),
CPU(1200),
CPU(1300),
CPU(1400),
CPU(1500),
CPU(1600),
CPU(1700),
{ 0, }
};
#undef CPU
/* Extract clock in kHz from PERF_CTL value */
static unsigned extract_clock(unsigned msr)
{
msr = (msr >> 8) & 0xff;
return msr * 100000;
}
/* Return the current CPU frequency in kHz */
static unsigned get_cur_freq(void)
{
unsigned l, h;
rdmsr(MSR_IA32_PERF_STATUS, l, h);
return extract_clock(l);
}
static int centrino_cpu_init(struct cpufreq_policy *policy)
{
unsigned freq;
if (policy->cpu != 0 || centrino_model == NULL)
return -ENODEV;
freq = get_cur_freq();
policy->policy = (freq == centrino_model->max_freq) ?
CPUFREQ_POLICY_PERFORMANCE :
CPUFREQ_POLICY_POWERSAVE;
policy->cpuinfo.transition_latency = 10; /* 10uS transition latency */
policy->cur = freq;
dprintk(KERN_INFO PFX "centrino_cpu_init: policy=%d cur=%dkHz\n",
policy->policy, policy->cur);
return cpufreq_frequency_table_cpuinfo(policy, centrino_model->op_points);
}
/**
* centrino_verify - verifies a new CPUFreq policy
* @freq: new policy
*
* Limit must be within this model's frequency range at least one
* border included.
*/
static int centrino_verify (struct cpufreq_policy *policy)
{
return cpufreq_frequency_table_verify(policy, centrino_model->op_points);
}
/**
* centrino_setpolicy - set a new CPUFreq policy
* @policy: new policy
*
* Sets a new CPUFreq policy.
*/
static int centrino_target (struct cpufreq_policy *policy,
unsigned int target_freq,
unsigned int relation)
{
unsigned int newstate = 0;
unsigned int msr, oldmsr, h;
struct cpufreq_freqs freqs;
if (centrino_model == NULL)
return -ENODEV;
if (cpufreq_frequency_table_target(policy, centrino_model->op_points, target_freq,
relation, &newstate))
return -EINVAL;
msr = centrino_model->op_points[newstate].index;
rdmsr(MSR_IA32_PERF_CTL, oldmsr, h);
if (msr == (oldmsr & 0xffff))
return 0;
/* Hm, old frequency can either be the last value we put in
PERF_CTL, or whatever it is now. The trouble is that TM2
can change it behind our back, which means we never get to
see the speed change. Reading back the current speed would
tell us something happened, but it may leave the things on
the notifier chain confused; we therefore stick to using
the last programmed speed rather than the current speed for
"old".
TODO: work out how the TCC interrupts work, and try to
catch the CPU changing things under us.
*/
freqs.cpu = 0;
freqs.old = extract_clock(oldmsr);
freqs.new = extract_clock(msr);
dprintk(KERN_INFO PFX "target=%dkHz old=%d new=%d msr=%04x\n",
target_freq, freqs.old, freqs.new, msr);
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
/* all but 16 LSB are "reserved", so treat them with
care */
oldmsr &= ~0xffff;
msr &= 0xffff;
oldmsr |= msr;
wrmsr(MSR_IA32_PERF_CTL, oldmsr, h);
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
return 0;
}
static struct cpufreq_driver centrino_driver = {
.name = "centrino", /* should be speedstep-centrino,
but there's a 16 char limit */
.init = centrino_cpu_init,
.verify = centrino_verify,
.target = centrino_target,
.owner = THIS_MODULE,
};
/**
* centrino_init - initializes the Enhanced SpeedStep CPUFreq driver
*
* Initializes the Enhanced SpeedStep support. Returns -ENODEV on
* unsupported devices, -ENOENT if there's no voltage table for this
* particular CPU model, -EINVAL on problems during initiatization,
* and zero on success.
*
* This is quite picky. Not only does the CPU have to advertise the
* "est" flag in the cpuid capability flags, we look for a specific
* CPU model and stepping, and we need to have the exact model name in
* our voltage tables. That is, be paranoid about not releasing
* someone's valuable magic smoke.
*/
static int __init centrino_init(void)
{
struct cpuinfo_x86 *cpu = cpu_data;
const struct cpu_model *model;
unsigned l, h;
if (!cpu_has(cpu, X86_FEATURE_EST))
return -ENODEV;
/* Only Intel Pentium M stepping 5 for now - add new CPUs as
they appear after making sure they use PERF_CTL in the same
way. */
if (cpu->x86_vendor != X86_VENDOR_INTEL ||
cpu->x86 != 6 ||
cpu->x86_model != 9 ||
cpu->x86_mask != 5) {
printk(KERN_INFO PFX "found unsupported CPU with Enhanced SpeedStep: "
"send /proc/cpuinfo to " MAINTAINER "\n");
return -ENODEV;
}
/* Check to see if Enhanced SpeedStep is enabled, and try to
enable it if not. */
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
if (!(l & (1<<16))) {
l |= (1<<16);
wrmsr(MSR_IA32_MISC_ENABLE, l, h);
/* check to see if it stuck */
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
if (!(l & (1<<16))) {
printk(KERN_INFO PFX "couldn't enable Enhanced SpeedStep\n");
return -ENODEV;
}
}
for(model = models; model->model_name != NULL; model++)
if (strcmp(cpu->x86_model_id, model->model_name) == 0)
break;
if (model->model_name == NULL) {
printk(KERN_INFO PFX "no support for CPU model \"%s\": "
"send /proc/cpuinfo to " MAINTAINER "\n",
cpu->x86_model_id);
return -ENOENT;
}
centrino_model = model;
printk(KERN_INFO PFX "found \"%s\": max frequency: %dkHz\n",
model->model_name, model->max_freq);
return cpufreq_register_driver(&centrino_driver);
}
static void __exit centrino_exit(void)
{
cpufreq_unregister_driver(&centrino_driver);
}
MODULE_AUTHOR ("Jeremy Fitzhardinge <jeremy@goop.org>");
MODULE_DESCRIPTION ("Enhanced SpeedStep driver for Intel Pentium M processors.");
MODULE_LICENSE ("GPL");
module_init(centrino_init);
module_exit(centrino_exit);
......@@ -503,6 +503,17 @@ static unsigned int speedstep_detect_processor (void)
if (speedstep_coppermine)
return SPEEDSTEP_PROCESSOR_PIII_C;
/*
* If the processor is a mobile version,
* platform ID has bit 50 set
* it has SpeedStep technology if either
* bit 56 or 57 is set
*/
rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
dprintk(KERN_DEBUG "cpufreq: Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n", msr_lo, msr_hi);
if ((msr_hi & (1<<18)) && (msr_hi & (3<<24)))
return SPEEDSTEP_PROCESSOR_PIII_C;
printk(KERN_INFO "cpufreq: in case this is a SpeedStep-capable Intel Pentium III Coppermine\n");
printk(KERN_INFO "cpufreq: processor, please pass the boot option or module parameter\n");
printk(KERN_INFO "cpufreq: `speedstep_coppermine=1` to the kernel. Thanks!\n");
......@@ -538,8 +549,10 @@ static int speedstep_detect_speeds (void)
for (i=0; i<2; i++) {
/* read the current state */
result = speedstep_get_state(&state);
if (result)
if (result) {
local_irq_restore(flags);
return result;
}
/* save the correct value, and switch to other */
if (state == SPEEDSTEP_LOW) {
......
......@@ -81,6 +81,7 @@ SECTIONS
__con_initcall_start = .;
.con_initcall.init : { *(.con_initcall.init) }
__con_initcall_end = .;
SECURITY_INIT
. = ALIGN(4);
__alt_instructions = .;
.altinstructions : { *(.altinstructions) }
......
......@@ -141,6 +141,10 @@ SECTIONS
.con_initcall.init : AT(ADDR(.con_initcall.init) - PAGE_OFFSET)
{ *(.con_initcall.init) }
__con_initcall_end = .;
__security_initcall_start = .;
.security_initcall.init : AT(ADDR(.security_initcall.init) - PAGE_OFFSET)
{ *(.security_initcall.init) }
__security_initcall_end = .;
. = ALIGN(PAGE_SIZE);
__init_end = .;
......
......@@ -67,6 +67,7 @@ SECTIONS
__con_initcall_start = .;
.con_initcall.init : { *(.con_initcall.init) }
__con_initcall_end = .;
SECURITY_INIT
. = ALIGN(8192);
__initramfs_start = .;
.init.ramfs : { *(.init.ramfs) }
......
......@@ -61,6 +61,7 @@ __init_begin = .;
__con_initcall_start = .;
.con_initcall.init : { *(.con_initcall.init) }
__con_initcall_end = .;
SECURITY_INIT
. = ALIGN(8192);
__initramfs_start = .;
.init.ramfs : { *(.init.ramfs) }
......
......@@ -277,9 +277,7 @@ SECTIONS {
__con_initcall_start = .;
*(.con_initcall.init)
__con_initcall_end = .;
__security_initcall_start = .;
*(.security_initcall.init)
__security_initcall_end = .;
SECURITY_INIT
. = ALIGN(4);
__initramfs_start = .;
*(.init.ramfs)
......
......@@ -54,6 +54,7 @@ SECTIONS
__con_initcall_start = .;
.con_initcall.init : { *(.con_initcall.init) }
__con_initcall_end = .;
SECURITY_INIT
. = ALIGN(4096); /* Align double page for init_task_union */
__init_end = .;
......
......@@ -53,6 +53,7 @@ SECTIONS
__con_initcall_start = .;
.con_initcall.init : { *(.con_initcall.init) }
__con_initcall_end = .;
SECURITY_INIT
. = ALIGN(4096); /* Align double page for init_task_union */
__init_end = .;
......
......@@ -80,6 +80,7 @@ SECTIONS
__con_initcall_start = .;
.con_initcall.init : { *(.con_initcall.init) }
__con_initcall_end = .;
SECURITY_INIT
. = ALIGN(4096);
__initramfs_start = .;
.init.ramfs : { *(.init.ramfs) }
......
......@@ -119,6 +119,8 @@ SECTIONS
.con_initcall.init : { *(.con_initcall.init) }
__con_initcall_end = .;
SECURITY_INIT
__start___ftr_fixup = .;
__ftr_fixup : { *(__ftr_fixup) }
__stop___ftr_fixup = .;
......
......@@ -1545,10 +1545,11 @@ local inflate_huft *fixed_tl;
local inflate_huft *fixed_td;
local voidpf falloc(q, n, s)
voidpf q; /* opaque pointer (not used) */
uInt n; /* number of items */
uInt s; /* size of item */
local voidpf falloc(
voidpf q, /* opaque pointer (not used) */
uInt n, /* number of items */
uInt s /* size of item */
)
{
Assert(s == sizeof(inflate_huft) && n <= fixed_left,
"inflate_trees falloc overflow");
......@@ -1558,10 +1559,11 @@ uInt s; /* size of item */
}
local void ffree(q, p, n)
voidpf q;
voidpf p;
uInt n;
local void ffree(
voidpf q,
voidpf p,
uInt n
)
{
Assert(0, "inflate_trees ffree called!");
if (q) q = p; /* to make some compilers happy */
......@@ -2164,10 +2166,11 @@ char *z_errmsg[] = {
#define DO16(buf) DO8(buf); DO8(buf);
/* ========================================================================= */
uLong adler32(adler, buf, len)
uLong adler;
Bytef *buf;
uInt len;
uLong adler32(
uLong adler,
Bytef *buf,
uInt len
)
{
unsigned long s1 = adler & 0xffff;
unsigned long s2 = (adler >> 16) & 0xffff;
......
......@@ -9,7 +9,7 @@ obj-y := setup.o entry.o traps.o irq.o idle.o \
align.o semaphore.o bitops.o stab.o htab.o pacaData.o \
udbg.o binfmt_elf32.o sys_ppc32.o ioctl32.o \
ptrace32.o signal32.o pmc.o rtc.o init_task.o \
lmb.o pci.o pci_dn.o pci_dma.o
lmb.o pci.o pci_dn.o pci_dma.o cputable.o
obj-$(CONFIG_PPC_ISERIES) += iSeries_pci.o iSeries_pci_reset.o \
iSeries_IoMmTable.o iSeries_irq.o \
......@@ -19,11 +19,11 @@ obj-$(CONFIG_PPC_ISERIES) += iSeries_pci.o iSeries_pci_reset.o \
mf.o HvLpEvent.o iSeries_proc.o
obj-$(CONFIG_PPC_PSERIES) += pSeries_pci.o pSeries_lpar.o pSeries_hvCall.o \
eeh.o rtasd.o nvram.o
eeh.o rtasd.o nvram.o ras.o
# Change this to pSeries only once we've got iSeries up to date
obj-y += open_pic.o xics.o pSeries_htab.o rtas.o \
chrp_setup.o i8259.o ras.o prom.o
chrp_setup.o i8259.o prom.o
obj-$(CONFIG_PROC_FS) += proc_ppc64.o
obj-$(CONFIG_RTAS_FLASH) += rtas_flash.o
......@@ -31,3 +31,5 @@ obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_MODULES) += module.o ppc_ksyms.o
obj-$(CONFIG_PPC_RTAS) += rtas-proc.o
obj-$(CONFIG_SCANLOG) += scanlog.o
CFLAGS_ioctl32.o += -Ifs/
......@@ -20,6 +20,7 @@
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/cache.h>
#include <asm/cputable.h>
void disable_kernel_fp(void); /* asm function from head.S */
......@@ -238,12 +239,11 @@ fix_alignment(struct pt_regs *regs)
dsisr = regs->dsisr;
/* Power4 doesn't set DSISR for an alignment interrupt */
if (!cpu_alignexc_sets_dsisr()) {
unsigned int real_instr;
if (__get_user(real_instr, (unsigned int *)regs->nip))
return 0;
dsisr = make_dsisr(real_instr);
if (cur_cpu_spec->cpu_features & CPU_FTR_NODSISRALIGN) {
unsigned int real_instr;
if (__get_user(real_instr, (unsigned int *)regs->nip))
return 0;
dsisr = make_dsisr(*((unsigned *)regs->nip));
}
/* extract the operation and registers from the dsisr */
......
......@@ -34,6 +34,7 @@
#include <asm/iSeries/HvLpEvent.h>
#include <asm/prom.h>
#include <asm/rtas.h>
#include <asm/cputable.h>
#define DEFINE(sym, val) \
asm volatile("\n->" #sym " %0 " #val : : "i" (val))
......@@ -159,5 +160,12 @@ int main(void)
DEFINE(CLONE_VM, CLONE_VM);
DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
/* About the CPU features table */
DEFINE(CPU_SPEC_ENTRY_SIZE, sizeof(struct cpu_spec));
DEFINE(CPU_SPEC_PVR_MASK, offsetof(struct cpu_spec, pvr_mask));
DEFINE(CPU_SPEC_PVR_VALUE, offsetof(struct cpu_spec, pvr_value));
DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
return 0;
}
......@@ -62,13 +62,13 @@
#include "open_pic.h"
#include <asm/xics.h>
#include <asm/ppcdebug.h>
#include <asm/cputable.h>
extern volatile unsigned char *chrp_int_ack_special;
void chrp_progress(char *, unsigned short);
extern void openpic_init_IRQ(void);
extern void init_ras_IRQ(void);
extern void find_and_init_phbs(void);
......@@ -238,7 +238,6 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
ppc_md.init_IRQ = xics_init_IRQ;
ppc_md.get_irq = xics_get_irq;
}
ppc_md.init_ras_IRQ = init_ras_IRQ;
ppc_md.init = chrp_init2;
......@@ -253,6 +252,34 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
ppc_md.progress = chrp_progress;
/* build up the firmware_features bitmask field
* using contents of device-tree/ibm,hypertas-functions.
* Ultimately this functionality may be moved into prom.c prom_init().
*/
struct device_node * dn;
char * hypertas;
unsigned int len;
dn = find_path_device("/rtas");
cur_cpu_spec->firmware_features = 0;
hypertas = get_property(dn, "ibm,hypertas-functions", &len);
if (hypertas) {
while (len > 0){
int i;
/* check value against table of strings */
for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
if ((firmware_features_table[i].name) && (strcmp(firmware_features_table[i].name,hypertas))==0) {
/* we have a match */
cur_cpu_spec->firmware_features |= (1UL << firmware_features_table[i].val);
break;
}
}
int hypertas_len = strlen(hypertas);
len -= hypertas_len +1;
hypertas+= hypertas_len +1;
}
}
udbg_printf("firmware_features bitmask: 0x%x \n",
cur_cpu_spec->firmware_features);
}
void
......
/*
* arch/ppc64/kernel/cputable.c
*
* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
*
* Modifications for ppc64:
* Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/config.h>
#include <linux/string.h>
#include <linux/sched.h>
#include <linux/threads.h>
#include <linux/init.h>
#include <asm/cputable.h>
struct cpu_spec* cur_cpu_spec = NULL;
extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
/* We only set the altivec features if the kernel was compiled with altivec
* support
*/
#ifdef CONFIG_ALTIVEC
#define CPU_FTR_ALTIVEC_COMP CPU_FTR_ALTIVEC
#else
#define CPU_FTR_ALTIVEC_COMP 0
#endif
struct cpu_spec cpu_specs[] = {
{ /* Power3 */
0xffff0000, 0x00400000, "Power3 (630)",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_USER_PPC64,
128, 128,
__setup_cpu_power3,
COMMON_PPC64_FW
},
{ /* Power3+ */
0xffff0000, 0x00410000, "Power3 (630+)",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_USER_PPC64,
128, 128,
__setup_cpu_power3,
COMMON_PPC64_FW
},
{ /* Northstar */
0xffff0000, 0x00330000, "Northstar",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_USER_PPC64,
128, 128,
__setup_cpu_power3,
COMMON_PPC64_FW
},
{ /* Pulsar */
0xffff0000, 0x00340000, "Pulsar",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_USER_PPC64,
128, 128,
__setup_cpu_power3,
COMMON_PPC64_FW
},
{ /* I-star */
0xffff0000, 0x00360000, "I-star",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_USER_PPC64,
128, 128,
__setup_cpu_power3,
COMMON_PPC64_FW
},
{ /* S-star */
0xffff0000, 0x00370000, "S-star",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
COMMON_USER_PPC64,
128, 128,
__setup_cpu_power3,
COMMON_PPC64_FW
},
{ /* Power4 */
0xffff0000, 0x00350000, "Power4",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
CPU_FTR_PPCAS_ARCH_V2,
COMMON_USER_PPC64,
128, 128,
__setup_cpu_power4,
COMMON_PPC64_FW
},
{ /* Power4+ */
0xffff0000, 0x00380000, "Power4+",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
CPU_FTR_PPCAS_ARCH_V2,
COMMON_USER_PPC64,
128, 128,
__setup_cpu_power4,
COMMON_PPC64_FW
},
{ /* default match */
0x00000000, 0x00000000, "(Power4-Compatible)",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
CPU_FTR_PPCAS_ARCH_V2,
COMMON_USER_PPC64,
128, 128,
__setup_cpu_power4,
COMMON_PPC64_FW
}
};
firmware_feature_t firmware_features_table[FIRMWARE_MAX_FEATURES] = {
{FW_FEATURE_PFT, "hcall-pft"},
{FW_FEATURE_TCE, "hcall-tce"},
{FW_FEATURE_SPRG0, "hcall-sprg0"},
{FW_FEATURE_DABR, "hcall-dabr"},
{FW_FEATURE_COPY, "hcall-copy"},
{FW_FEATURE_ASR, "hcall-asr"},
{FW_FEATURE_DEBUG, "hcall-debug"},
{FW_FEATURE_PERF, "hcall-perf"},
{FW_FEATURE_DUMP, "hcall-dump"},
{FW_FEATURE_INTERRUPT, "hcall-interrupt"},
{FW_FEATURE_MIGRATE, "hcall-migrate"},
};
......@@ -34,6 +34,7 @@
#include <asm/ppc_asm.h>
#include <asm/offsets.h>
#include <asm/bug.h>
#include <asm/cputable.h>
#ifdef CONFIG_PPC_ISERIES
#define DO_SOFT_DISABLE
......@@ -1267,6 +1268,11 @@ _GLOBAL(__start_initialization_iSeries)
li r0,0
stdu r0,-STACK_FRAME_OVERHEAD(r1)
LOADADDR(r3,cpu_specs)
LOADADDR(r4,cur_cpu_spec)
li r5,0
bl .identify_cpu
LOADADDR(r2,__toc_start)
addi r2,r2,0x4000
addi r2,r2,0x4000
......@@ -1730,6 +1736,13 @@ _STATIC(start_here_pSeries)
li r0,0
stdu r0,-STACK_FRAME_OVERHEAD(r1)
LOADADDR(r3,cpu_specs)
sub r3,r3,r26
LOADADDR(r4,cur_cpu_spec)
sub r4,r4,r26
mr r5,r26
bl .identify_cpu
/* set up the TOC (physical address) */
LOADADDR(r2,__toc_start)
addi r2,r2,0x4000
......@@ -1888,6 +1901,11 @@ _STATIC(start_here_common)
bl .start_kernel
_GLOBAL(__setup_cpu_power3)
blr
_GLOBAL(__setup_cpu_power4)
blr
_GLOBAL(hmt_init)
#ifdef CONFIG_HMT
LOADADDR(r5, hmt_thread_data)
......
......@@ -46,6 +46,7 @@
#include <asm/eeh.h>
#include <asm/tlb.h>
#include <asm/cacheflush.h>
#include <asm/cputable.h>
/*
* Note: pte --> Linux PTE
......@@ -165,7 +166,8 @@ htab_initialize(void)
mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX;
/* XXX we currently map kernel text rw, should fix this */
if (cpu_has_largepage() && systemcfg->physicalMemorySize > 256*MB) {
if ((cur_cpu_spec->cpu_features & CPU_FTR_16M_PAGE)
&& systemcfg->physicalMemorySize > 256*MB) {
create_pte_mapping((unsigned long)KERNELBASE,
KERNELBASE + 256*MB, mode_rw, 0);
create_pte_mapping((unsigned long)KERNELBASE + 256*MB,
......@@ -279,7 +281,8 @@ int __hash_page(unsigned long ea, unsigned long access, unsigned long vsid,
#define PPC64_HWNOEXEC (1 << 2)
/* We do lazy icache flushing on cpus that support it */
if (unlikely(cpu_has_noexecute() && pfn_valid(pte_pfn(new_pte)))) {
if (unlikely((cur_cpu_spec->cpu_features & CPU_FTR_NOEXECUTE)
&& pfn_valid(pte_pfn(new_pte)))) {
struct page *page = pte_page(new_pte);
/* page is dirty */
......
......@@ -33,6 +33,7 @@
#include <asm/mmu.h>
#include <asm/pgtable.h>
#include <asm/mmu_context.h>
#include <asm/cputable.h>
#include <asm/time.h>
#include "iSeries_setup.h"
......@@ -254,7 +255,7 @@ unsigned long iSeries_process_mainstore_vpd( struct MemoryBlock *mb_array, unsig
{
unsigned long i;
unsigned long mem_blocks = 0;
if (__is_processor(PV_POWER4) || __is_processor(PV_POWER4p))
if (cur_cpu_spec->cpu_features & CPU_FTR_SLB)
mem_blocks = iSeries_process_Regatta_mainstore_vpd( mb_array, max_entries );
else
mem_blocks = iSeries_process_Condor_mainstore_vpd( mb_array, max_entries );
......@@ -311,7 +312,6 @@ iSeries_init_early(void)
ppc_md.setup_residual = iSeries_setup_residual;
ppc_md.get_cpuinfo = iSeries_get_cpuinfo;
ppc_md.init_IRQ = iSeries_init_IRQ;
ppc_md.init_ras_IRQ = NULL;
ppc_md.get_irq = iSeries_get_irq;
ppc_md.init = NULL;
......
This source diff could not be displayed because it is too large. You can view the blob instead.
......@@ -596,7 +596,6 @@ void __init init_IRQ(void)
once++;
ppc_md.init_IRQ();
if(ppc_md.init_ras_IRQ) ppc_md.init_ras_IRQ();
}
static struct proc_dir_entry * root_irq_dir;
......
......@@ -27,6 +27,7 @@
#include <asm/cache.h>
#include <asm/ppc_asm.h>
#include <asm/offsets.h>
#include <asm/cputable.h>
.text
......@@ -444,6 +445,95 @@ _GLOBAL(cvt_df)
stfd 0,0(r5)
blr
/*
* identify_cpu,
* In: r3 = base of the cpu_specs array
* r4 = address of cur_cpu_spec
* r5 = relocation offset
*/
_GLOBAL(identify_cpu)
mfpvr r7
1:
lwz r8,CPU_SPEC_PVR_MASK(r3)
and r8,r8,r7
lwz r9,CPU_SPEC_PVR_VALUE(r3)
cmplw 0,r9,r8
beq 1f
addi r3,r3,CPU_SPEC_ENTRY_SIZE
b 1b
1:
add r3,r3,r5
std r3,0(r4)
blr
/*
* do_cpu_ftr_fixups - goes through the list of CPU feature fixups
* and writes nop's over sections of code that don't apply for this cpu.
* r3 = data offset (not changed)
*/
_GLOBAL(do_cpu_ftr_fixups)
/* Get CPU 0 features */
LOADADDR(r6,cur_cpu_spec)
sub r6,r6,r3
ld r4,0(r6)
sub r4,r4,r3
ld r4,CPU_SPEC_FEATURES(r4)
/* Get the fixup table */
LOADADDR(r6,__start___ftr_fixup)
sub r6,r6,r3
LOADADDR(r7,__stop___ftr_fixup)
sub r7,r7,r3
/* Do the fixup */
1: cmpld r6,r7
bgelr
addi r6,r6,32
ld r8,-32(r6) /* mask */
and r8,r8,r4
ld r9,-24(r6) /* value */
cmpld r8,r9
beq 1b
ld r8,-16(r6) /* section begin */
ld r9,-8(r6) /* section end */
subf. r9,r8,r9
beq 1b
/* write nops over the section of code */
/* todo: if large section, add a branch at the start of it */
srwi r9,r9,2
mtctr r9
sub r8,r8,r3
lis r0,0x60000000@h /* nop */
3: stw r0,0(r8)
andi. r10,r4,CPU_FTR_SPLIT_ID_CACHE@l
beq 2f
dcbst 0,r8 /* suboptimal, but simpler */
sync
icbi 0,r8
2: addi r8,r8,4
bdnz 3b
sync /* additional sync needed on g4 */
isync
b 1b
/*
* call_setup_cpu - call the setup_cpu function for this cpu
* r3 = data offset
*
* Setup function is called with:
* r3 = data offset
* r4 = ptr to CPU spec (relocated)
*/
_GLOBAL(call_setup_cpu)
LOADADDR(r4, cur_cpu_spec)
sub r4,r4,r3
lwz r4,0(r4) # load pointer to cpu_spec
sub r4,r4,r3 # relocate
lwz r6,CPU_SPEC_SETUP(r4) # load function pointer
sub r6,r6,r3
mtctr r6
bctr
/*
* Create a kernel thread
* kernel_thread(fn, arg, flags)
......
......@@ -376,15 +376,57 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
return 0;
}
LIST_HEAD(module_bug_list);
int module_finalize(const Elf_Ehdr *hdr,
const Elf_Shdr *sechdrs, struct module *me)
{
char *secstrings;
unsigned int i;
me->arch.bug_table = NULL;
me->arch.num_bugs = 0;
/* Find the __bug_table section, if present */
secstrings = (char *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
for (i = 1; i < hdr->e_shnum; i++) {
if (strcmp(secstrings+sechdrs[i].sh_name, "__bug_table"))
continue;
me->arch.bug_table = (void *) sechdrs[i].sh_addr;
me->arch.num_bugs = sechdrs[i].sh_size / sizeof(struct bug_entry);
break;
}
/*
* Strictly speaking this should have a spinlock to protect against
* traversals, but since we only traverse on BUG()s, a spinlock
* could potentially lead to deadlock and thus be counter-productive.
*/
list_add(&me->arch.bug_list, &module_bug_list);
sort_ex_table((struct exception_table_entry *)me->extable,
(struct exception_table_entry *)me->extable +
me->num_exentries);
return 0;
}
void module_arch_cleanup(struct module *mod)
{
list_del(&mod->arch.bug_list);
}
struct bug_entry *module_find_bug(unsigned long bugaddr)
{
struct mod_arch_specific *mod;
unsigned int i;
struct bug_entry *bug;
list_for_each_entry(mod, &module_bug_list, bug_list) {
bug = mod->bug_table;
for (i = 0; i < mod->num_bugs; ++i, ++bug)
if (bugaddr == bug->bug_addr)
return bug;
}
return NULL;
}
......@@ -21,6 +21,7 @@
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
#include <asm/tlb.h>
#include <asm/cputable.h>
#define HPTE_LOCK_BIT 3
......@@ -217,7 +218,7 @@ static long pSeries_hpte_updatepp(unsigned long slot, unsigned long newpp,
}
/* Ensure it is out of the tlb too */
if (cpu_has_tlbiel() && !large && local) {
if ((cur_cpu_spec->cpu_features & CPU_FTR_TLBIEL) && !large && local) {
_tlbiel(va);
} else {
spin_lock_irqsave(&pSeries_tlbie_lock, flags);
......@@ -283,7 +284,7 @@ static void pSeries_hpte_invalidate(unsigned long slot, unsigned long va,
}
/* Invalidate the tlb */
if (cpu_has_tlbiel() && !large && local) {
if ((cur_cpu_spec->cpu_features & CPU_FTR_TLBIEL) && !large && local) {
_tlbiel(va);
} else {
spin_lock_irqsave(&pSeries_tlbie_lock, flags);
......@@ -346,7 +347,7 @@ static void pSeries_flush_hash_range(unsigned long context,
j++;
}
if (cpu_has_tlbiel() && !large && local) {
if ((cur_cpu_spec->cpu_features & CPU_FTR_TLBIEL) && !large && local) {
asm volatile("ptesync":::"memory");
for (i = 0; i < j; i++) {
......
......@@ -45,6 +45,7 @@
#include <asm/machdep.h>
#include <asm/iSeries/HvCallHpt.h>
#include <asm/hardirq.h>
#include <asm/cputable.h>
struct task_struct *last_task_used_math = NULL;
......@@ -412,7 +413,7 @@ void initialize_paca_hardware_interrupt_stack(void)
* __get_free_pages() might give us a page > KERNBASE+256M which
* is mapped with large ptes so we can't set up the guard page.
*/
if (cpu_has_largepage())
if (cur_cpu_spec->cpu_features & CPU_FTR_16M_PAGE)
return;
for (i=0; i < NR_CPUS; i++) {
......
......@@ -58,7 +58,6 @@ static irqreturn_t ras_epow_interrupt(int irq, void *dev_id,
struct pt_regs * regs);
static irqreturn_t ras_error_interrupt(int irq, void *dev_id,
struct pt_regs * regs);
void init_ras_IRQ(void);
/* #define DEBUG */
......@@ -66,7 +65,8 @@ void init_ras_IRQ(void);
* Initialize handlers for the set of interrupts caused by hardware errors
* and power system events.
*/
void init_ras_IRQ(void) {
static int __init init_ras_IRQ(void)
{
struct device_node *np;
unsigned int *ireg, len, i;
......@@ -91,7 +91,10 @@ void init_ras_IRQ(void) {
ireg++;
}
}
return 1;
}
__initcall(init_ras_IRQ);
/*
* Handle power subsystem events (EPOW).
......
......@@ -47,6 +47,7 @@
#include "open_pic.h"
#include <asm/machdep.h>
#include <asm/xics.h>
#include <asm/cputable.h>
int smp_threads_ready;
unsigned long cache_decay_ticks;
......@@ -583,7 +584,7 @@ int __devinit __cpu_up(unsigned int cpu)
paca[cpu].prof_multiplier = 1;
paca[cpu].default_decr = tb_ticks_per_jiffy / decr_overclock;
if (!cpu_has_slb()) {
if (!(cur_cpu_spec->cpu_features & CPU_FTR_SLB)) {
void *tmp;
/* maximum of 48 CPUs on machines with a segment table */
......
......@@ -21,6 +21,7 @@
#include <asm/paca.h>
#include <asm/naca.h>
#include <asm/pmc.h>
#include <asm/cputable.h>
int make_ste(unsigned long stab, unsigned long esid, unsigned long vsid);
void make_slbe(unsigned long esid, unsigned long vsid, int large,
......@@ -38,7 +39,7 @@ void stab_initialize(unsigned long stab)
esid = GET_ESID(KERNELBASE);
vsid = get_kernel_vsid(esid << SID_SHIFT);
if (cpu_has_slb()) {
if (cur_cpu_spec->cpu_features & CPU_FTR_SLB) {
/* Invalidate the entire SLB & all the ERATS */
#ifdef CONFIG_PPC_ISERIES
asm volatile("isync; slbia; isync":::"memory");
......@@ -222,7 +223,7 @@ void make_slbe(unsigned long esid, unsigned long vsid, int large,
static inline void __ste_allocate(unsigned long esid, unsigned long vsid,
int kernel_segment)
{
if (cpu_has_slb()) {
if (cur_cpu_spec->cpu_features & CPU_FTR_SLB) {
#ifndef CONFIG_PPC_ISERIES
if (REGION_ID(esid << SID_SHIFT) == KERNEL_REGION_ID)
make_slbe(esid, vsid, 1, kernel_segment);
......@@ -275,7 +276,7 @@ int ste_allocate(unsigned long ea)
esid = GET_ESID(ea);
__ste_allocate(esid, vsid, kernel_segment);
if (!cpu_has_slb()) {
if (!(cur_cpu_spec->cpu_features & CPU_FTR_SLB)) {
/* Order update */
asm volatile("sync":::"memory");
}
......@@ -327,7 +328,7 @@ static void preload_stab(struct task_struct *tsk, struct mm_struct *mm)
}
}
if (!cpu_has_slb()) {
if (!(cur_cpu_spec->cpu_features & CPU_FTR_SLB)) {
/* Order update */
asm volatile("sync" : : : "memory");
}
......@@ -336,7 +337,7 @@ static void preload_stab(struct task_struct *tsk, struct mm_struct *mm)
/* Flush all user entries from the segment table of the current processor. */
void flush_stab(struct task_struct *tsk, struct mm_struct *mm)
{
if (cpu_has_slb()) {
if (cur_cpu_spec->cpu_features & CPU_FTR_SLB) {
/*
* XXX disable 32bit slb invalidate optimisation until we fix
* the issue where a 32bit app execed out of a 64bit app can
......
......@@ -1136,7 +1136,11 @@ struct sysinfo32 {
u32 totalswap;
u32 freeswap;
unsigned short procs;
char _f[22];
unsigned short pad;
u32 totalhigh;
u32 freehigh;
u32 mem_unit;
char _f[20-2*sizeof(long)-sizeof(int)];
};
extern asmlinkage long sys_sysinfo(struct sysinfo *info);
......@@ -1145,11 +1149,30 @@ asmlinkage long sys32_sysinfo(struct sysinfo32 *info)
{
struct sysinfo s;
int ret, err;
int bitcount=0;
mm_segment_t old_fs = get_fs ();
set_fs (KERNEL_DS);
ret = sys_sysinfo(&s);
set_fs (old_fs);
/* Check to see if any memory value is too large for 32-bit and
* scale down if needed.
*/
if ((s.totalram >> 32) || (s.totalswap >> 32)) {
while (s.mem_unit < PAGE_SIZE) {
s.mem_unit <<= 1;
bitcount++;
}
s.totalram >>=bitcount;
s.freeram >>= bitcount;
s.sharedram >>= bitcount;
s.bufferram >>= bitcount;
s.totalswap >>= bitcount;
s.freeswap >>= bitcount;
s.totalhigh >>= bitcount;
s.freehigh >>= bitcount;
}
err = put_user (s.uptime, &info->uptime);
err |= __put_user (s.loads[0], &info->loads[0]);
err |= __put_user (s.loads[1], &info->loads[1]);
......@@ -1161,6 +1184,9 @@ asmlinkage long sys32_sysinfo(struct sysinfo32 *info)
err |= __put_user (s.totalswap, &info->totalswap);
err |= __put_user (s.freeswap, &info->freeswap);
err |= __put_user (s.procs, &info->procs);
err |= __put_user (s.totalhigh, &info->totalhigh);
err |= __put_user (s.freehigh, &info->freehigh);
err |= __put_user (s.mem_unit, &info->mem_unit);
if (err)
return -EFAULT;
......
......@@ -28,6 +28,7 @@
#include <linux/interrupt.h>
#include <linux/config.h>
#include <linux/init.h>
#include <linux/module.h>
#include <asm/pgtable.h>
#include <asm/uaccess.h>
......@@ -306,6 +307,56 @@ static void parse_fpe(struct pt_regs *regs)
_exception(SIGFPE, &info, regs);
}
/*
* Look through the list of trap instructions that are used for BUG(),
* BUG_ON() and WARN_ON() and see if we hit one. At this point we know
* that the exception was caused by a trap instruction of some kind.
* Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
* otherwise.
*/
extern struct bug_entry __start___bug_table[], __stop___bug_table[];
#ifndef CONFIG_MODULES
#define module_find_bug(x) NULL
#endif
static struct bug_entry *find_bug(unsigned long bugaddr)
{
struct bug_entry *bug;
for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
if (bugaddr == bug->bug_addr)
return bug;
return module_find_bug(bugaddr);
}
int
check_bug_trap(struct pt_regs *regs)
{
struct bug_entry *bug;
unsigned long addr;
if (regs->msr & MSR_PR)
return 0; /* not in kernel */
addr = regs->nip; /* address of trap instruction */
if (addr < PAGE_OFFSET)
return 0;
bug = find_bug(regs->nip);
if (bug == NULL)
return 0;
if (bug->line & BUG_WARNING_TRAP) {
/* this is a WARN_ON rather than BUG/BUG_ON */
printk(KERN_ERR "Badness in %s at %s:%d\n",
bug->function, bug->file,
bug->line & ~BUG_WARNING_TRAP);
dump_stack();
return 1;
}
printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
bug->function, bug->file, bug->line);
return 0;
}
void
ProgramCheckException(struct pt_regs *regs)
{
......@@ -330,6 +381,10 @@ ProgramCheckException(struct pt_regs *regs)
if (debugger_bpt && debugger_bpt(regs))
return;
#endif
if (check_bug_trap(regs)) {
regs->nip += 4;
return;
}
info.si_signo = SIGTRAP;
info.si_errno = 0;
info.si_code = TRAP_BRKPT;
......
......@@ -130,7 +130,7 @@ _GLOBAL(__copy_tofrom_user)
6: cmpwi cr1,r5,8
addi r3,r3,32
sld r9,r9,r10
blt cr1,.Ldo_tail
ble cr1,.Ldo_tail
34: ld r0,8(r4)
srd r7,r0,r11
or r9,r7,r9
......
......@@ -200,6 +200,7 @@ _GLOBAL(__clear_user)
.llong 8b,92b
.text
/* r3 = dst, r4 = src, r5 = count */
_GLOBAL(__strncpy_from_user)
addi r6,r3,-1
addi r4,r4,-1
......@@ -222,14 +223,10 @@ _GLOBAL(__strncpy_from_user)
.llong 1b,99b
.text
/* r3 = str, r4 = len (> 0), r5 = top (highest addr) */
/* r3 = str, r4 = len (> 0) */
_GLOBAL(__strnlen_user)
addi r7,r3,-1
subf r6,r7,r5 /* top+1 - str */
cmplw 0,r4,r6
bge 0f
mr r6,r4
0: mtctr r6 /* ctr = min(len, top - str) */
mtctr r4 /* ctr = len */
1: lbzu r0,1(r7) /* get next byte */
cmpwi 0,r0,0
bdnzf 2,1b /* loop if --ctr != 0 && byte != 0 */
......
......@@ -59,6 +59,7 @@
#include <asm/eeh.h>
#include <asm/processor.h>
#include <asm/mmzone.h>
#include <asm/cputable.h>
#include <asm/ppcdebug.h>
......@@ -512,7 +513,7 @@ void __init paging_init(void)
static struct kcore_list kcore_vmem;
static void setup_kcore(void)
static int __init setup_kcore(void)
{
int i;
......@@ -536,7 +537,10 @@ static void setup_kcore(void)
}
kclist_add(&kcore_vmem, (void *)VMALLOC_START, VMALLOC_END-VMALLOC_START);
return 0;
}
module_init(setup_kcore);
void initialize_paca_hardware_interrupt_stack(void);
......@@ -606,8 +610,6 @@ void __init mem_init(void)
#endif
mem_init_done = 1;
setup_kcore();
/* set the last page of each hardware interrupt stack to be protected */
initialize_paca_hardware_interrupt_stack();
......@@ -698,7 +700,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long ea,
int local = 0;
/* handle i-cache coherency */
if (!cpu_has_noexecute()) {
if (!(cur_cpu_spec->cpu_features & CPU_FTR_NOEXECUTE)) {
unsigned long pfn = pte_pfn(pte);
if (pfn_valid(pfn)) {
struct page *page = pfn_to_page(pfn);
......
......@@ -154,8 +154,28 @@ static int __init parse_numa_properties(void)
if (max_domain < numa_domain)
max_domain = numa_domain;
node_data[numa_domain].node_start_pfn = start / PAGE_SIZE;
node_data[numa_domain].node_size = size / PAGE_SIZE;
/*
* For backwards compatibility, OF splits the first node
* into two regions (the first being 0-4GB). Check for
* this simple case and complain if there is a gap in
* memory
*/
if (node_data[numa_domain].node_size) {
unsigned long shouldstart =
node_data[numa_domain].node_start_pfn +
node_data[numa_domain].node_size;
if (shouldstart != (start / PAGE_SIZE)) {
printk(KERN_ERR "Hole in node, disabling "
"region start %lx length %lx\n",
start, size);
continue;
}
node_data[numa_domain].node_size += size / PAGE_SIZE;
} else {
node_data[numa_domain].node_start_pfn =
start / PAGE_SIZE;
node_data[numa_domain].node_size = size / PAGE_SIZE;
}
for (i = start ; i < (start+size); i += MEMORY_INCREMENT)
numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] =
......@@ -174,6 +194,20 @@ static int __init parse_numa_properties(void)
return 0;
}
void setup_nonnuma(void)
{
unsigned long i;
for (i = 0; i < NR_CPUS; i++)
map_cpu_to_node(i, 0);
node_data[0].node_start_pfn = 0;
node_data[0].node_size = lmb_end_of_DRAM() / PAGE_SIZE;
for (i = 0 ; i < lmb_end_of_DRAM(); i += MEMORY_INCREMENT)
numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] = 0;
}
void __init do_init_bootmem(void)
{
int nid;
......@@ -181,9 +215,8 @@ void __init do_init_bootmem(void)
min_low_pfn = 0;
max_low_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT;
/* XXX FIXME: support machines without associativity information */
if (parse_numa_properties())
BUG();
setup_nonnuma();
for (nid = 0; nid < numnodes; nid++) {
unsigned long start_paddr, end_paddr;
......@@ -204,7 +237,7 @@ void __init do_init_bootmem(void)
NODE_DATA(nid)->bdata = &plat_node_bdata[nid];
bootmap_pages = bootmem_bootmap_pages(end_paddr - start_paddr);
bootmap_pages = bootmem_bootmap_pages((end_paddr - start_paddr) >> PAGE_SHIFT);
dbg("bootmap_pages = %lx\n", bootmap_pages);
bootmem_paddr = lmb_alloc_base(bootmap_pages << PAGE_SHIFT,
......
......@@ -65,6 +65,14 @@ SECTIONS
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
__start___bug_table = .;
__bug_table : { *(__bug_table) }
__stop___bug_table = .;
__start___ftr_fixup = .;
__ftr_fixup : { *(__ftr_fixup) }
__stop___ftr_fixup = .;
. = ALIGN(16384); /* init_task */
.data.init_task : { *(.data.init_task) }
......@@ -104,6 +112,7 @@ SECTIONS
__con_initcall_start = .;
.con_initcall.init : { *(.con_initcall.init) }
__con_initcall_end = .;
SECURITY_INIT
. = ALIGN(4096);
__initramfs_start = .;
.init.ramfs : { *(.init.ramfs) }
......
......@@ -94,6 +94,7 @@ SECTIONS
__con_initcall_start = .;
.con_initcall.init : { *(.con_initcall.init) }
__con_initcall_end = .;
SECURITY_INIT
. = ALIGN(256);
__initramfs_start = .;
.init.ramfs : { *(.init.initramfs) }
......
This diff is collapsed.
# $Id: Makefile,v 1.6 2000/06/10 03:03:52 gniibe Exp $
# $Id: Makefile,v 1.17 2003/05/20 03:12:54 lethal Exp $
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
# Copyright (C) 1999 Kaz Kojima
# Copyright (C) 2002, 2003 Paul Mundt
# Copyright (C) 2002 M. R. Brown
#
# This file is included by the global makefile so that you can add your own
# architecture-specific flags and dependencies. Remember to do have actions
......@@ -12,72 +14,116 @@
# this architecture
#
ifdef CONFIG_CPU_LITTLE_ENDIAN
CFLAGS += -ml
AFLAGS += -ml
# LDFLAGS_vmlinux += -EL
LDFLAGS := -EL
else
CFLAGS += -mb
AFLAGS += -mb
# LDFLAGS_vmlinux += -EB
LDFLAGS := -EB
#
# We don't necessarily agree with the top-level Makefile with regards to what
# does and does not qualify as a noconfig_targets rule. In this case, we're
# still dependant on .config settings in order for core-y (machdir-y in
# particular) to resolve the proper directory. So we just manually include it
# if it hasn't been already..
#
ifndef include_config
-include .config
endif
OBJCOPYFLAGS := -O binary -R .note -R .comment -R .stab -R .stabstr -S
MODFLAGS +=
cpu-y := -mb
cpu-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml
#
#
cpu-$(CONFIG_CPU_SH2) += -m2
cpu-$(CONFIG_CPU_SH3) += -m3
cpu-$(CONFIG_CPU_SH4) += -m4 -mno-implicit-fp
ifdef CONFIG_CPU_SH3
CFLAGS += -m3
AFLAGS += -m3
ifdef CONFIG_SH_KGDB
CFLAGS :=$(CFLAGS:-fomit-frame-pointer=) -g
AFLAGS += -g
ifdef CONFIG_KGDB_MORE
CFLAGS += $(shell echo $(CONFIG_KGDB_OPTIONS) | sed -e 's/"//g')
endif
ifdef CONFIG_CPU_SH4
CFLAGS += -m4 -mno-implicit-fp
AFLAGS += -m4 -mno-implicit-fp
endif
OBJCOPYFLAGS := -O binary -R .note -R .comment -R .stab -R .stabstr -S
#
# Choosing incompatible machines durings configuration will result in
# error messages during linking.
#
LDFLAGS_vmlinux += -e _stext
ifdef LOADADDR
LDFLAGS_vmlinux += -Ttext $(word 1,$(LOADADDR))
ifdef CONFIG_CPU_LITTLE_ENDIAN
LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64' -EL
LDFLAGS_BLOB :=--format binary --oformat elf32-sh-linux
else
LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64+4' -EB
LDFLAGS_BLOB :=--format binary --oformat elf32-shbig-linux
endif
#
CFLAGS += -pipe
CFLAGS += -pipe $(cpu-y)
AFLAGS += $(cpu-y)
head-y := arch/sh/kernel/head.o arch/sh/kernel/init_task.o
LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
core-y += arch/sh/kernel/ arch/sh/mm/
core-$(CONFIG_SH_GENERIC) += arch/sh/stboards/
core-$(CONFIG_SH_STB1_HARP) += arch/sh/stboards/
core-$(CONFIG_SH_STB1_OVERDRIVE)+= arch/sh/stboards/
# Boards
machdir-$(CONFIG_SH_SOLUTION_ENGINE) := se/770x
machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se/7751
machdir-$(CONFIG_SH_STB1_HARP) := harp
machdir-$(CONFIG_SH_STB1_OVERDRIVE) := overdrive
machdir-$(CONFIG_SH_HP620) := hp6xx/hp620
machdir-$(CONFIG_SH_HP680) := hp6xx/hp680
machdir-$(CONFIG_SH_HP690) := hp6xx/hp690
machdir-$(CONFIG_SH_CQREEK) := cqreek
machdir-$(CONFIG_SH_DMIDA) := dmida
machdir-$(CONFIG_SH_EC3104) := ec3104
machdir-$(CONFIG_SH_SATURN) := saturn
machdir-$(CONFIG_SH_DREAMCAST) := dreamcast
machdir-$(CONFIG_SH_CAT68701) := cat68701
machdir-$(CONFIG_SH_BIGSUR) := bigsur
machdir-$(CONFIG_SH_SH2000) := sh2000
machdir-$(CONFIG_SH_ADX) := adx
machdir-$(CONFIG_SH_MPC1211) := mpc1211
machdir-$(CONFIG_SH_UNKNOWN) := unknown
incdir-y := $(machdir-y)
incdir-$(CONFIG_SH_SOLUTION_ENGINE) := se
incdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se7751
incdir-$(CONFIG_SH_HP600) := hp6xx
core-y += arch/sh/boards/$(machdir-y)/
# Companion chips
core-$(CONFIG_HD64461) += arch/sh/cchips/hd6446x/hd64461/
core-$(CONFIG_HD64465) += arch/sh/cchips/hd6446x/hd64465/
cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2
cpuincdir-$(CONFIG_CPU_SH3) := cpu-sh3
cpuincdir-$(CONFIG_CPU_SH4) := cpu-sh4
libs-y += arch/sh/lib/ $(LIBGCC)
MAKEBOOT = $(MAKE) -C arch/$(ARCH)/boot
boot := arch/sh/boot
AFLAGS_vmlinux.lds.o := -traditional
prepare: target_links
.PHONY: target_links FORCE
target_links:
@echo ' Making asm-sh/cpu -> asm-sh/$(cpuincdir-y) link'
@ln -sf $(cpuincdir-y) include/asm-sh/cpu
@echo ' Making asm-sh/mach -> asm-sh/$(incdir-y) link'
@ln -sf $(incdir-y) include/asm-sh/mach
$(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h
BOOTIMAGE=arch/sh/boot/zImage
zImage: vmlinux
@$(MAKEBOOT) zImage
$(Q)$(MAKE) $(build)=$(boot) $(BOOTIMAGE)
compressed: zImage
zdisk: vmlinux
@$(MAKEBOOT) zdisk
archclean:
@$(MAKEBOOT) clean
$(MAKE) -C arch/$(ARCH)/kernel clean
$(MAKE) -C arch/$(ARCH)/stboards clean
# $(MAKE) -C arch/$(ARCH)/tools clean
$(Q)$(MAKE) $(clean)=$(boot)
#
# Makefile for ADX boards
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := mach.o setup.o io.o irq.o irq_maskreq.o
......@@ -173,6 +173,7 @@ void adx_iounmap(void *addr)
EXPORT_SYMBOL(adx_iounmap);
#ifdef CONFIG_IDE
#include <linux/vmalloc.h>
extern void *cf_io_base;
......@@ -190,3 +191,5 @@ unsigned long adx_isa_port2addr(unsigned long offset)
return offset + 0xb0000000; /* IOBUS (AREA 4)*/
}
#endif
/*
* linux/arch/sh/boards/adx/irq.c
*
* Copyright (C) 2001 A&D Co., Ltd.
*
* I/O routine and setup routines for A&D ADX Board
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <asm/irq.h>
void init_adx_IRQ(void)
{
int i;
/* printk("init_adx_IRQ()\n");*/
/* setup irq_mask_register */
irq_mask_register = (unsigned short *)0xa6000008;
/* cover all external interrupt area by maskreg_irq_type
* (Actually, irq15 doesn't exist)
*/
for (i = 0; i < 16; i++) {
make_maskreg_irq(i);
disable_irq(i);
}
}
......@@ -65,11 +65,11 @@ static void disable_maskreg_irq(unsigned int irq)
unsigned short val, mask = 0x01 << irq;
/* Set "irq"th bit */
save_and_cli(flags);
local_irq_save(flags);
val = ctrl_inw((unsigned long)irq_mask_register);
val |= mask;
ctrl_outw(val, (unsigned long)irq_mask_register);
restore_flags(flags);
local_irq_restore(flags);
}
}
......@@ -80,11 +80,11 @@ static void enable_maskreg_irq(unsigned int irq)
unsigned short val, mask = ~(0x01 << irq);
/* Clear "irq"th bit */
save_and_cli(flags);
local_irq_save(flags);
val = ctrl_inw((unsigned long)irq_mask_register);
val &= mask;
ctrl_outw(val, (unsigned long)irq_mask_register);
restore_flags(flags);
local_irq_restore(flags);
}
}
......
......@@ -15,9 +15,8 @@
#include <asm/machvec.h>
#include <asm/rtc.h>
#include <asm/machvec_init.h>
#include <asm/io_adx.h>
#include <asm/adx/io.h>
extern void setup_adx(void);
extern void init_adx_IRQ(void);
/*
......@@ -25,49 +24,43 @@ extern void init_adx_IRQ(void);
*/
struct sh_machine_vector mv_adx __initmv = {
.mv_name = "A&D_ADX",
mv_nr_irqs: 48,
.mv_nr_irqs = 48,
mv_inb: adx_inb,
mv_inw: adx_inw,
mv_inl: adx_inl,
mv_outb: adx_outb,
mv_outw: adx_outw,
mv_outl: adx_outl,
.mv_inb = adx_inb,
.mv_inw = adx_inw,
.mv_inl = adx_inl,
.mv_outb = adx_outb,
.mv_outw = adx_outw,
.mv_outl = adx_outl,
mv_inb_p: adx_inb_p,
mv_inw_p: adx_inw,
mv_inl_p: adx_inl,
mv_outb_p: adx_outb_p,
mv_outw_p: adx_outw,
mv_outl_p: adx_outl,
.mv_inb_p = adx_inb_p,
.mv_inw_p = adx_inw,
.mv_inl_p = adx_inl,
.mv_outb_p = adx_outb_p,
.mv_outw_p = adx_outw,
.mv_outl_p = adx_outl,
mv_insb: adx_insb,
mv_insw: adx_insw,
mv_insl: adx_insl,
mv_outsb: adx_outsb,
mv_outsw: adx_outsw,
mv_outsl: adx_outsl,
.mv_insb = adx_insb,
.mv_insw = adx_insw,
.mv_insl = adx_insl,
.mv_outsb = adx_outsb,
.mv_outsw = adx_outsw,
.mv_outsl = adx_outsl,
mv_readb: adx_readb,
mv_readw: adx_readw,
mv_readl: adx_readl,
mv_writeb: adx_writeb,
mv_writew: adx_writew,
mv_writel: adx_writel,
.mv_readb = adx_readb,
.mv_readw = adx_readw,
.mv_readl = adx_readl,
.mv_writeb = adx_writeb,
.mv_writew = adx_writew,
.mv_writel = adx_writel,
mv_ioremap: adx_ioremap,
mv_iounmap: adx_iounmap,
.mv_ioremap = adx_ioremap,
.mv_iounmap = adx_iounmap,
mv_isa_port2addr: adx_isa_port2addr,
.mv_isa_port2addr = adx_isa_port2addr,
mv_init_irq: init_adx_IRQ,
.mv_init_arch = setup_adx,
.mv_init_irq = init_adx_IRQ,
.mv_rtc_gettimeofday = sh_rtc_gettimeofday,
.mv_rtc_settimeofday = sh_rtc_settimeofday,
.mv_hw_adx = 1,
mv_hw_adx: 1,
};
ALIAS_MV(adx)
/*
* linux/arch/sh/kernel/setup_adx.c
* linux/arch/sh/board/adx/setup.c
*
* Copyright (C) 2001 A&D Co., Ltd.
*
......@@ -11,30 +11,14 @@
*
*/
#include <asm/io.h>
#include <asm/machvec.h>
#include <asm/irq.h>
#include <linux/module.h>
void setup_adx(void)
const char *get_system_type(void)
{
/* nothing to do just yet */
/* printk("setup_adx()\n");*/
return "A&D ADX";
}
void init_adx_IRQ(void)
void platform_setup(void)
{
int i;
/* printk("init_adx_IRQ()\n");*/
/* setup irq_mask_register */
irq_mask_register = (unsigned short *)0xa6000008;
/* cover all external interrupt area by maskreg_irq_type
* (Actually, irq15 doesn't exist)
*/
for (i = 0; i < 16; i++) {
make_maskreg_irq(i);
disable_irq(i);
}
}
#
# Makefile for the BigSur specific parts of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := mach.o setup.o io.o irq.o led.o
obj-$(CONFIG_PCI) += pci.o
......@@ -19,7 +19,7 @@
#include <linux/module.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/bigsur.h>
#include <asm/bigsur/bigsur.h>
//#define BIGSUR_DEBUG 2
#undef BIGSUR_DEBUG
......
This diff is collapsed.
......@@ -13,7 +13,7 @@
#include <linux/config.h>
#include <asm/io.h>
#include <asm/bigsur.h>
#include <asm/bigsur/bigsur.h>
static void mach_led(int position, int value)
{
......
......@@ -18,60 +18,55 @@
#include <asm/rtc.h>
#include <asm/machvec_init.h>
#include <asm/io.h>
#include <asm/io_bigsur.h>
#include <asm/bigsur/io.h>
#include <asm/irq.h>
/*
* The Machine Vector
*/
extern void heartbeat_bigsur(void);
extern void setup_bigsur(void);
extern void init_bigsur_IRQ(void);
struct sh_machine_vector mv_bigsur __initmv = {
.mv_name = "Big Sur",
.mv_nr_irqs = NR_IRQS, // Defined in <asm/irq.h>
.mv_inb = bigsur_inb,
.mv_inw = bigsur_inw,
.mv_inl = bigsur_inl,
.mv_outb = bigsur_outb,
.mv_outw = bigsur_outw,
.mv_outl = bigsur_outl,
mv_nr_irqs: NR_IRQS, // Defined in <asm/irq.h>
mv_inb: bigsur_inb,
mv_inw: bigsur_inw,
mv_inl: bigsur_inl,
mv_outb: bigsur_outb,
mv_outw: bigsur_outw,
mv_outl: bigsur_outl,
.mv_inb_p = bigsur_inb_p,
.mv_inw_p = bigsur_inw,
.mv_inl_p = bigsur_inl,
.mv_outb_p = bigsur_outb_p,
.mv_outw_p = bigsur_outw,
.mv_outl_p = bigsur_outl,
mv_inb_p: bigsur_inb_p,
mv_inw_p: bigsur_inw,
mv_inl_p: bigsur_inl,
mv_outb_p: bigsur_outb_p,
mv_outw_p: bigsur_outw,
mv_outl_p: bigsur_outl,
.mv_insb = bigsur_insb,
.mv_insw = bigsur_insw,
.mv_insl = bigsur_insl,
.mv_outsb = bigsur_outsb,
.mv_outsw = bigsur_outsw,
.mv_outsl = bigsur_outsl,
mv_insb: bigsur_insb,
mv_insw: bigsur_insw,
mv_insl: bigsur_insl,
mv_outsb: bigsur_outsb,
mv_outsw: bigsur_outsw,
mv_outsl: bigsur_outsl,
.mv_readb = generic_readb,
.mv_readw = generic_readw,
.mv_readl = generic_readl,
.mv_writeb = generic_writeb,
.mv_writew = generic_writew,
.mv_writel = generic_writel,
mv_readb: generic_readb,
mv_readw: generic_readw,
mv_readl: generic_readl,
mv_writeb: generic_writeb,
mv_writew: generic_writew,
mv_writel: generic_writel,
.mv_ioremap = generic_ioremap,
.mv_iounmap = generic_iounmap,
mv_ioremap: generic_ioremap,
mv_iounmap: generic_iounmap,
.mv_isa_port2addr = bigsur_isa_port2addr,
.mv_irq_demux = bigsur_irq_demux,
mv_isa_port2addr: bigsur_isa_port2addr,
mv_irq_demux: bigsur_irq_demux,
.mv_init_arch = setup_bigsur,
.mv_init_irq = init_bigsur_IRQ,
mv_init_irq: init_bigsur_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_bigsur,
mv_heartbeat: heartbeat_bigsur,
#endif
.mv_rtc_gettimeofday = sh_rtc_gettimeofday,
.mv_rtc_settimeofday = sh_rtc_settimeofday,
};
ALIAS_MV(bigsur)
......@@ -18,7 +18,7 @@
#include <asm/io.h>
#include <asm/pci-sh7751.h>
#include <asm/bigsur.h>
#include <asm/bigsur/bigsur.h>
#define PCI_REG(reg) (SH7751_PCIREG_BASE+reg)
......
/*
*
* By Dustin McIntire (dustin@sensoria.com) (c)2001
*
* Setup and IRQ handling code for the HD64465 companion chip.
* by Greg Banks <gbanks@pocketpenguins.com>
* Copyright (c) 2000 PocketPenguins Inc
*
* Derived from setup_hd64465.c which bore the message:
* Greg Banks <gbanks@pocketpenguins.com>
* Copyright (c) 2000 PocketPenguins Inc and
* Copyright (C) 2000 YAEGASHI Takeshi
* and setup_cqreek.c which bore message:
* Copyright (C) 2000 Niibe Yutaka
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Setup functions for a Hitachi Big Sur Evaluation Board.
*
*/
#include <linux/config.h>
#include <linux/sched.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/bitops.h>
#include <asm/bigsur/io.h>
#include <asm/hd64465/hd64465.h>
#include <asm/bigsur/bigsur.h>
//#define BIGSUR_DEBUG 3
#undef BIGSUR_DEBUG
#ifdef BIGSUR_DEBUG
#define DPRINTK(args...) printk(args)
#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args)
#else
#define DPRINTK(args...)
#define DIPRINTK(n, args...)
#endif /* BIGSUR_DEBUG */
/*===========================================================*/
// Big Sur Init Routines
/*===========================================================*/
const char *get_system_type(void)
{
return "Big Sur";
}
int __init platform_setup(void)
{
static int done = 0; /* run this only once */
if (!MACH_BIGSUR || done) return 0;
done = 1;
/* Mask all 2nd level IRQ's */
outb(-1,BIGSUR_IMR0);
outb(-1,BIGSUR_IMR1);
outb(-1,BIGSUR_IMR2);
outb(-1,BIGSUR_IMR3);
/* Mask 1st level interrupts */
outb(-1,BIGSUR_IRLMR0);
outb(-1,BIGSUR_IRLMR1);
#if defined (CONFIG_HD64465) && defined (CONFIG_SERIAL)
/* remap IO ports for first ISA serial port to HD64465 UART */
bigsur_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
#endif /* CONFIG_HD64465 && CONFIG_SERIAL */
/* TODO: setup IDE registers */
bigsur_port_map(BIGSUR_IDECTL_IOPORT, 2, BIGSUR_ICTL, 8);
/* Setup the Ethernet port to BIGSUR_ETHER_IOPORT */
bigsur_port_map(BIGSUR_ETHER_IOPORT, 16, BIGSUR_ETHR+BIGSUR_ETHER_IOPORT, 0);
/* set page to 1 */
outw(1, BIGSUR_ETHR+0xe);
/* set the IO port to BIGSUR_ETHER_IOPORT */
outw(BIGSUR_ETHER_IOPORT<<3, BIGSUR_ETHR+0x2);
return 0;
}
module_init(setup_bigsur);
#
# Makefile for the CAT-68701 specific parts of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := mach.o setup.o io.o irq.o
/*
* linux/arch/sh/kernel/io_cat68701.c
* linux/arch/sh/boards/cat68701/io.c
*
* Copyright (C) 2000 Niibe Yutaka
* 2001 Yutaro Ebihara
*
* I/O routine and setup routines for A-ONE Corp CAT-68701 SH7708 Board
* I/O routines for A-ONE Corp CAT-68701 SH7708 Board
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
......@@ -205,45 +205,3 @@ unsigned long cat68701_isa_port2addr(unsigned long offset)
return offset + 0xb4000000; /* other I/O (EREA 5)*/
}
int cat68701_irq_demux(int irq)
{
if(irq==13) return 14;
if(irq==7) return 10;
return irq;
}
/*-------------------------------------------------------*/
void setup_cat68701(){
/* dummy read erea5 (CS8900A) */
}
void init_cat68701_IRQ(){
make_imask_irq(10);
make_imask_irq(14);
}
#ifdef CONFIG_HEARTBEAT
#include <linux/sched.h>
void heartbeat_cat68701()
{
static unsigned int cnt = 0, period = 0 , bit = 0;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ( (300<<FSHIFT)/
((avenrun[0]/5) + (3<<FSHIFT)) );
if(bit){ bit=0; }else{ bit=1; }
outw(bit<<15,0x3fe);
}
#endif /* CONFIG_HEARTBEAT */
/*
* linux/arch/sh/boards/cat68701/irq.c
*
* Copyright (C) 2000 Niibe Yutaka
* 2001 Yutaro Ebihara
*
* Setup routines for A-ONE Corp CAT-68701 SH7708 Board
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <asm/irq.h>
int cat68701_irq_demux(int irq)
{
if(irq==13) return 14;
if(irq==7) return 10;
return irq;
}
void init_cat68701_IRQ()
{
make_imask_irq(10);
make_imask_irq(14);
}
/*
* linux/arch/sh/kernel/mach_cat68701.c
* linux/arch/sh/boards/cat68701/mach.c
*
* Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
* 2001 Yutaro Ebihara (ebihara@si-linux.com)
......@@ -16,57 +16,51 @@
#include <asm/machvec.h>
#include <asm/rtc.h>
#include <asm/machvec_init.h>
#include <asm/io_cat68701.h>
#include <asm/cat68701/io.h>
/*
* The Machine Vector
*/
struct sh_machine_vector mv_cat68701 __initmv = {
.mv_name = "CAT-68701",
.mv_nr_irqs = 32,
.mv_inb = cat68701_inb,
.mv_inw = cat68701_inw,
.mv_inl = cat68701_inl,
.mv_outb = cat68701_outb,
.mv_outw = cat68701_outw,
.mv_outl = cat68701_outl,
mv_nr_irqs: 32,
mv_inb: cat68701_inb,
mv_inw: cat68701_inw,
mv_inl: cat68701_inl,
mv_outb: cat68701_outb,
mv_outw: cat68701_outw,
mv_outl: cat68701_outl,
.mv_inb_p = cat68701_inb_p,
.mv_inw_p = cat68701_inw,
.mv_inl_p = cat68701_inl,
.mv_outb_p = cat68701_outb_p,
.mv_outw_p = cat68701_outw,
.mv_outl_p = cat68701_outl,
mv_inb_p: cat68701_inb_p,
mv_inw_p: cat68701_inw,
mv_inl_p: cat68701_inl,
mv_outb_p: cat68701_outb_p,
mv_outw_p: cat68701_outw,
mv_outl_p: cat68701_outl,
.mv_insb = cat68701_insb,
.mv_insw = cat68701_insw,
.mv_insl = cat68701_insl,
.mv_outsb = cat68701_outsb,
.mv_outsw = cat68701_outsw,
.mv_outsl = cat68701_outsl,
mv_insb: cat68701_insb,
mv_insw: cat68701_insw,
mv_insl: cat68701_insl,
mv_outsb: cat68701_outsb,
mv_outsw: cat68701_outsw,
mv_outsl: cat68701_outsl,
.mv_readb = cat68701_readb,
.mv_readw = cat68701_readw,
.mv_readl = cat68701_readl,
.mv_writeb = cat68701_writeb,
.mv_writew = cat68701_writew,
.mv_writel = cat68701_writel,
mv_readb: cat68701_readb,
mv_readw: cat68701_readw,
mv_readl: cat68701_readl,
mv_writeb: cat68701_writeb,
mv_writew: cat68701_writew,
mv_writel: cat68701_writel,
.mv_ioremap = cat68701_ioremap,
.mv_iounmap = cat68701_iounmap,
mv_ioremap: cat68701_ioremap,
mv_iounmap: cat68701_iounmap,
.mv_isa_port2addr = cat68701_isa_port2addr,
.mv_irq_demux = cat68701_irq_demux,
mv_isa_port2addr: cat68701_isa_port2addr,
mv_irq_demux: cat68701_irq_demux,
.mv_init_arch = setup_cat68701,
.mv_init_irq = init_cat68701_IRQ,
mv_init_irq: init_cat68701_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_cat68701,
mv_heartbeat: heartbeat_cat68701,
#endif
.mv_rtc_gettimeofday = sh_rtc_gettimeofday,
.mv_rtc_settimeofday = sh_rtc_settimeofday,
};
ALIAS_MV(cat68701)
/*
* linux/arch/sh/boards/cat68701/setup.c
*
* Copyright (C) 2000 Niibe Yutaka
* 2001 Yutaro Ebihara
*
* Setup routines for A-ONE Corp CAT-68701 SH7708 Board
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <asm/io.h>
#include <asm/machvec.h>
#include <linux/config.h>
#include <linux/module.h>
const char *get_system_type(void)
{
return "CAT-68701";
}
void platform_setup()
{
/* dummy read erea5 (CS8900A) */
}
#ifdef CONFIG_HEARTBEAT
#include <linux/sched.h>
void heartbeat_cat68701()
{
static unsigned int cnt = 0, period = 0 , bit = 0;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ( (300<<FSHIFT)/
((avenrun[0]/5) + (3<<FSHIFT)) );
if(bit){ bit=0; }else{ bit=1; }
outw(bit<<15,0x3fe);
}
#endif /* CONFIG_HEARTBEAT */
#
# Makefile for the CqREEK specific parts of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := mach.o setup.o io.o irq.o
#define IDE_OFFSET 0xA4000000UL
#define ISA_OFFSET 0xA4A00000UL
unsigned long cqreek_port2addr(unsigned long port)
{
if (0x0000<=port && port<=0x0040)
return IDE_OFFSET + port;
if ((0x01f0<=port && port<=0x01f7) || port == 0x03f6)
return IDE_OFFSET + port;
return ISA_OFFSET + port;
}
/* $Id: setup_cqreek.c,v 1.9 2001/07/30 12:43:28 gniibe Exp $
/* $Id: irq.c,v 1.1.2.4 2002/11/04 20:33:56 lethal Exp $
*
* arch/sh/kernel/setup_cqreek.c
* arch/sh/boards/cqreek/irq.c
*
* Copyright (C) 2000 Niibe Yutaka
*
......@@ -8,11 +8,10 @@
*
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/init.h>
#include <asm/cqreek/cqreek.h>
#include <asm/io.h>
#include <asm/io_generic.h>
#include <asm/irq.h>
......@@ -20,31 +19,6 @@
#include <asm/machvec_init.h>
#include <asm/rtc.h>
#define BRIDGE_FEATURE 0x0002
#define BRIDGE_IDE_CTRL 0x0018
#define BRIDGE_IDE_INTR_LVL 0x001A
#define BRIDGE_IDE_INTR_MASK 0x001C
#define BRIDGE_IDE_INTR_STAT 0x001E
#define BRIDGE_ISA_CTRL 0x0028
#define BRIDGE_ISA_INTR_LVL 0x002A
#define BRIDGE_ISA_INTR_MASK 0x002C
#define BRIDGE_ISA_INTR_STAT 0x002E
#define IDE_OFFSET 0xA4000000UL
#define ISA_OFFSET 0xA4A00000UL
static unsigned long cqreek_port2addr(unsigned long port)
{
if (0x0000<=port && port<=0x0040)
return IDE_OFFSET + port;
if ((0x01f0<=port && port<=0x01f7) || port == 0x03f6)
return IDE_OFFSET + port;
return ISA_OFFSET + port;
}
struct cqreek_irq_data {
unsigned short mask_port; /* Port of Interrupt Mask Register */
unsigned short stat_port; /* Port of Interrupt Status Register */
......@@ -59,11 +33,11 @@ static void disable_cqreek_irq(unsigned int irq)
unsigned short mask_port = cqreek_irq_data[irq].mask_port;
unsigned short bit = cqreek_irq_data[irq].bit;
save_and_cli(flags);
local_irq_save(flags);
/* Disable IRQ */
mask = inw(mask_port) & ~bit;
outw_p(mask, mask_port);
restore_flags(flags);
local_irq_restore(flags);
}
static void enable_cqreek_irq(unsigned int irq)
......@@ -73,11 +47,11 @@ static void enable_cqreek_irq(unsigned int irq)
unsigned short mask_port = cqreek_irq_data[irq].mask_port;
unsigned short bit = cqreek_irq_data[irq].bit;
save_and_cli(flags);
local_irq_save(flags);
/* Enable IRQ */
mask = inw(mask_port) | bit;
outw_p(mask, mask_port);
restore_flags(flags);
local_irq_restore(flags);
}
static void mask_and_ack_cqreek(unsigned int irq)
......@@ -118,13 +92,13 @@ static struct hw_interrupt_type cqreek_irq_type = {
end_cqreek_irq
};
static int has_ide, has_isa;
int cqreek_has_ide, cqreek_has_isa;
/* XXX: This is just for test for my NE2000 ISA board
What we really need is virtualized IRQ and demultiplexer like HP600 port */
void __init init_cqreek_IRQ(void)
{
if (has_ide) {
if (cqreek_has_ide) {
cqreek_irq_data[14].mask_port = BRIDGE_IDE_INTR_MASK;
cqreek_irq_data[14].stat_port = BRIDGE_IDE_INTR_STAT;
cqreek_irq_data[14].bit = 1;
......@@ -137,7 +111,7 @@ void __init init_cqreek_IRQ(void)
disable_cqreek_irq(14);
}
if (has_isa) {
if (cqreek_has_isa) {
cqreek_irq_data[10].mask_port = BRIDGE_ISA_INTR_MASK;
cqreek_irq_data[10].stat_port = BRIDGE_ISA_INTR_STAT;
cqreek_irq_data[10].bit = (1 << 10);
......@@ -152,101 +126,3 @@ void __init init_cqreek_IRQ(void)
}
}
/*
* Initialize the board
*/
void __init setup_cqreek(void)
{
int i;
/* udelay is not available at setup time yet... */
#define DELAY() do {for (i=0; i<10000; i++) ctrl_inw(0xa0000000);} while(0)
if ((inw (BRIDGE_FEATURE) & 1)) { /* We have IDE interface */
outw_p(0, BRIDGE_IDE_INTR_LVL);
outw_p(0, BRIDGE_IDE_INTR_MASK);
outw_p(0, BRIDGE_IDE_CTRL);
DELAY();
outw_p(0x8000, BRIDGE_IDE_CTRL);
DELAY();
outw_p(0xffff, BRIDGE_IDE_INTR_STAT); /* Clear interrupt status */
outw_p(0x0f-14, BRIDGE_IDE_INTR_LVL); /* Use 14 IPR */
outw_p(1, BRIDGE_IDE_INTR_MASK); /* Enable interrupt */
has_ide=1;
}
if ((inw (BRIDGE_FEATURE) & 2)) { /* We have ISA interface */
outw_p(0, BRIDGE_ISA_INTR_LVL);
outw_p(0, BRIDGE_ISA_INTR_MASK);
outw_p(0, BRIDGE_ISA_CTRL);
DELAY();
outw_p(0x8000, BRIDGE_ISA_CTRL);
DELAY();
outw_p(0xffff, BRIDGE_ISA_INTR_STAT); /* Clear interrupt status */
outw_p(0x0f-10, BRIDGE_ISA_INTR_LVL); /* Use 10 IPR */
outw_p(0xfff8, BRIDGE_ISA_INTR_MASK); /* Enable interrupt */
has_isa=1;
}
printk(KERN_INFO "CqREEK Setup (IDE=%d, ISA=%d)...done\n", has_ide, has_isa);
}
/*
* The Machine Vector
*/
struct sh_machine_vector mv_cqreek __initmv = {
.mv_name = "CqREEK",
#if defined(__SH4__)
.mv_nr_irqs = 48,
#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
.mv_nr_irqs = 32,
#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
.mv_nr_irqs = 61,
#endif
.mv_inb = generic_inb,
.mv_inw = generic_inw,
.mv_inl = generic_inl,
.mv_outb = generic_outb,
.mv_outw = generic_outw,
.mv_outl = generic_outl,
.mv_inb_p = generic_inb_p,
.mv_inw_p = generic_inw_p,
.mv_inl_p = generic_inl_p,
.mv_outb_p = generic_outb_p,
.mv_outw_p = generic_outw_p,
.mv_outl_p = generic_outl_p,
.mv_insb = generic_insb,
.mv_insw = generic_insw,
.mv_insl = generic_insl,
.mv_outsb = generic_outsb,
.mv_outsw = generic_outsw,
.mv_outsl = generic_outsl,
.mv_readb = generic_readb,
.mv_readw = generic_readw,
.mv_readl = generic_readl,
.mv_writeb = generic_writeb,
.mv_writew = generic_writew,
.mv_writel = generic_writel,
.mv_init_arch = setup_cqreek,
.mv_init_irq = init_cqreek_IRQ,
.mv_isa_port2addr = cqreek_port2addr,
.mv_ioremap = generic_ioremap,
.mv_iounmap = generic_iounmap,
.mv_rtc_gettimeofday = sh_rtc_gettimeofday,
.mv_rtc_settimeofday = sh_rtc_settimeofday,
};
ALIAS_MV(cqreek)
/* $Id: mach.c,v 1.1.2.4.2.1 2003/01/10 17:26:32 lethal Exp $
*
* arch/sh/kernel/setup_cqreek.c
*
* Copyright (C) 2000 Niibe Yutaka
*
* CqREEK IDE/ISA Bridge Support.
*
*/
#include <asm/rtc.h>
#include <asm/io.h>
#include <asm/io_generic.h>
#include <asm/machvec.h>
#include <asm/machvec_init.h>
#include <asm/cqreek/cqreek.h>
/*
* The Machine Vector
*/
struct sh_machine_vector mv_cqreek __initmv = {
#if defined(CONFIG_CPU_SH4)
mv_nr_irqs: 48,
#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
mv_nr_irqs: 32,
#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
mv_nr_irqs: 61,
#endif
mv_inb: generic_inb,
mv_inw: generic_inw,
mv_inl: generic_inl,
mv_outb: generic_outb,
mv_outw: generic_outw,
mv_outl: generic_outl,
mv_inb_p: generic_inb_p,
mv_inw_p: generic_inw_p,
mv_inl_p: generic_inl_p,
mv_outb_p: generic_outb_p,
mv_outw_p: generic_outw_p,
mv_outl_p: generic_outl_p,
mv_insb: generic_insb,
mv_insw: generic_insw,
mv_insl: generic_insl,
mv_outsb: generic_outsb,
mv_outsw: generic_outsw,
mv_outsl: generic_outsl,
mv_readb: generic_readb,
mv_readw: generic_readw,
mv_readl: generic_readl,
mv_writeb: generic_writeb,
mv_writew: generic_writew,
mv_writel: generic_writel,
mv_init_irq: init_cqreek_IRQ,
mv_isa_port2addr: cqreek_port2addr,
mv_ioremap: generic_ioremap,
mv_iounmap: generic_iounmap,
};
ALIAS_MV(cqreek)
/* $Id: setup.c,v 1.1.2.5 2002/03/02 21:57:07 lethal Exp $
*
* arch/sh/kernel/setup_cqreek.c
*
* Copyright (C) 2000 Niibe Yutaka
*
* CqREEK IDE/ISA Bridge Support.
*
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/cqreek/cqreek.h>
#include <asm/io.h>
#include <asm/io_generic.h>
#include <asm/irq.h>
#include <asm/rtc.h>
const char *get_system_type(void)
{
return "CqREEK";
}
/*
* Initialize the board
*/
void __init platform_setup(void)
{
int i;
/* udelay is not available at setup time yet... */
#define DELAY() do {for (i=0; i<10000; i++) ctrl_inw(0xa0000000);} while(0)
if ((inw (BRIDGE_FEATURE) & 1)) { /* We have IDE interface */
outw_p(0, BRIDGE_IDE_INTR_LVL);
outw_p(0, BRIDGE_IDE_INTR_MASK);
outw_p(0, BRIDGE_IDE_CTRL);
DELAY();
outw_p(0x8000, BRIDGE_IDE_CTRL);
DELAY();
outw_p(0xffff, BRIDGE_IDE_INTR_STAT); /* Clear interrupt status */
outw_p(0x0f-14, BRIDGE_IDE_INTR_LVL); /* Use 14 IPR */
outw_p(1, BRIDGE_IDE_INTR_MASK); /* Enable interrupt */
cqreek_has_ide=1;
}
if ((inw (BRIDGE_FEATURE) & 2)) { /* We have ISA interface */
outw_p(0, BRIDGE_ISA_INTR_LVL);
outw_p(0, BRIDGE_ISA_INTR_MASK);
outw_p(0, BRIDGE_ISA_CTRL);
DELAY();
outw_p(0x8000, BRIDGE_ISA_CTRL);
DELAY();
outw_p(0xffff, BRIDGE_ISA_INTR_STAT); /* Clear interrupt status */
outw_p(0x0f-10, BRIDGE_ISA_INTR_LVL); /* Use 10 IPR */
outw_p(0xfff8, BRIDGE_ISA_INTR_MASK); /* Enable interrupt */
cqreek_has_isa=1;
}
printk(KERN_INFO "CqREEK Setup (IDE=%d, ISA=%d)...done\n", cqreek_has_ide, cqreek_has_isa);
}
#
# Makefile for the DataMyte Industrial Digital Assistant(tm) specific parts
# of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := mach.o
......@@ -22,7 +22,7 @@
#include <asm/machvec_init.h>
#include <asm/io.h>
#include <asm/hd64465.h>
#include <asm/hd64465/hd64465.h>
#include <asm/irq.h>
/*
......@@ -30,44 +30,44 @@
*/
struct sh_machine_vector mv_dmida __initmv = {
.mv_name = "DMIDA",
mv_name: "DMIDA",
.mv_nr_irqs = HD64465_IRQ_BASE+HD64465_IRQ_NUM,
mv_nr_irqs: HD64465_IRQ_BASE+HD64465_IRQ_NUM,
.mv_inb = hd64465_inb,
.mv_inw = hd64465_inw,
.mv_inl = hd64465_inl,
.mv_outb = hd64465_outb,
.mv_outw = hd64465_outw,
.mv_outl = hd64465_outl,
mv_inb: hd64465_inb,
mv_inw: hd64465_inw,
mv_inl: hd64465_inl,
mv_outb: hd64465_outb,
mv_outw: hd64465_outw,
mv_outl: hd64465_outl,
.mv_inb_p = hd64465_inb_p,
.mv_inw_p = hd64465_inw,
.mv_inl_p = hd64465_inl,
.mv_outb_p = hd64465_outb_p,
.mv_outw_p = hd64465_outw,
.mv_outl_p = hd64465_outl,
mv_inb_p: hd64465_inb_p,
mv_inw_p: hd64465_inw,
mv_inl_p: hd64465_inl,
mv_outb_p: hd64465_outb_p,
mv_outw_p: hd64465_outw,
mv_outl_p: hd64465_outl,
.mv_insb = hd64465_insb,
.mv_insw = hd64465_insw,
.mv_insl = hd64465_insl,
.mv_outsb = hd64465_outsb,
.mv_outsw = hd64465_outsw,
.mv_outsl = hd64465_outsl,
mv_insb: hd64465_insb,
mv_insw: hd64465_insw,
mv_insl: hd64465_insl,
mv_outsb: hd64465_outsb,
mv_outsw: hd64465_outsw,
mv_outsl: hd64465_outsl,
.mv_readb = generic_readb,
.mv_readw = generic_readw,
.mv_readl = generic_readl,
.mv_writeb = generic_writeb,
.mv_writew = generic_writew,
.mv_writel = generic_writel,
mv_readb: generic_readb,
mv_readw: generic_readw,
mv_readl: generic_readl,
mv_writeb: generic_writeb,
mv_writew: generic_writew,
mv_writel: generic_writel,
.mv_irq_demux = hd64465_irq_demux,
mv_irq_demux: hd64465_irq_demux,
.mv_rtc_gettimeofday = sh_rtc_gettimeofday,
.mv_rtc_settimeofday = sh_rtc_settimeofday,
mv_rtc_gettimeofday: sh_rtc_gettimeofday,
mv_rtc_settimeofday: sh_rtc_settimeofday,
.mv_hw_hd64465 = 1,
mv_hw_hd64465: 1,
};
ALIAS_MV(dmida)
#
# Makefile for the Sega Dreamcast specific parts of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := mach.o setup.o io.o irq.o rtc.o
obj-$(CONFIG_PCI) += pci.o
/*
* $Id: io_dc.c,v 1.2 2001/05/24 00:13:47 gniibe Exp $
* $Id: io.c,v 1.1.2.1 2002/01/19 23:54:19 mrbrown Exp $
* I/O routines for SEGA Dreamcast
*/
......
/* arch/sh/kernel/setup_dc.c
/*
* arch/sh/boards/dreamcast/irq.c
*
* Hardware support for the Sega Dreamcast.
* Holly IRQ support for the Sega Dreamcast.
*
* Copyright (c) 2001 M. R. Brown <mrbrown@linuxdc.org>
* Copyright (c) 2001, 2002 M. R. Brown <mrbrown@0xd6.org>
*
* This file is part of the LinuxDC project (www.linuxdc.org)
*
* Released under the terms of the GNU GPL v2.0.
*
* This file originally bore the message (with enclosed-$):
* Id: setup_dc.c,v 1.5 2001/05/24 05:09:16 mrbrown Exp
* SEGA Dreamcast support
* Released under the terms of the GNU GPL v2.0
*/
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/dc_sysasic.h>
int __init gapspci_init(void);
#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
#include <asm/dreamcast/sysasic.h>
/* Dreamcast System ASIC Hardware Events -
The Dreamcast's System ASIC (located on the PowerVR2 chip) is responsible
for receiving hardware events from system peripherals and triggering an
SH7750 IRQ. Hardware events can trigger IRQs 13, 11, or 9 depending on
which bits are set in the Event Mask Registers (EMRs). When a hardware
event is triggered, it's corresponding bit in the Event Status Registers
(ESRs) is set, and that bit should be rewritten to the ESR to acknowledge
that event.
The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving
hardware events from system peripherals and triggering an SH7750 IRQ.
Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are
set in the Event Mask Registers (EMRs). When a hardware event is
triggered, it's corresponding bit in the Event Status Registers (ESRs)
is set, and that bit should be rewritten to the ESR to acknowledge that
event.
There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event
types can be found in include/asm-sh/dc_sysasic.h. There are three groups
......@@ -70,66 +57,66 @@ int __init gapspci_init(void);
/* Disable the hardware event by masking its bit in its EMR */
static inline void disable_systemasic_irq(unsigned int irq)
{
unsigned long flags;
__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
__u32 mask;
save_and_cli(flags);
mask = inl(emr);
mask &= ~(1 << EVENT_BIT(irq));
outl(mask, emr);
restore_flags(flags);
unsigned long flags;
__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
__u32 mask;
local_irq_save(flags);
mask = inl(emr);
mask &= ~(1 << EVENT_BIT(irq));
outl(mask, emr);
local_irq_restore(flags);
}
/* Enable the hardware event by setting its bit in its EMR */
static inline void enable_systemasic_irq(unsigned int irq)
{
unsigned long flags;
__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
__u32 mask;
save_and_cli(flags);
mask = inl(emr);
mask |= (1 << EVENT_BIT(irq));
outl(mask, emr);
restore_flags(flags);
unsigned long flags;
__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
__u32 mask;
local_irq_save(flags);
mask = inl(emr);
mask |= (1 << EVENT_BIT(irq));
outl(mask, emr);
local_irq_restore(flags);
}
/* Acknowledge a hardware event by writing its bit back to its ESR */
static void ack_systemasic_irq(unsigned int irq)
{
__u32 esr = ESR_BASE + (LEVEL(irq) << 2);
disable_systemasic_irq(irq);
outl((1 << EVENT_BIT(irq)), esr);
__u32 esr = ESR_BASE + (LEVEL(irq) << 2);
disable_systemasic_irq(irq);
outl((1 << EVENT_BIT(irq)), esr);
}
/* After a IRQ has been ack'd and responded to, it needs to be renabled */
static void end_systemasic_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_systemasic_irq(irq);
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_systemasic_irq(irq);
}
static unsigned int startup_systemasic_irq(unsigned int irq)
{
enable_systemasic_irq(irq);
enable_systemasic_irq(irq);
return 0;
return 0;
}
static void shutdown_systemasic_irq(unsigned int irq)
{
disable_systemasic_irq(irq);
disable_systemasic_irq(irq);
}
static struct hw_interrupt_type systemasic_int = {
.typename = "System ASIC",
.startup = startup_systemasic_irq,
.shutdown = shutdown_systemasic_irq,
.enable = enable_systemasic_irq,
.disable = disable_systemasic_irq,
.ack = ack_systemasic_irq,
.end = end_systemasic_irq,
struct hw_interrupt_type systemasic_int = {
typename: "System ASIC",
startup: startup_systemasic_irq,
shutdown: shutdown_systemasic_irq,
enable: enable_systemasic_irq,
disable: disable_systemasic_irq,
ack: ack_systemasic_irq,
end: end_systemasic_irq,
};
/*
......@@ -137,77 +124,37 @@ static struct hw_interrupt_type systemasic_int = {
*/
int systemasic_irq_demux(int irq)
{
__u32 emr, esr, status, level;
__u32 j, bit;
switch (irq) {
case 13:
level = 0;
break;
case 11:
level = 1;
break;
case 9:
level = 2;
break;
default:
return irq;
}
emr = EMR_BASE + (level << 4) + (level << 2);
esr = ESR_BASE + (level << 2);
/* Mask the ESR to filter any spurious, unwanted interrtupts */
status = inl(esr);
status &= inl(emr);
/* Now scan and find the first set bit as the event to map */
for (bit = 1, j = 0; j < 32; bit <<= 1, j++) {
if (status & bit) {
irq = HW_EVENT_IRQ_BASE + j + (level << 5);
return irq;
}
}
/* Not reached */
return irq;
}
int __init setup_dreamcast(void)
{
int i;
/* Mask all hardware events */
/* XXX */
/* Acknowledge any previous events */
/* XXX */
/* Assign all virtual IRQs to the System ASIC int. handler */
for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
irq_desc[i].handler = &systemasic_int;
#ifdef CONFIG_PCI
gapspci_init();
#endif
printk(KERN_INFO "SEGA Dreamcast support.\n");
#if 0
printk(KERN_INFO "BCR1: 0x%08x\n", ctrl_inl(0xff800000));
printk(KERN_INFO "BCR2: 0x%08x\n", ctrl_inw(0xff800004));
printk(KERN_INFO "WCR1: 0x%08x\n", ctrl_inl(0xff800008));
printk(KERN_INFO "WCR2: 0x%08x\n", ctrl_inl(0xff80000c));
printk(KERN_INFO "WCR3: 0x%08x\n", ctrl_inl(0xff800010));
printk(KERN_INFO "MCR: 0x%08x\n", ctrl_inl(0xff800014));
printk(KERN_INFO "PCR: 0x%08x\n", ctrl_inw(0xff800018));
/*
* BCR1: 0xa3020008
* BCR2: 0x0001
* WCR1: 0x01110111
* WCR2: 0x618066d8
* WCR3: 0x07777777
* MCR: 0xc00a0e24
* PCR: 0x0000
*/
#endif
return 0;
__u32 emr, esr, status, level;
__u32 j, bit;
switch (irq) {
case 13:
level = 0;
break;
case 11:
level = 1;
break;
case 9:
level = 2;
break;
default:
return irq;
}
emr = EMR_BASE + (level << 4) + (level << 2);
esr = ESR_BASE + (level << 2);
/* Mask the ESR to filter any spurious, unwanted interrtupts */
status = inl(esr);
status &= inl(emr);
/* Now scan and find the first set bit as the event to map */
for (bit = 1, j = 0; j < 32; bit <<= 1, j++) {
if (status & bit) {
irq = HW_EVENT_IRQ_BASE + j + (level << 5);
return irq;
}
}
/* Not reached */
return irq;
}
/*
* $Id: mach.c,v 1.1.2.5 2002/03/01 11:22:17 lethal Exp $
* SEGA Dreamcast machine vector
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/time.h>
#include <asm/machvec.h>
#include <asm/machvec_init.h>
#include <asm/io_generic.h>
#include <asm/dreamcast/io.h>
#include <asm/irq.h>
void __init dreamcast_pcibios_init(void);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_dreamcast __initmv = {
mv_nr_irqs: NR_IRQS,
mv_inb: generic_inb,
mv_inw: generic_inw,
mv_inl: generic_inl,
mv_outb: generic_outb,
mv_outw: generic_outw,
mv_outl: generic_outl,
mv_inb_p: generic_inb_p,
mv_inw_p: generic_inw,
mv_inl_p: generic_inl,
mv_outb_p: generic_outb_p,
mv_outw_p: generic_outw,
mv_outl_p: generic_outl,
mv_insb: generic_insb,
mv_insw: generic_insw,
mv_insl: generic_insl,
mv_outsb: generic_outsb,
mv_outsw: generic_outsw,
mv_outsl: generic_outsl,
mv_readb: generic_readb,
mv_readw: generic_readw,
mv_readl: generic_readl,
mv_writeb: generic_writeb,
mv_writew: generic_writew,
mv_writel: generic_writel,
mv_ioremap: generic_ioremap,
mv_iounmap: generic_iounmap,
mv_isa_port2addr: dreamcast_isa_port2addr,
mv_irq_demux: systemasic_irq_demux,
mv_hw_dreamcast: 1,
};
ALIAS_MV(dreamcast)
/*
$ $Id: pci-dc.c,v 1.5 2001/08/24 12:38:19 dwmw2 Exp $
$ $Id: pci.c,v 1.1.2.4.2.1 2003/03/31 14:33:18 lethal Exp $
* Dreamcast PCI: Supports SEGA Broadband Adaptor only.
*/
......@@ -14,7 +14,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/dc_sysasic.h>
#include <asm/dreamcast/sysasic.h>
#define GAPSPCI_REGS 0x01001400
#define GAPSPCI_DMA_BASE 0x01840000
......@@ -25,7 +25,26 @@
static int gapspci_dma_used;
static struct pci_bus *pci_root_bus;
/* XXX: Uh... */
static struct resource gapspci_io_resource = {
"GAPSPCI IO",
0x01001600,
0x010016ff,
IORESOURCE_IO
};
static struct resource gapspci_mem_resource = {
"GAPSPCI mem",
0x01840000,
0x01847fff,
IORESOURCE_MEM
};
static struct pci_ops gapspci_pci_ops;
struct pci_channel board_pci_channels[] = {
{&gapspci_pci_ops, &gapspci_io_resource, &gapspci_mem_resource, 0, 1},
{NULL, NULL, NULL, 0, 0},
};
struct pci_fixup pcibios_fixups[] = {
{0, 0, 0, NULL}
......@@ -39,23 +58,23 @@ static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int
case 1:
if (BBA_SELECTED(bus, devfn))
*val = (u8)inb(GAPSPCI_BBA_CONFIG+where);
else
else
*val = (u8)0xff;
break;
case 2:
if (BBA_SELECTED(bus, devfn))
*val = (u16)inw(GAPSPCI_BBA_CONFIG+where);
else
else
*val = (u16)0xffff;
break;
case 4:
if (BBA_SELECTED(bus, devfn))
*val = inl(GAPSPCI_BBA_CONFIG+where);
else
*val = 0xffffffff;
*val = inl(GAPSPCI_BBA_CONFIG+where);
else
*val = 0xffffffff;
break;
}
return PCIBIOS_SUCCESSFUL;
return PCIBIOS_SUCCESSFUL;
}
static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
......@@ -72,14 +91,14 @@ static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int
break;
case 4:
if (BBA_SELECTED(bus, devfn))
outl(val, GAPSPCI_BBA_CONFIG+where);
outl(val, GAPSPCI_BBA_CONFIG+where);
break;
}
}
return PCIBIOS_SUCCESSFUL;
return PCIBIOS_SUCCESSFUL;
}
static struct pci_ops pci_config_ops = {
static struct pci_ops gapspci_pci_ops = {
.read = gapspci_read,
.write = gapspci_write,
};
......@@ -122,7 +141,7 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
dev = pci_dev_b(ln);
if (!BBA_SELECTED(bus, dev->devfn)) continue;
printk("PCI: MMIO fixup to %s\n", dev->name);
printk("PCI: MMIO fixup to %s\n", dev->dev.name);
dev->resource[1].start=0x01001700;
dev->resource[1].end=0x010017ff;
}
......@@ -140,22 +159,13 @@ static int __init map_dc_irq(struct pci_dev *dev, u8 slot, u8 pin)
return GAPSPCI_IRQ;
}
void __init pcibios_fixup(void) { /* Do nothing. */ }
void __init pcibios_init(void)
void __init pcibios_fixup_irqs(void)
{
pci_root_bus = pci_scan_bus(0, &pci_config_ops, NULL);
/* pci_assign_unassigned_resources(); */
pci_fixup_irqs(no_swizzle, map_dc_irq);
}
/* Haven't done anything here as yet */
char * __init pcibios_setup(char *str)
{
return str;
}
int __init gapspci_init(void)
{
int i;
......@@ -196,3 +206,9 @@ int __init gapspci_init(void)
return 0;
}
/* Haven't done anything here as yet */
char * __devinit pcibios_setup(char *str)
{
return str;
}
......@@ -2,7 +2,8 @@
*
* Dreamcast AICA RTC routines.
*
* Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org>
* Copyright (c) 2001, 2002 M. R. Brown <mrbrown@0xd6.org>
* Copyright (c) 2002 Paul Mundt <lethal@chaoticdreams.org>
*
* Released under the terms of the GNU GPL v2.0.
*
......@@ -12,6 +13,9 @@
#include <asm/io.h>
extern void (*rtc_get_time)(struct timespec *);
extern int (*rtc_set_time)(const time_t);
/* The AICA RTC has an Epoch of 1/1/1950, so we must subtract 20 years (in
seconds to get the standard Unix Epoch when getting the time, and add 20
years when setting the time. */
......@@ -28,7 +32,7 @@
*
* Grabs the current RTC seconds counter and adjusts it to the Unix Epoch.
*/
void aica_rtc_gettimeofday(struct timeval *tv) {
void aica_rtc_gettimeofday(struct timespec *ts) {
unsigned long val1, val2;
do {
......@@ -39,10 +43,10 @@ void aica_rtc_gettimeofday(struct timeval *tv) {
(ctrl_inl(AICA_RTC_SECS_L) & 0xffff);
} while (val1 != val2);
tv->tv_sec = val1 - TWENTY_YEARS;
ts->tv_sec = val1 - TWENTY_YEARS;
/* Can't get microseconds with just a seconds counter. */
tv->tv_usec = 0;
/* Can't get nanoseconds with just a seconds counter. */
ts->tv_nsec = 0;
}
/**
......@@ -51,13 +55,13 @@ void aica_rtc_gettimeofday(struct timeval *tv) {
*
* Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter.
*/
int aica_rtc_settimeofday(const struct timeval *tv) {
int aica_rtc_settimeofday(const time_t secs) {
unsigned long val1, val2;
unsigned long secs = tv->tv_sec + TWENTY_YEARS;
unsigned long adj = secs + TWENTY_YEARS;
do {
ctrl_outl((secs & 0xffff0000) >> 16, AICA_RTC_SECS_H);
ctrl_outl((secs & 0xffff), AICA_RTC_SECS_L);
ctrl_outl((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H);
ctrl_outl((adj & 0xffff), AICA_RTC_SECS_L);
val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) |
(ctrl_inl(AICA_RTC_SECS_L) & 0xffff);
......@@ -68,3 +72,10 @@ int aica_rtc_settimeofday(const struct timeval *tv) {
return 0;
}
void aica_time_init(void)
{
rtc_get_time = aica_rtc_gettimeofday;
rtc_set_time = aica_rtc_settimeofday;
}
/* arch/sh/kernel/setup_dc.c
*
* Hardware support for the Sega Dreamcast.
*
* Copyright (c) 2001, 2002 M. R. Brown <mrbrown@linuxdc.org>
* Copyright (c) 2002 Paul Mundt <lethal@chaoticdreams.org>
*
* This file is part of the LinuxDC project (www.linuxdc.org)
*
* Released under the terms of the GNU GPL v2.0.
*
* This file originally bore the message (with enclosed-$):
* Id: setup_dc.c,v 1.5 2001/05/24 05:09:16 mrbrown Exp
* SEGA Dreamcast support
*/
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/dreamcast/sysasic.h>
extern struct hw_interrupt_type systemasic_int;
/* XXX: Move this into it's proper header. */
extern void (*board_time_init)(void);
extern void aica_time_init(void);
const char *get_system_type(void)
{
return "Sega Dreamcast";
}
#ifdef CONFIG_PCI
extern int gapspci_init(void);
#endif
int __init platform_setup(void)
{
int i;
/* Mask all hardware events */
/* XXX */
/* Acknowledge any previous events */
/* XXX */
/* Assign all virtual IRQs to the System ASIC int. handler */
for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
irq_desc[i].handler = &systemasic_int;
board_time_init = aica_time_init;
#ifdef CONFIG_PCI
if (gapspci_init() < 0)
printk(KERN_WARNING "GAPSPCI was not detected.\n");
#endif
return 0;
}
#
# Makefile for the EC3104 specific parts of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := mach.o setup.o io.o irq.o
......@@ -18,7 +18,7 @@
#include <linux/types.h>
#include <asm/io.h>
#include <asm/page.h>
#include <asm/ec3104.h>
#include <asm/ec3104/ec3104.h>
/*
* EC3104 has a real ISA bus which we redirect low port accesses to (the
......
......@@ -28,42 +28,42 @@
*/
struct sh_machine_vector mv_ec3104 __initmv = {
.mv_name = "EC3104",
mv_name: "EC3104",
.mv_nr_irqs = 96,
mv_nr_irqs: 96,
.mv_inb = ec3104_inb,
.mv_inw = ec3104_inw,
.mv_inl = ec3104_inl,
.mv_outb = ec3104_outb,
.mv_outw = ec3104_outw,
.mv_outl = ec3104_outl,
mv_inb: ec3104_inb,
mv_inw: ec3104_inw,
mv_inl: ec3104_inl,
mv_outb: ec3104_outb,
mv_outw: ec3104_outw,
mv_outl: ec3104_outl,
.mv_inb_p = generic_inb_p,
.mv_inw_p = generic_inw,
.mv_inl_p = generic_inl,
.mv_outb_p = generic_outb_p,
.mv_outw_p = generic_outw,
.mv_outl_p = generic_outl,
mv_inb_p: generic_inb_p,
mv_inw_p: generic_inw,
mv_inl_p: generic_inl,
mv_outb_p: generic_outb_p,
mv_outw_p: generic_outw,
mv_outl_p: generic_outl,
.mv_insb = generic_insb,
.mv_insw = generic_insw,
.mv_insl = generic_insl,
.mv_outsb = generic_outsb,
.mv_outsw = generic_outsw,
.mv_outsl = generic_outsl,
mv_insb: generic_insb,
mv_insw: generic_insw,
mv_insl: generic_insl,
mv_outsb: generic_outsb,
mv_outsw: generic_outsw,
mv_outsl: generic_outsl,
.mv_readb = generic_readb,
.mv_readw = generic_readw,
.mv_readl = generic_readl,
.mv_writeb = generic_writeb,
.mv_writew = generic_writew,
.mv_writel = generic_writel,
mv_readb: generic_readb,
mv_readw: generic_readw,
mv_readl: generic_readl,
mv_writeb: generic_writeb,
mv_writew: generic_writew,
mv_writel: generic_writel,
.mv_irq_demux = ec3104_irq_demux,
mv_irq_demux: ec3104_irq_demux,
.mv_rtc_gettimeofday = sh_rtc_gettimeofday,
.mv_rtc_settimeofday = sh_rtc_settimeofday,
mv_rtc_gettimeofday: sh_rtc_gettimeofday,
mv_rtc_settimeofday: sh_rtc_settimeofday,
};
ALIAS_MV(ec3104)
/*
* linux/arch/sh/boards/ec3104/setup.c
* EC3104 companion chip support
*
* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
*
*/
/* EC3104 note:
* This code was written without any documentation about the EC3104 chip. While
* I hope I got most of the basic functionality right, the register names I use
* are most likely completely different from those in the chip documentation.
*
* If you have any further information about the EC3104, please tell me
* (prumpf@tux.org).
*/
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/types.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/ec3104/ec3104.h>
int __init setup_ec3104(void)
{
char str[8];
int i;
if (!MACH_EC3104)
printk("!MACH_EC3104\n");
if (0)
return 0;
for (i=0; i<8; i++)
str[i] = ctrl_readb(EC3104_BASE + i);
for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++)
irq_desc[i].handler = &ec3104_int;
printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n",
str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE);
/* mask all interrupts. this should have been done by the boot
* loader for us but we want to be sure ... */
ctrl_writel(0xffffffff, EC3104_IMR);
return 0;
}
module_init(setup_ec3104);
#
# Makefile for STMicroelectronics board specific parts of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := irq.o setup.o mach.o led.o
obj-$(CONFIG_PCI) += pcidma.o
......@@ -15,8 +15,7 @@
#include <asm/system.h>
#include <asm/io.h>
#include "harp.h"
#include <asm/harp/harp.h>
#define NUM_EXTERNAL_IRQS 16
......@@ -68,14 +67,14 @@ static void disable_harp_irq(unsigned int irq)
pri -= 8;
}
save_and_cli(flags);
local_irq_save(flags);
mask = ctrl_inl(maskReg);
mask &= (~(1 << pri));
#if defined(INVERT_INTMASK_WRITES)
mask ^= 0xff;
#endif
ctrl_outl(mask, maskReg);
restore_flags(flags);
local_irq_restore(flags);
}
static void enable_harp_irq(unsigned int irq)
......@@ -97,7 +96,7 @@ static void enable_harp_irq(unsigned int irq)
pri -= 8;
}
save_and_cli(flags);
local_irq_save(flags);
mask = ctrl_inl(maskReg);
......@@ -108,7 +107,7 @@ static void enable_harp_irq(unsigned int irq)
#endif
ctrl_outl(mask, maskReg);
restore_flags(flags);
local_irq_restore(flags);
}
/* This functions sets the desired irq handler to be an overdrive type */
......
......@@ -11,7 +11,7 @@
#include <linux/config.h>
#include <asm/io.h>
#include "harp.h"
#include <asm/harp/harp.h>
/* Harp: Flash LD10 (front pannel) connected to EPLD (IC8) */
/* Overdrive: Flash LD1 (front panel) connected to EPLD (IC4) */
......
......@@ -24,7 +24,7 @@ void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
ret = (void *) __get_free_pages(gfp, get_order(size));
if (ret != NULL) {
/* Is it necessary to do the memset? */
/* Is it neccessary to do the memset? */
memset(ret, 0, size);
*dma_handle = virt_to_bus(ret);
}
......
......@@ -13,11 +13,17 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/io.h>
#include "harp.h"
#include <asm/harp/harp.h>
const char *get_system_type(void)
{
return "STB1 Harp";
}
/*
* Initialize the board
*/
int __init setup_harp(void)
int __init platform_setup(void)
{
#ifdef CONFIG_SH_STB1_HARP
unsigned long ic8_version, ic36_version;
......
#
# Makefile for the HP620 specific parts of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := mach.o
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#
# Makefile for the HP680 specific parts of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := mach.o
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