Commit 08488e20 authored by Gabriel FERNANDEZ's avatar Gabriel FERNANDEZ Committed by Maxime Coquelin

ARM: STi: DT: STiH416: 416 DT Entry for clockgen A0/1/10/11/12

Patch adds DT entries for clockgen A0/1/10/11/12
Signed-off-by: default avatarPankaj Dev <pankaj.dev@st.com>
Signed-off-by: default avatarGabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: default avatarMaxime Coquelin <maxime.coquelin@st.com>
parent ed3593f9
This diff is collapsed.
...@@ -89,7 +89,7 @@ serial2: serial@fed32000{ ...@@ -89,7 +89,7 @@ serial2: serial@fed32000{
status = "disabled"; status = "disabled";
reg = <0xfed32000 0x2c>; reg = <0xfed32000 0x2c>;
interrupts = <0 197 0>; interrupts = <0 197 0>;
clocks = <&CLK_S_ICN_REG_0>; clocks = <&clk_s_a0_ls CLK_ICN_REG>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>; pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
}; };
...@@ -109,7 +109,7 @@ i2c@fed40000 { ...@@ -109,7 +109,7 @@ i2c@fed40000 {
compatible = "st,comms-ssc4-i2c"; compatible = "st,comms-ssc4-i2c";
reg = <0xfed40000 0x110>; reg = <0xfed40000 0x110>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CLK_S_ICN_REG_0>; clocks = <&clk_s_a0_ls CLK_ICN_REG>;
clock-names = "ssc"; clock-names = "ssc";
clock-frequency = <400000>; clock-frequency = <400000>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -122,7 +122,7 @@ i2c@fed41000 { ...@@ -122,7 +122,7 @@ i2c@fed41000 {
compatible = "st,comms-ssc4-i2c"; compatible = "st,comms-ssc4-i2c";
reg = <0xfed41000 0x110>; reg = <0xfed41000 0x110>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CLK_S_ICN_REG_0>; clocks = <&clk_s_a0_ls CLK_ICN_REG>;
clock-names = "ssc"; clock-names = "ssc";
clock-frequency = <400000>; clock-frequency = <400000>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -176,7 +176,7 @@ ethernet0: dwmac@fe810000 { ...@@ -176,7 +176,7 @@ ethernet0: dwmac@fe810000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii0>; pinctrl-0 = <&pinctrl_mii0>;
clock-names = "stmmaceth"; clock-names = "stmmaceth";
clocks = <&CLK_S_GMAC0_PHY>; clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>;
}; };
ethernet1: dwmac@fef08000 { ethernet1: dwmac@fef08000 {
...@@ -198,7 +198,7 @@ ethernet1: dwmac@fef08000 { ...@@ -198,7 +198,7 @@ ethernet1: dwmac@fef08000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii1>; pinctrl-0 = <&pinctrl_mii1>;
clock-names = "stmmaceth"; clock-names = "stmmaceth";
clocks = <&CLK_S_ETH1_PHY>; clocks = <&clk_s_a0_ls CLK_ETH1_PHY>;
}; };
rc: rc@fe518000 { rc: rc@fe518000 {
......
/*
* This header provides constants clk index STMicroelectronics
* STiH416 SoC.
*/
#ifndef _CLK_STIH416
#define _CLK_STIH416
/* CLOCKGEN A0 */
#define CLK_ICN_REG 0
#define CLK_ETH1_PHY 4
/* CLOCKGEN A1 */
#define CLK_GMAC0_PHY 3
#endif
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