Commit 093d4bc1 authored by Maxim Mikityanskiy's avatar Maxim Mikityanskiy Committed by Saeed Mahameed

net/mlx5e: Use mlx5e_rqt_get_rqtn to access RQT hardware id

In order to abstract from implementation details of mlx5e_rqt, use the
mlx5e_rqt_get_rqtn getter instead of accessing the field directly.
Signed-off-by: default avatarMaxim Mikityanskiy <maximmi@nvidia.com>
Reviewed-by: default avatarTariq Toukan <tariqt@nvidia.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
parent 0570c1c9
......@@ -635,7 +635,7 @@ int mlx5e_ktls_add_rx(struct net_device *netdev, struct sock *sk,
priv_rx->sw_stats = &priv->tls->sw_stats;
mlx5e_set_ktls_rx_priv_ctx(tls_ctx, priv_rx);
rqtn = priv->rx_res->channels[rxq].direct_rqt.rqtn;
rqtn = mlx5e_rqt_get_rqtn(&priv->rx_res->channels[rxq].direct_rqt);
err = mlx5e_ktls_create_tir(mdev, &priv_rx->tirn, rqtn);
if (err)
......
......@@ -3143,7 +3143,9 @@ static void mlx5e_build_indir_tir_ctx(struct mlx5e_priv *priv,
enum mlx5e_traffic_types tt,
u32 *tirc)
{
mlx5e_build_indir_tir_ctx_common(priv, priv->rx_res->indir_rqt.rqtn, tirc);
u32 rqtn = mlx5e_rqt_get_rqtn(&priv->rx_res->indir_rqt);
mlx5e_build_indir_tir_ctx_common(priv, rqtn, tirc);
mlx5e_build_indir_tir_ctx_hash(&priv->rx_res->rss_params,
&tirc_default_config[tt], tirc, false);
}
......@@ -3158,7 +3160,9 @@ static void mlx5e_build_inner_indir_tir_ctx(struct mlx5e_priv *priv,
enum mlx5e_traffic_types tt,
u32 *tirc)
{
mlx5e_build_indir_tir_ctx_common(priv, priv->rx_res->indir_rqt.rqtn, tirc);
u32 rqtn = mlx5e_rqt_get_rqtn(&priv->rx_res->indir_rqt);
mlx5e_build_indir_tir_ctx_common(priv, rqtn, tirc);
mlx5e_build_indir_tir_ctx_hash(&priv->rx_res->rss_params,
&tirc_default_config[tt], tirc, true);
}
......@@ -3237,7 +3241,7 @@ static int mlx5e_create_direct_tir(struct mlx5e_priv *priv, struct mlx5e_tir *ti
return -ENOMEM;
tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
mlx5e_build_direct_tir_ctx(priv, rqt->rqtn, tirc);
mlx5e_build_direct_tir_ctx(priv, mlx5e_rqt_get_rqtn(rqt), tirc);
err = mlx5e_create_tir(priv->mdev, tir, in);
if (unlikely(err))
mlx5_core_warn(priv->mdev, "create tirs failed, %d\n", err);
......
......@@ -528,7 +528,7 @@ static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
MLX5_SET(tirc, tirc, indirect_table, mlx5e_rqt_get_rqtn(&hp->indir_rqt));
mlx5e_build_indir_tir_ctx_hash(&priv->rx_res->rss_params, &ttconfig,
tirc, false);
......
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