Commit 095e24b0 authored by Dirk Brandewie's avatar Dirk Brandewie Committed by Greg Kroah-Hartman

Serial: ce4100: Add PCI UART support for the ce4100

This patch adds support for the PCI UART on the ce4100.
Signed-off-by: default avatarDirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 83abd0d8
...@@ -957,6 +957,22 @@ pci_default_setup(struct serial_private *priv, ...@@ -957,6 +957,22 @@ pci_default_setup(struct serial_private *priv,
return setup_port(priv, port, bar, offset, board->reg_shift); return setup_port(priv, port, bar, offset, board->reg_shift);
} }
static int
ce4100_serial_setup(struct serial_private *priv,
const struct pciserial_board *board,
struct uart_port *port, int idx)
{
int ret;
ret = setup_port(priv, port, 0, 0, board->reg_shift);
port->iotype = UPIO_MEM32;
port->type = PORT_XSCALE;
port->flags = (port->flags | UPF_FIXED_PORT | UPF_FIXED_TYPE);
port->regshift = 2;
return ret;
}
static int skip_tx_en_setup(struct serial_private *priv, static int skip_tx_en_setup(struct serial_private *priv,
const struct pciserial_board *board, const struct pciserial_board *board,
struct uart_port *port, int idx) struct uart_port *port, int idx)
...@@ -981,6 +997,7 @@ static int skip_tx_en_setup(struct serial_private *priv, ...@@ -981,6 +997,7 @@ static int skip_tx_en_setup(struct serial_private *priv,
#define PCI_SUBDEVICE_ID_POCTAL232 0x0308 #define PCI_SUBDEVICE_ID_POCTAL232 0x0308
#define PCI_SUBDEVICE_ID_POCTAL422 0x0408 #define PCI_SUBDEVICE_ID_POCTAL422 0x0408
#define PCI_VENDOR_ID_ADVANTECH 0x13fe #define PCI_VENDOR_ID_ADVANTECH 0x13fe
#define PCI_DEVICE_ID_INTEL_CE4100_UART 0x2e66
#define PCI_DEVICE_ID_ADVANTECH_PCI3620 0x3620 #define PCI_DEVICE_ID_ADVANTECH_PCI3620 0x3620
#define PCI_DEVICE_ID_TITAN_200I 0x8028 #define PCI_DEVICE_ID_TITAN_200I 0x8028
#define PCI_DEVICE_ID_TITAN_400I 0x8048 #define PCI_DEVICE_ID_TITAN_400I 0x8048
...@@ -1072,6 +1089,13 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { ...@@ -1072,6 +1089,13 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
.subdevice = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
.setup = skip_tx_en_setup, .setup = skip_tx_en_setup,
}, },
{
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_CE4100_UART,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
.setup = ce4100_serial_setup,
},
/* /*
* ITE * ITE
*/ */
...@@ -1592,6 +1616,7 @@ enum pci_board_num_t { ...@@ -1592,6 +1616,7 @@ enum pci_board_num_t {
pbn_ADDIDATA_PCIe_2_3906250, pbn_ADDIDATA_PCIe_2_3906250,
pbn_ADDIDATA_PCIe_4_3906250, pbn_ADDIDATA_PCIe_4_3906250,
pbn_ADDIDATA_PCIe_8_3906250, pbn_ADDIDATA_PCIe_8_3906250,
pbn_ce4100_1_115200,
}; };
/* /*
...@@ -2281,6 +2306,12 @@ static struct pciserial_board pci_boards[] __devinitdata = { ...@@ -2281,6 +2306,12 @@ static struct pciserial_board pci_boards[] __devinitdata = {
.uart_offset = 0x200, .uart_offset = 0x200,
.first_offset = 0x1000, .first_offset = 0x1000,
}, },
[pbn_ce4100_1_115200] = {
.flags = FL_BASE0,
.num_ports = 1,
.base_baud = 921600,
.reg_shift = 2,
},
}; };
static const struct pci_device_id softmodem_blacklist[] = { static const struct pci_device_id softmodem_blacklist[] = {
...@@ -3760,6 +3791,11 @@ static struct pci_device_id serial_pci_tbl[] = { ...@@ -3760,6 +3791,11 @@ static struct pci_device_id serial_pci_tbl[] = {
{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865, { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865,
0xA000, 0x3004, 0xA000, 0x3004,
0, 0, pbn_b0_bt_4_115200 }, 0, 0, pbn_b0_bt_4_115200 },
/* Intel CE4100 */
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CE4100_UART,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_ce4100_1_115200 },
/* /*
* These entries match devices with class COMMUNICATION_SERIAL, * These entries match devices with class COMMUNICATION_SERIAL,
......
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