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Commit 09dd3739 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
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ARM: dts: exynos: move exynos-bus nodes out of soc in Exynos4210 

The soc node is supposed to have only device nodes with MMIO addresses,
as reported by dtc W=1:

  exynos4210.dtsi:218.20-224.5:
    Warning (simple_bus_reg): /soc/bus-dmc: missing or empty reg/ranges property

and dtbs_check:

  exynos4210-i9100.dtb: soc: bus-dmc:
    {'compatible': ['samsung,exynos-bus'], 'clocks': [[5, 457]], 'clock-names': ['bus'], 'operating-points-v2': [[82]], 'status': ['disabled']} should not be valid under {'type': 'object'}

Move the bus nodes and their OPP tables out of SoC to fix this.
Re-order them alphabetically while moving and put some of the OPP tables
in device nodes (if they are not shared).

Link: https://lore.kernel.org/r/20230125094513.155063-4-krzysztof.kozlowski@linaro.orgSigned-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 37da6ed2
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Showing with 161 additions and 161 deletions
arch/arm/boot/dts/exynos4210.dtsi
View file @ 09dd3739
......@@ -28,6 +28,151 @@ aliases {
pinctrl2 = &pinctrl_2;
};
bus_acp: bus-acp {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_ACP>;
clock-names = "bus";
operating-points-v2 = <&bus_acp_opp_table>;
status = "disabled";
bus_acp_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
};
};
};
bus_display: bus-display {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK160>;
clock-names = "bus";
operating-points-v2 = <&bus_display_opp_table>;
status = "disabled";
bus_display_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
};
};
bus_dmc: bus-dmc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_DMC>;
clock-names = "bus";
operating-points-v2 = <&bus_dmc_opp_table>;
status = "disabled";
bus_dmc_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <1025000>;
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
opp-microvolt = <1050000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1150000>;
opp-suspend;
};
};
};
bus_fsys: bus-fsys {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK133>;
clock-names = "bus";
operating-points-v2 = <&bus_fsys_opp_table>;
status = "disabled";
bus_fsys_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-10000000 {
opp-hz = /bits/ 64 <10000000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
};
};
bus_lcd0: bus-lcd0 {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK200>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_leftbus: bus-leftbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDL>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_mfc: bus-mfc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_SCLK_MFC>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_peri: bus-peri {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK100>;
clock-names = "bus";
operating-points-v2 = <&bus_peri_opp_table>;
status = "disabled";
bus_peri_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-5000000 {
opp-hz = /bits/ 64 <5000000>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
};
};
bus_rightbus: bus-rightbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDR>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
......@@ -82,6 +227,22 @@ cpu1: cpu@901 {
};
};
bus_leftbus_opp_table: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-suspend;
};
};
soc: soc {
sysram: sram@2020000 {
compatible = "mmio-sram";
......@@ -214,167 +375,6 @@ sysmmu_fimd1: sysmmu@12220000 {
power-domains = <&pd_lcd1>;
#iommu-cells = <0>;
};
bus_dmc: bus-dmc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_DMC>;
clock-names = "bus";
operating-points-v2 = <&bus_dmc_opp_table>;
status = "disabled";
};
bus_acp: bus-acp {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_ACP>;
clock-names = "bus";
operating-points-v2 = <&bus_acp_opp_table>;
status = "disabled";
};
bus_peri: bus-peri {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK100>;
clock-names = "bus";
operating-points-v2 = <&bus_peri_opp_table>;
status = "disabled";
};
bus_fsys: bus-fsys {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK133>;
clock-names = "bus";
operating-points-v2 = <&bus_fsys_opp_table>;
status = "disabled";
};
bus_display: bus-display {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK160>;
clock-names = "bus";
operating-points-v2 = <&bus_display_opp_table>;
status = "disabled";
};
bus_lcd0: bus-lcd0 {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK200>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_leftbus: bus-leftbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDL>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_rightbus: bus-rightbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDR>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_mfc: bus-mfc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_SCLK_MFC>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_dmc_opp_table: opp-table-1 {
compatible = "operating-points-v2";
opp-shared;
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <1025000>;
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
opp-microvolt = <1050000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1150000>;
opp-suspend;
};
};
bus_acp_opp_table: opp-table-2 {
compatible = "operating-points-v2";
opp-shared;
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
};
};
bus_peri_opp_table: opp-table-3 {
compatible = "operating-points-v2";
opp-shared;
opp-5000000 {
opp-hz = /bits/ 64 <5000000>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
};
bus_fsys_opp_table: opp-table-4 {
compatible = "operating-points-v2";
opp-shared;
opp-10000000 {
opp-hz = /bits/ 64 <10000000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
};
bus_display_opp_table: opp-table-5 {
compatible = "operating-points-v2";
opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
};
bus_leftbus_opp_table: opp-table-6 {
compatible = "operating-points-v2";
opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-suspend;
};
};
};
};
......
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