Commit 09eea212 authored by Vandita Kulkarni's avatar Vandita Kulkarni

drm/i915/dsi/xelpd: Add DSI transcoder support

Update ADL_P device info to support DSI0, DSI1

v2: Re-define cpu_transcoder_mask only (Jani)
Signed-off-by: default avatarVandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211019151435.20477-3-vandita.kulkarni@intel.com
parent 6f07707f
...@@ -932,8 +932,6 @@ static const struct intel_device_info adl_s_info = { ...@@ -932,8 +932,6 @@ static const struct intel_device_info adl_s_info = {
#define XE_LPD_FEATURES \ #define XE_LPD_FEATURES \
.abox_mask = GENMASK(1, 0), \ .abox_mask = GENMASK(1, 0), \
.color = { .degamma_lut_size = 0, .gamma_lut_size = 0 }, \ .color = { .degamma_lut_size = 0, .gamma_lut_size = 0 }, \
.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_D), \
.dbuf.size = 4096, \ .dbuf.size = 4096, \
.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \ .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \
BIT(DBUF_S4), \ BIT(DBUF_S4), \
...@@ -955,12 +953,16 @@ static const struct intel_device_info adl_s_info = { ...@@ -955,12 +953,16 @@ static const struct intel_device_info adl_s_info = {
[TRANSCODER_B] = PIPE_B_OFFSET, \ [TRANSCODER_B] = PIPE_B_OFFSET, \
[TRANSCODER_C] = PIPE_C_OFFSET, \ [TRANSCODER_C] = PIPE_C_OFFSET, \
[TRANSCODER_D] = PIPE_D_OFFSET, \ [TRANSCODER_D] = PIPE_D_OFFSET, \
[TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \
[TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \
}, \ }, \
.trans_offsets = { \ .trans_offsets = { \
[TRANSCODER_A] = TRANSCODER_A_OFFSET, \ [TRANSCODER_A] = TRANSCODER_A_OFFSET, \
[TRANSCODER_B] = TRANSCODER_B_OFFSET, \ [TRANSCODER_B] = TRANSCODER_B_OFFSET, \
[TRANSCODER_C] = TRANSCODER_C_OFFSET, \ [TRANSCODER_C] = TRANSCODER_C_OFFSET, \
[TRANSCODER_D] = TRANSCODER_D_OFFSET, \ [TRANSCODER_D] = TRANSCODER_D_OFFSET, \
[TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
[TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
}, \ }, \
XE_LPD_CURSOR_OFFSETS XE_LPD_CURSOR_OFFSETS
...@@ -969,6 +971,9 @@ static const struct intel_device_info adl_p_info = { ...@@ -969,6 +971,9 @@ static const struct intel_device_info adl_p_info = {
XE_LPD_FEATURES, XE_LPD_FEATURES,
PLATFORM(INTEL_ALDERLAKE_P), PLATFORM(INTEL_ALDERLAKE_P),
.require_force_probe = 1, .require_force_probe = 1,
.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
BIT(TRANSCODER_C) | BIT(TRANSCODER_D) |
BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1),
.display.has_cdclk_crawl = 1, .display.has_cdclk_crawl = 1,
.display.has_modular_fia = 1, .display.has_modular_fia = 1,
.display.has_psr_hw_tracking = 0, .display.has_psr_hw_tracking = 0,
...@@ -1038,6 +1043,8 @@ static const struct intel_device_info dg2_info = { ...@@ -1038,6 +1043,8 @@ static const struct intel_device_info dg2_info = {
BIT(VECS0) | BIT(VECS1) | BIT(VECS0) | BIT(VECS1) |
BIT(VCS0) | BIT(VCS2), BIT(VCS0) | BIT(VCS2),
.require_force_probe = 1, .require_force_probe = 1,
.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
BIT(TRANSCODER_C) | BIT(TRANSCODER_D),
}; };
#undef PLATFORM #undef PLATFORM
......
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