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Commit 0abf32a8 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'at91-4.21-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into next/dt 

AT91 DT for 4.21

 - Switch most platforms to the new clock binding
 - Small improvement for Axentia nattis

* tag 'at91-4.21-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: nattis: initialize the BLON pin as output-low early
  ARM: dts: at91: at91sam9rl: switch to new clock bindings
  ARM: dts: at91: at91sam9x5: switch to new clock bindings
  ARM: dts: at91: at91sam9263: switch to new clock bindings
  ARM: dts: at91: at91sam9261: switch to new clock bindings
  ARM: dts: at91: at91sam9260: switch to new clock bindings
  ARM: dts: at91: sama5d2: switch to new clock binding
  ARM: dts: at91: sama5d4: switch to new clock bindings
  ARM: dts: at91: sama5d2: use the divided clock for SMC
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents ac3e0be6 d8007306
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arch/arm/boot/dts/at91-nattis-2-natte-2.dts
View file @ 0abf32a8
......@@ -60,6 +60,8 @@ panel_bl: backlight {
power-supply = <&bl_reg>;
enable-gpios = <&pioA 20 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_blon>;
};
panel: panel {
......@@ -164,6 +166,12 @@ pinctrl_lvds_hipow0: lvds_hipow0 {
(AT91_PINCTRL_OUTPUT |
AT91_PINCTRL_OUTPUT_VAL(0))>;
};
pinctrl_blon: blon {
atmel,pins = <AT91_PIOA 20 AT91_PERIPH_GPIO
(AT91_PINCTRL_OUTPUT |
AT91_PINCTRL_OUTPUT_VAL(0))>;
};
};
};
......
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
View file @ 0abf32a8
......@@ -165,7 +165,7 @@ i2c2: i2c@600 {
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&flx1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus_i2c>;
atmel,fifo-size = <16>;
......@@ -211,7 +211,7 @@ uart7: serial@200 {
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&flx3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
clock-names = "usart";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx3_default>;
......@@ -223,7 +223,7 @@ spi2: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&flx3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
clock-names = "spi_clk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx3_default>;
......@@ -240,7 +240,7 @@ uart6: serial@200 {
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&flx4_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
clock-names = "usart";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx4_default>;
......@@ -252,7 +252,7 @@ spi3: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&flx4_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
clock-names = "spi_clk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>;
......@@ -268,7 +268,7 @@ i2c3: i2c@600 {
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&flx4_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx4_default>;
atmel,fifo-size = <16>;
......
arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
View file @ 0abf32a8
......@@ -197,7 +197,7 @@ i2c2: i2c@600 {
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&flx0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx0_default>;
atmel,fifo-size = <16>;
......
arch/arm/boot/dts/at91-sama5d2_xplained.dts
View file @ 0abf32a8
......@@ -258,7 +258,7 @@ uart5: serial@200 {
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&flx0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
clock-names = "usart";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx0_default>;
......@@ -313,7 +313,7 @@ i2c2: i2c@600 {
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&flx4_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx4_default>;
atmel,fifo-size = <16>;
......
arch/arm/boot/dts/at91-sama5d4ek.dts
View file @ 0abf32a8
......@@ -115,7 +115,7 @@ i2c0: i2c@f8014000 {
wm8904: codec@1a {
compatible = "wlf,wm8904";
reg = <0x1a>;
clocks = <&pck2>;
clocks = <&pmc PMC_TYPE_SYSTEM 10>;
clock-names = "mclk";
};
......
arch/arm/boot/dts/at91sam9260.dtsi
View file @ 0abf32a8
This diff is collapsed.
arch/arm/boot/dts/at91sam9261.dtsi
View file @ 0abf32a8
This diff is collapsed.
arch/arm/boot/dts/at91sam9263.dtsi
View file @ 0abf32a8
This diff is collapsed.
arch/arm/boot/dts/at91sam9g15.dtsi
View file @ 0abf32a8
......@@ -24,6 +24,10 @@ pinctrl@fffff400 {
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9g15-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
};
};
arch/arm/boot/dts/at91sam9g20.dtsi
View file @ 0abf32a8
......@@ -40,28 +40,7 @@ adc0: adc@fffe0000 {
};
pmc: pmc@fffffc00 {
plla: pllack {
atmel,clk-input-range = <2000000 32000000>;
atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
<695000000 750000000 1 0>,
<645000000 700000000 2 0>,
<595000000 650000000 3 0>,
<545000000 600000000 0 1>,
<495000000 550000000 1 1>,
<445000000 500000000 2 1>,
<400000000 450000000 3 1>;
};
pllb: pllbck {
compatible = "atmel,at91sam9g20-clk-pllb";
atmel,clk-input-range = <2000000 32000000>;
atmel,pll-clk-output-ranges = <30000000 100000000 0 0>;
};
mck: masterck {
atmel,clk-output-range = <0 133000000>;
atmel,clk-divisors = <1 2 4 6>;
};
compatible = "atmel,at91sam9g20-pmc", "atmel,at91sam9260-pmc", "syscon";
};
};
};
......
arch/arm/boot/dts/at91sam9g25.dtsi
View file @ 0abf32a8
......@@ -26,6 +26,10 @@ pinctrl@fffff400 {
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9g25-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
};
};
arch/arm/boot/dts/at91sam9g25ek.dts
View file @ 0abf32a8
......@@ -32,9 +32,9 @@ ov2640: camera@30 {
pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>;
pwdn-gpios = <&pioA 13 GPIO_ACTIVE_HIGH>;
clocks = <&pck0>;
clocks = <&pmc PMC_TYPE_SYSTEM 8>;
clock-names = "xvclk";
assigned-clocks = <&pck0>;
assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>;
assigned-clock-rates = <25000000>;
status = "okay";
......
arch/arm/boot/dts/at91sam9g35.dtsi
View file @ 0abf32a8
......@@ -25,6 +25,10 @@ pinctrl@fffff400 {
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9g35-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
};
};
arch/arm/boot/dts/at91sam9rl.dtsi
View file @ 0abf32a8
......@@ -88,7 +88,7 @@ fb0: fb@500000 {
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fb>;
clocks = <&lcd_clk>, <&lcd_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
clock-names = "hclk", "lcdc_clk";
status = "disabled";
};
......@@ -106,7 +106,7 @@ ebi: ebi@10000000 {
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
status = "disabled";
nand_controller: nand-controller {
......@@ -132,7 +132,7 @@ tcb0: timer@fffa0000 {
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
<17 IRQ_TYPE_LEVEL_HIGH 0>,
<18 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
......@@ -143,7 +143,7 @@ mmc0: mmc@fffa4000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
clocks = <&mci0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
clock-names = "mci_clk";
status = "disabled";
};
......@@ -154,7 +154,7 @@ i2c0: i2c@fffa8000 {
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
status = "disabled";
};
......@@ -175,7 +175,7 @@ usart0: serial@fffb0000 {
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
clocks = <&usart0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
clock-names = "usart";
status = "disabled";
};
......@@ -188,7 +188,7 @@ usart1: serial@fffb4000 {
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
clocks = <&usart1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "usart";
status = "disabled";
};
......@@ -201,7 +201,7 @@ usart2: serial@fffb8000 {
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
clocks = <&usart2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "usart";
status = "disabled";
};
......@@ -214,7 +214,7 @@ usart3: serial@fffbc000 {
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
clocks = <&usart3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
clock-names = "usart";
status = "disabled";
};
......@@ -242,7 +242,7 @@ pwm0: pwm@fffc8000 {
reg = <0xfffc8000 0x300>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
clocks = <&pwm_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
clock-names = "pwm_clk";
status = "disabled";
};
......@@ -255,7 +255,7 @@ spi0: spi@fffcc000 {
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
clocks = <&spi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
clock-names = "spi_clk";
status = "disabled";
};
......@@ -266,7 +266,7 @@ adc0: adc@fffd0000 {
compatible = "atmel,at91sam9rl-adc";
reg = <0xfffd0000 0x100>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&adc_clk>, <&adc_op_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
clock-names = "adc_clk", "adc_op_clk";
atmel,adc-use-external-triggers;
atmel,adc-channels-used = <0x3f>;
......@@ -304,7 +304,7 @@ usb0: gadget@fffd4000 {
reg = <0x00600000 0x100000>,
<0xfffd4000 0x4000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&udphs_clk>, <&utmi>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
clock-names = "pclk", "hclk";
status = "disabled";
......@@ -366,7 +366,7 @@ dma0: dma-controller@ffffe600 {
reg = <0xffffe600 0x200>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
clocks = <&dma0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
clock-names = "dma_clk";
};
......@@ -399,7 +399,7 @@ dbgu: serial@fffff200 {
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
clock-names = "usart";
status = "disabled";
};
......@@ -794,7 +794,7 @@ pioA: gpio@fffff400 {
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
};
pioB: gpio@fffff600 {
......@@ -805,7 +805,7 @@ pioB: gpio@fffff600 {
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
};
pioC: gpio@fffff800 {
......@@ -816,7 +816,7 @@ pioC: gpio@fffff800 {
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
};
pioD: gpio@fffffa00 {
......@@ -827,7 +827,7 @@ pioD: gpio@fffffa00 {
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioD_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
};
};
......@@ -835,202 +835,9 @@ pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9rl-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
main: mainck {
compatible = "atmel,at91rm9200-clk-main";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
clocks = <&main_xtal>;
};
plla: pllack {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
clocks = <&main>;
reg = <0>;
atmel,clk-input-range = <1000000 32000000>;
#atmel,pll-clk-output-range-cells = <3>;
atmel,pll-clk-output-ranges = <80000000 200000000 0>,
<190000000 240000000 2>;
};
utmi: utmick {
compatible = "atmel,at91sam9x5-clk-utmi";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_LOCKU>;
clocks = <&main>;
};
mck: masterck {
compatible = "atmel,at91rm9200-clk-master";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>;
};
prog: progck {
compatible = "atmel,at91rm9200-clk-programmable";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
prog0: prog0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
};
systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
pck0: pck0 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
};
periphck {
compatible = "atmel,at91rm9200-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
pioA_clk: pioA_clk {
#clock-cells = <0>;
reg = <2>;
};
pioB_clk: pioB_clk {
#clock-cells = <0>;
reg = <3>;
};
pioC_clk: pioC_clk {
#clock-cells = <0>;
reg = <4>;
};
pioD_clk: pioD_clk {
#clock-cells = <0>;
reg = <5>;
};
usart0_clk: usart0_clk {
#clock-cells = <0>;
reg = <6>;
};
usart1_clk: usart1_clk {
#clock-cells = <0>;
reg = <7>;
};
usart2_clk: usart2_clk {
#clock-cells = <0>;
reg = <8>;
};
usart3_clk: usart3_clk {
#clock-cells = <0>;
reg = <9>;
};
mci0_clk: mci0_clk {
#clock-cells = <0>;
reg = <10>;
};
twi0_clk: twi0_clk {
#clock-cells = <0>;
reg = <11>;
};
twi1_clk: twi1_clk {
#clock-cells = <0>;
reg = <12>;
};
spi0_clk: spi0_clk {
#clock-cells = <0>;
reg = <13>;
};
ssc0_clk: ssc0_clk {
#clock-cells = <0>;
reg = <14>;
};
ssc1_clk: ssc1_clk {
#clock-cells = <0>;
reg = <15>;
};
tc0_clk: tc0_clk {
#clock-cells = <0>;
reg = <16>;
};
tc1_clk: tc1_clk {
#clock-cells = <0>;
reg = <17>;
};
tc2_clk: tc2_clk {
#clock-cells = <0>;
reg = <18>;
};
pwm_clk: pwm_clk {
#clock-cells = <0>;
reg = <19>;
};
adc_clk: adc_clk {
#clock-cells = <0>;
reg = <20>;
};
dma0_clk: dma0_clk {
#clock-cells = <0>;
reg = <21>;
};
udphs_clk: udphs_clk {
#clock-cells = <0>;
reg = <22>;
};
lcd_clk: lcd_clk {
#clock-cells = <0>;
reg = <23>;
};
};
#clock-cells = <2>;
clocks = <&clk32k>, <&main_xtal>;
clock-names = "slow_clk", "main_xtal";
};
rstc@fffffd00 {
......@@ -1049,7 +856,7 @@ pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
};
watchdog@fffffd40 {
......
arch/arm/boot/dts/at91sam9x25.dtsi
View file @ 0abf32a8
......@@ -27,6 +27,10 @@ pinctrl@fffff400 {
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9x25-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
};
};
arch/arm/boot/dts/at91sam9x35.dtsi
View file @ 0abf32a8
......@@ -26,6 +26,10 @@ pinctrl@fffff400 {
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9x35-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
};
};
arch/arm/boot/dts/at91sam9x5.dtsi
View file @ 0abf32a8
This diff is collapsed.
arch/arm/boot/dts/at91sam9x5_can.dtsi
View file @ 0abf32a8
......@@ -13,27 +13,13 @@
/ {
ahb {
apb {
pmc: pmc@fffffc00 {
periphck {
can0_clk: can0_clk {
#clock-cells = <0>;
reg = <29>;
};
can1_clk: can1_clk {
#clock-cells = <0>;
reg = <30>;
};
};
};
can0: can@f8000000 {
compatible = "atmel,at91sam9x5-can";
reg = <0xf8000000 0x300>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can0_rx_tx>;
clocks = <&can0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
clock-names = "can_clk";
status = "disabled";
};
......@@ -44,7 +30,7 @@ can1: can@f8004000 {
interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_rx_tx>;
clocks = <&can1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
clock-names = "can_clk";
status = "disabled";
};
......
arch/arm/boot/dts/at91sam9x5_isi.dtsi
View file @ 0abf32a8
......@@ -44,22 +44,13 @@ pinctrl_isi_data_10_11: isi-0-data-10-11 {
};
};
pmc: pmc@fffffc00 {
periphck {
isi_clk: isi_clk {
#clock-cells = <0>;
reg = <25>;
};
};
};
isi: isi@f8048000 {
compatible = "atmel,at91sam9g45-isi";
reg = <0xf8048000 0x4000>;
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_isi_data_0_7>;
clocks = <&isi_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
clock-names = "isi_clk";
status = "disabled";
port {
......
arch/arm/boot/dts/at91sam9x5_lcd.dtsi
View file @ 0abf32a8
......@@ -17,7 +17,7 @@ hlcdc: hlcdc@f8038000 {
compatible = "atmel,at91sam9x5-hlcdc";
reg = <0xf8038000 0x4000>;
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
clock-names = "periph_clk","sys_clk", "slow_clk";
status = "disabled";
......@@ -143,23 +143,6 @@ AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
};
};
};
pmc: pmc@fffffc00 {
periphck {
lcdc_clk: lcdc_clk {
#clock-cells = <0>;
reg = <25>;
};
};
systemck {
lcdck: lcdck {
#clock-cells = <0>;
reg = <3>;
clocks = <&mck>;
};
};
};
};
};
};
arch/arm/boot/dts/at91sam9x5_macb0.dtsi
View file @ 0abf32a8
......@@ -43,22 +43,13 @@ AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
};
};
pmc: pmc@fffffc00 {
periphck {
macb0_clk: macb0_clk {
#clock-cells = <0>;
reg = <24>;
};
};
};
macb0: ethernet@f802c000 {
compatible = "cdns,at91sam9260-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb0_rmii>;
clocks = <&macb0_clk>, <&macb0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_PERIPHERAL 24>;
clock-names = "hclk", "pclk";
status = "disabled";
};
......
arch/arm/boot/dts/at91sam9x5_macb1.dtsi
View file @ 0abf32a8
......@@ -31,22 +31,13 @@ AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
};
};
pmc: pmc@fffffc00 {
periphck {
macb1_clk: macb1_clk {
#clock-cells = <0>;
reg = <27>;
};
};
};
macb1: ethernet@f8030000 {
compatible = "cdns,at91sam9260-macb", "cdns,macb";
reg = <0xf8030000 0x100>;
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb1_rmii>;
clocks = <&macb1_clk>, <&macb1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 27>;
clock-names = "hclk", "pclk";
status = "disabled";
};
......
arch/arm/boot/dts/at91sam9x5_usart3.dtsi
View file @ 0abf32a8
......@@ -42,15 +42,6 @@ pinctrl_usart3_sck: usart3_sck-0 {
};
};
pmc: pmc@fffffc00 {
periphck {
usart3_clk: usart3_clk {
#clock-cells = <0>;
reg = <8>;
};
};
};
usart3: serial@f8028000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8028000 0x200>;
......@@ -60,7 +51,7 @@ usart3: serial@f8028000 {
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>,
<&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&usart3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "usart";
status = "disabled";
};
......
arch/arm/boot/dts/sama5d2.dtsi
View file @ 0abf32a8
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arch/arm/boot/dts/sama5d4.dtsi
View file @ 0abf32a8
This diff is collapsed.
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