Commit 0b0ffc96 authored by Takeshi Kihara's avatar Takeshi Kihara Committed by Geert Uytterhoeven

pinctrl: sh-pfc: Initial R8A7795 PFC support

Add PFC base support for the R8A7795 SoC.
Signed-off-by: default avatarTakeshi Kihara <takeshi.kihara.df@renesas.com>
[Morimoto-san: updated]
Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 5451d092
...@@ -19,6 +19,7 @@ Required Properties: ...@@ -19,6 +19,7 @@ Required Properties:
- "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller. - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
- "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller. - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
- "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller. - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
- "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
- "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller. - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
- reg: Base address and length of each memory resource used by the pin - reg: Base address and length of each memory resource used by the pin
......
...@@ -65,6 +65,11 @@ config PINCTRL_PFC_R8A7794 ...@@ -65,6 +65,11 @@ config PINCTRL_PFC_R8A7794
depends on ARCH_R8A7794 depends on ARCH_R8A7794
select PINCTRL_SH_PFC select PINCTRL_SH_PFC
config PINCTRL_PFC_R8A7795
def_bool y
depends on ARCH_R8A7795
select PINCTRL_SH_PFC
config PINCTRL_PFC_SH7203 config PINCTRL_PFC_SH7203
def_bool y def_bool y
depends on CPU_SUBTYPE_SH7203 depends on CPU_SUBTYPE_SH7203
......
...@@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o ...@@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o
obj-$(CONFIG_PINCTRL_PFC_R8A7793) += pfc-r8a7791.o obj-$(CONFIG_PINCTRL_PFC_R8A7793) += pfc-r8a7791.o
obj-$(CONFIG_PINCTRL_PFC_R8A7794) += pfc-r8a7794.o obj-$(CONFIG_PINCTRL_PFC_R8A7794) += pfc-r8a7794.o
obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795.o
obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o
obj-$(CONFIG_PINCTRL_PFC_SH7264) += pfc-sh7264.o obj-$(CONFIG_PINCTRL_PFC_SH7264) += pfc-sh7264.o
obj-$(CONFIG_PINCTRL_PFC_SH7269) += pfc-sh7269.o obj-$(CONFIG_PINCTRL_PFC_SH7269) += pfc-sh7269.o
......
...@@ -489,6 +489,12 @@ static const struct of_device_id sh_pfc_of_table[] = { ...@@ -489,6 +489,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
.data = &r8a7794_pinmux_info, .data = &r8a7794_pinmux_info,
}, },
#endif #endif
#ifdef CONFIG_PINCTRL_PFC_R8A7795
{
.compatible = "renesas,pfc-r8a7795",
.data = &r8a7795_pinmux_info,
},
#endif
#ifdef CONFIG_PINCTRL_PFC_SH73A0 #ifdef CONFIG_PINCTRL_PFC_SH73A0
{ {
.compatible = "renesas,pfc-sh73a0", .compatible = "renesas,pfc-sh73a0",
......
...@@ -75,6 +75,7 @@ extern const struct sh_pfc_soc_info r8a7790_pinmux_info; ...@@ -75,6 +75,7 @@ extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
extern const struct sh_pfc_soc_info r8a7791_pinmux_info; extern const struct sh_pfc_soc_info r8a7791_pinmux_info;
extern const struct sh_pfc_soc_info r8a7793_pinmux_info; extern const struct sh_pfc_soc_info r8a7793_pinmux_info;
extern const struct sh_pfc_soc_info r8a7794_pinmux_info; extern const struct sh_pfc_soc_info r8a7794_pinmux_info;
extern const struct sh_pfc_soc_info r8a7795_pinmux_info;
extern const struct sh_pfc_soc_info sh7203_pinmux_info; extern const struct sh_pfc_soc_info sh7203_pinmux_info;
extern const struct sh_pfc_soc_info sh7264_pinmux_info; extern const struct sh_pfc_soc_info sh7264_pinmux_info;
extern const struct sh_pfc_soc_info sh7269_pinmux_info; extern const struct sh_pfc_soc_info sh7269_pinmux_info;
......
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