drm/amd/display: DP YCbCr 4:2:0 support
Update MSA MISC1 bit 6 programming to handle YCbCr 4:2:0 and BT2020 cases. Signed-off-by:Eric Bernstein <eric.bernstein@amd.com> Reviewed-by:
Hersen Wu <hersenxs.wu@amd.com> Acked-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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