Commit 0cdc3fdf authored by Ben Skeggs's avatar Ben Skeggs

drm/nouveau/fifo/gm107-: remove engines from mmu engine mapping array

These are specified by PTOP on Maxwell GPUs.
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 289e0827
......@@ -81,4 +81,6 @@ extern const struct nvkm_enum gk104_fifo_fault_engine[];
extern const struct nvkm_enum gk104_fifo_fault_reason[];
extern const struct nvkm_enum gk104_fifo_fault_hubclient[];
extern const struct nvkm_enum gk104_fifo_fault_gpcclient[];
extern const struct nvkm_enum gm107_fifo_fault_engine[];
#endif
......@@ -24,9 +24,32 @@
#include "gk104.h"
#include "changk104.h"
const struct nvkm_enum
gm107_fifo_fault_engine[] = {
{ 0x01, "DISPLAY" },
{ 0x02, "CAPTURE" },
{ 0x03, "IFB", NULL, NVKM_ENGINE_IFB },
{ 0x04, "BAR1", NULL, NVKM_SUBDEV_BAR },
{ 0x05, "BAR2", NULL, NVKM_SUBDEV_INSTMEM },
{ 0x06, "SCHED" },
{ 0x07, "HOST0" },
{ 0x08, "HOST1" },
{ 0x09, "HOST2" },
{ 0x0a, "HOST3" },
{ 0x0b, "HOST4" },
{ 0x0c, "HOST5" },
{ 0x0d, "HOST6" },
{ 0x0e, "HOST7" },
{ 0x0f, "HOSTSR" },
{ 0x13, "PERF" },
{ 0x17, "PMU" },
{ 0x18, "PTP" },
{}
};
static const struct gk104_fifo_func
gm107_fifo = {
.fault.engine = gk104_fifo_fault_engine,
.fault.engine = gm107_fifo_fault_engine,
.fault.reason = gk104_fifo_fault_reason,
.fault.hubclient = gk104_fifo_fault_hubclient,
.fault.gpcclient = gk104_fifo_fault_gpcclient,
......
......@@ -26,7 +26,7 @@
static const struct gk104_fifo_func
gm200_fifo = {
.fault.engine = gk104_fifo_fault_engine,
.fault.engine = gm107_fifo_fault_engine,
.fault.reason = gk104_fifo_fault_reason,
.fault.hubclient = gk104_fifo_fault_hubclient,
.fault.gpcclient = gk104_fifo_fault_gpcclient,
......
......@@ -24,7 +24,7 @@
static const struct gk104_fifo_func
gm20b_fifo = {
.fault.engine = gk104_fifo_fault_engine,
.fault.engine = gm107_fifo_fault_engine,
.fault.reason = gk104_fifo_fault_reason,
.fault.hubclient = gk104_fifo_fault_hubclient,
.fault.gpcclient = gk104_fifo_fault_gpcclient,
......
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