Commit 0ce6fb5a authored by Russell King's avatar Russell King Committed by Shawn Guo

ARM: dts: imx6qdl-sr-som: split out Broadcom Wi-Fi support

There are two variants of the imx6qdl som: one with Broadcom Wi-Fi and
another with Texas Instruments Wi-Fi.  The two Wi-Fi devices require
different DT bindings, so it's necessary to split out the Broadcom
specifics.
Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 42b769f6
...@@ -42,6 +42,7 @@ ...@@ -42,6 +42,7 @@
#include "imx6dl.dtsi" #include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi" #include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-cubox-i.dtsi" #include "imx6qdl-cubox-i.dtsi"
/ { / {
......
...@@ -43,6 +43,7 @@ ...@@ -43,6 +43,7 @@
#include "imx6dl.dtsi" #include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi" #include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-hummingboard.dtsi" #include "imx6qdl-hummingboard.dtsi"
/ { / {
......
...@@ -42,6 +42,7 @@ ...@@ -42,6 +42,7 @@
#include "imx6q.dtsi" #include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi" #include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-cubox-i.dtsi" #include "imx6qdl-cubox-i.dtsi"
/ { / {
......
...@@ -43,6 +43,7 @@ ...@@ -43,6 +43,7 @@
#include "imx6q.dtsi" #include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi" #include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-brcm.dtsi"
/ { / {
model = "Auvidea H100"; model = "Auvidea H100";
......
...@@ -43,6 +43,7 @@ ...@@ -43,6 +43,7 @@
#include "imx6q.dtsi" #include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi" #include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-hummingboard.dtsi" #include "imx6qdl-hummingboard.dtsi"
/ { / {
......
/*
* Copyright (C) 2013,2014 Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
/ {
clk_sdio: sdio-clock {
compatible = "gpio-gate-clock";
#clock-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
};
reg_brcm: brcm-reg {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 19 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
regulator-name = "brcm_reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <200000>;
};
usdhc1_pwrseq: usdhc1_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
<&gpio6 0 GPIO_ACTIVE_LOW>;
clocks = <&clk_sdio>;
clock-names = "ext_clock";
};
};
&iomuxc {
microsom {
pinctrl_microsom_brcm_bt: microsom-brcm-bt {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x40013070
MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
>;
};
pinctrl_microsom_brcm_osc: microsom-brcm-osc {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
>;
};
pinctrl_microsom_brcm_reg: microsom-brcm-reg {
fsl,pins = <
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x40013070
>;
};
pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
fsl,pins = <
MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x40013070
MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x40013070
>;
};
pinctrl_microsom_uart4: microsom-uart4 {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
>;
};
pinctrl_microsom_usdhc1: microsom-usdhc1 {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
>;
};
};
};
/* UART4 - Connected to optional BRCM Wifi/BT/FM */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
uart-has-rtscts;
status = "okay";
};
/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
bus-width = <4>;
mmc-pwrseq = <&usdhc1_pwrseq>;
keep-power-in-suspend;
no-1-8-v;
non-removable;
vmmc-supply = <&reg_brcm>;
status = "okay";
};
...@@ -39,35 +39,6 @@ ...@@ -39,35 +39,6 @@
* OTHER DEALINGS IN THE SOFTWARE. * OTHER DEALINGS IN THE SOFTWARE.
*/ */
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
/ {
clk_sdio: sdio-clock {
compatible = "gpio-gate-clock";
#clock-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
};
reg_brcm: brcm-reg {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 19 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
regulator-name = "brcm_reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <200000>;
};
usdhc1_pwrseq: usdhc1_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
<&gpio6 0 GPIO_ACTIVE_LOW>;
clocks = <&clk_sdio>;
clock-names = "ext_clock";
};
};
&fec { &fec {
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -80,35 +51,6 @@ &fec { ...@@ -80,35 +51,6 @@ &fec {
&iomuxc { &iomuxc {
microsom { microsom {
pinctrl_microsom_brcm_bt: microsom-brcm-bt {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x40013070
MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
>;
};
pinctrl_microsom_brcm_osc: microsom-brcm-osc {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
>;
};
pinctrl_microsom_brcm_reg: microsom-brcm-reg {
fsl,pins = <
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x40013070
>;
};
pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
fsl,pins = <
MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x40013070
MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x40013070
>;
};
pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 { pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
...@@ -159,26 +101,6 @@ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 ...@@ -159,26 +101,6 @@ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>; >;
}; };
pinctrl_microsom_uart4: microsom-uart4 {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
>;
};
pinctrl_microsom_usdhc1: microsom-usdhc1 {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
>;
};
}; };
}; };
...@@ -187,24 +109,3 @@ &uart1 { ...@@ -187,24 +109,3 @@ &uart1 {
pinctrl-0 = <&pinctrl_microsom_uart1>; pinctrl-0 = <&pinctrl_microsom_uart1>;
status = "okay"; status = "okay";
}; };
/* UART4 - Connected to optional BRCM Wifi/BT/FM */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
uart-has-rtscts;
status = "okay";
};
/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
bus-width = <4>;
mmc-pwrseq = <&usdhc1_pwrseq>;
keep-power-in-suspend;
no-1-8-v;
non-removable;
vmmc-supply = <&reg_brcm>;
status = "okay";
};
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