Commit 0d2c6f02 authored by Maxime Ripard's avatar Maxime Ripard Committed by Chen-Yu Tsai

ARM: sun5i: a10s: Add the HDMI controller node

The A10s has an HDMI controller connected to the second TCON channel. Add
it to our DT.

Since the TV Encoder was the only channel 1 user so far, also add the
property now that we have several users.
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
[wens@csie.org: Replaced CLK_PLL_VIDEO[01]_2X with raw numbers for now
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent 2a451bfa
......@@ -71,7 +71,46 @@ framebuffer@2 {
};
};
display-engine {
compatible = "allwinner,sun5i-a10s-display-engine";
allwinner,pipelines = <&fe0>;
};
soc@01c00000 {
hdmi: hdmi@01c16000 {
compatible = "allwinner,sun5i-a10s-hdmi";
reg = <0x01c16000 0x1000>;
interrupts = <58>;
clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>,
<&ccu 9>,
<&ccu 16>;
clock-names = "ahb", "mod", "pll-0", "pll-1";
dmas = <&dma SUN4I_DMA_NORMAL 16>,
<&dma SUN4I_DMA_NORMAL 16>,
<&dma SUN4I_DMA_DEDICATED 24>;
dma-names = "ddc-tx", "ddc-rx", "audio-tx";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
hdmi_in: port@0 {
reg = <0>;
hdmi_in_tcon0: endpoint {
remote-endpoint = <&tcon0_out_hdmi>;
};
};
hdmi_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
};
pwm: pwm@01c20e00 {
compatible = "allwinner,sun5i-a10s-pwm";
reg = <0x01c20e00 0xc>;
......@@ -128,3 +167,11 @@ spi2_cs0_pins_b: spi2_cs0@1 {
&sram_a {
};
&tcon0_out {
tcon0_out_hdmi: endpoint@2 {
reg = <2>;
remote-endpoint = <&hdmi_in_tcon0>;
allwinner,tcon-channel = <1>;
};
};
......@@ -272,6 +272,7 @@ tcon0_out: port@1 {
tcon0_out_tve0: endpoint@1 {
reg = <1>;
remote-endpoint = <&tve0_in_tcon0>;
allwinner,tcon-channel = <1>;
};
};
};
......
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