Skip to content

L
linux
Commit 0d6dc437 authored by Fabio Aiuto's avatar Fabio Aiuto Committed by Greg Kroah-Hartman
Browse files
Options

staging: rtl8723bs: remove code related to unsupported MCS index values 

remove code related to MCS index from 8 to 31 for
rtl8723bs works only with index from 0 to 7 and
index 32.
Signed-off-by: default avatarFabio Aiuto <fabioaiuto83@gmail.com>
Link: https://lore.kernel.org/r/1d5c8ca570a9f1880864f37099d625f96ea4a1d1.1628329348.git.fabioaiuto83@gmail.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent dfac77ba
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 8 additions and 511 deletions
drivers/staging/rtl8723bs/hal/hal_com.c
View file @ 0d6dc437
...@@ -222,78 +222,6 @@ u8 MRateToHwRate(u8 rate) ...@@ -222,78 +222,6 @@ u8 MRateToHwRate(u8 rate)
case MGN_MCS7: case MGN_MCS7:
ret = DESC_RATEMCS7; ret = DESC_RATEMCS7;
break; break;
case MGN_MCS8:
ret = DESC_RATEMCS8;
break;
case MGN_MCS9:
ret = DESC_RATEMCS9;
break;
case MGN_MCS10:
ret = DESC_RATEMCS10;
break;
case MGN_MCS11:
ret = DESC_RATEMCS11;
break;
case MGN_MCS12:
ret = DESC_RATEMCS12;
break;
case MGN_MCS13:
ret = DESC_RATEMCS13;
break;
case MGN_MCS14:
ret = DESC_RATEMCS14;
break;
case MGN_MCS15:
ret = DESC_RATEMCS15;
break;
case MGN_MCS16:
ret = DESC_RATEMCS16;
break;
case MGN_MCS17:
ret = DESC_RATEMCS17;
break;
case MGN_MCS18:
ret = DESC_RATEMCS18;
break;
case MGN_MCS19:
ret = DESC_RATEMCS19;
break;
case MGN_MCS20:
ret = DESC_RATEMCS20;
break;
case MGN_MCS21:
ret = DESC_RATEMCS21;
break;
case MGN_MCS22:
ret = DESC_RATEMCS22;
break;
case MGN_MCS23:
ret = DESC_RATEMCS23;
break;
case MGN_MCS24:
ret = DESC_RATEMCS24;
break;
case MGN_MCS25:
ret = DESC_RATEMCS25;
break;
case MGN_MCS26:
ret = DESC_RATEMCS26;
break;
case MGN_MCS27:
ret = DESC_RATEMCS27;
break;
case MGN_MCS28:
ret = DESC_RATEMCS28;
break;
case MGN_MCS29:
ret = DESC_RATEMCS29;
break;
case MGN_MCS30:
ret = DESC_RATEMCS30;
break;
case MGN_MCS31:
ret = DESC_RATEMCS31;
break;
default: default:
break; break;
} }
...@@ -366,78 +294,6 @@ u8 HwRateToMRate(u8 rate) ...@@ -366,78 +294,6 @@ u8 HwRateToMRate(u8 rate)
case DESC_RATEMCS7: case DESC_RATEMCS7:
ret_rate = MGN_MCS7; ret_rate = MGN_MCS7;
break; break;
case DESC_RATEMCS8:
ret_rate = MGN_MCS8;
break;
case DESC_RATEMCS9:
ret_rate = MGN_MCS9;
break;
case DESC_RATEMCS10:
ret_rate = MGN_MCS10;
break;
case DESC_RATEMCS11:
ret_rate = MGN_MCS11;
break;
case DESC_RATEMCS12:
ret_rate = MGN_MCS12;
break;
case DESC_RATEMCS13:
ret_rate = MGN_MCS13;
break;
case DESC_RATEMCS14:
ret_rate = MGN_MCS14;
break;
case DESC_RATEMCS15:
ret_rate = MGN_MCS15;
break;
case DESC_RATEMCS16:
ret_rate = MGN_MCS16;
break;
case DESC_RATEMCS17:
ret_rate = MGN_MCS17;
break;
case DESC_RATEMCS18:
ret_rate = MGN_MCS18;
break;
case DESC_RATEMCS19:
ret_rate = MGN_MCS19;
break;
case DESC_RATEMCS20:
ret_rate = MGN_MCS20;
break;
case DESC_RATEMCS21:
ret_rate = MGN_MCS21;
break;
case DESC_RATEMCS22:
ret_rate = MGN_MCS22;
break;
case DESC_RATEMCS23:
ret_rate = MGN_MCS23;
break;
case DESC_RATEMCS24:
ret_rate = MGN_MCS24;
break;
case DESC_RATEMCS25:
ret_rate = MGN_MCS25;
break;
case DESC_RATEMCS26:
ret_rate = MGN_MCS26;
break;
case DESC_RATEMCS27:
ret_rate = MGN_MCS27;
break;
case DESC_RATEMCS28:
ret_rate = MGN_MCS28;
break;
case DESC_RATEMCS29:
ret_rate = MGN_MCS29;
break;
case DESC_RATEMCS30:
ret_rate = MGN_MCS30;
break;
case DESC_RATEMCS31:
ret_rate = MGN_MCS31;
break;
default: default:
break; break;
} }
......
drivers/staging/rtl8723bs/hal/odm_HWConfig.c
View file @ 0d6dc437
...@@ -186,10 +186,7 @@ static void odm_RxPhyStatus92CSeries_Parsing( ...@@ -186,10 +186,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(
/* */ /* */
/* (3)EVM of HT rate */ /* (3)EVM of HT rate */
/* */ /* */
if (pPktinfo->data_rate >= DESC_RATEMCS8 && pPktinfo->data_rate <= DESC_RATEMCS15) Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
Max_spatial_stream = 2; /* both spatial stream make sense */
else
Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
for (i = 0; i < Max_spatial_stream; i++) { for (i = 0; i < Max_spatial_stream; i++) {
/* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */ /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
......
drivers/staging/rtl8723bs/hal/odm_RegDefine11N.h
View file @ 0d6dc437
...@@ -111,8 +111,6 @@ ...@@ -111,8 +111,6 @@
#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08 #define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08
#define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10 #define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10
#define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14 #define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14
#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18
#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C
#define ODM_REG_FPGA0_IQK_11N 0xE28 #define ODM_REG_FPGA0_IQK_11N 0xE28
#define ODM_REG_TXIQK_TONE_A_11N 0xE30 #define ODM_REG_TXIQK_TONE_A_11N 0xE30
#define ODM_REG_RXIQK_TONE_A_11N 0xE34 #define ODM_REG_RXIQK_TONE_A_11N 0xE34
......
drivers/staging/rtl8723bs/hal/odm_reg.h
View file @ 0d6dc437
...@@ -32,10 +32,8 @@ ...@@ -32,10 +32,8 @@
#define ODM_TXAGC_B_MCS32_5 0x838 #define ODM_TXAGC_B_MCS32_5 0x838
#define ODM_TXAGC_B_MCS0_MCS3 0x83c #define ODM_TXAGC_B_MCS0_MCS3 0x83c
#define ODM_TXAGC_B_MCS4_MCS7 0x848 #define ODM_TXAGC_B_MCS4_MCS7 0x848
#define ODM_TXAGC_B_MCS8_MCS11 0x84c
#define ODM_ANALOG_REGISTER 0x85c #define ODM_ANALOG_REGISTER 0x85c
#define ODM_RF_INTERFACE_OUTPUT 0x860 #define ODM_RF_INTERFACE_OUTPUT 0x860
#define ODM_TXAGC_B_MCS12_MCS15 0x868
#define ODM_TXAGC_B_11_A_2_11 0x86c #define ODM_TXAGC_B_11_A_2_11 0x86c
#define ODM_AD_DA_LSB_MASK 0x874 #define ODM_AD_DA_LSB_MASK 0x874
#define ODM_ENABLE_3_WIRE 0x88c #define ODM_ENABLE_3_WIRE 0x88c
...@@ -71,8 +69,6 @@ ...@@ -71,8 +69,6 @@
#define ODM_TXAGC_A_1_MCS32 0xe08 #define ODM_TXAGC_A_1_MCS32 0xe08
#define ODM_TXAGC_A_MCS0_MCS3 0xe10 #define ODM_TXAGC_A_MCS0_MCS3 0xe10
#define ODM_TXAGC_A_MCS4_MCS7 0xe14 #define ODM_TXAGC_A_MCS4_MCS7 0xe14
#define ODM_TXAGC_A_MCS8_MCS11 0xe18
#define ODM_TXAGC_A_MCS12_MCS15 0xe1c
/* RF REG */ /* RF REG */
#define ODM_GAIN_SETTING 0x00 #define ODM_GAIN_SETTING 0x00
......
drivers/staging/rtl8723bs/include/hal_com.h
View file @ 0d6dc437
...@@ -45,30 +45,6 @@ ...@@ -45,30 +45,6 @@
#define DESC_RATEMCS5 0x11 #define DESC_RATEMCS5 0x11
#define DESC_RATEMCS6 0x12 #define DESC_RATEMCS6 0x12
#define DESC_RATEMCS7 0x13 #define DESC_RATEMCS7 0x13
#define DESC_RATEMCS8 0x14
#define DESC_RATEMCS9 0x15
#define DESC_RATEMCS10 0x16
#define DESC_RATEMCS11 0x17
#define DESC_RATEMCS12 0x18
#define DESC_RATEMCS13 0x19
#define DESC_RATEMCS14 0x1a
#define DESC_RATEMCS15 0x1b
#define DESC_RATEMCS16 0x1C
#define DESC_RATEMCS17 0x1D
#define DESC_RATEMCS18 0x1E
#define DESC_RATEMCS19 0x1F
#define DESC_RATEMCS20 0x20
#define DESC_RATEMCS21 0x21
#define DESC_RATEMCS22 0x22
#define DESC_RATEMCS23 0x23
#define DESC_RATEMCS24 0x24
#define DESC_RATEMCS25 0x25
#define DESC_RATEMCS26 0x26
#define DESC_RATEMCS27 0x27
#define DESC_RATEMCS28 0x28
#define DESC_RATEMCS29 0x29
#define DESC_RATEMCS30 0x2A
#define DESC_RATEMCS31 0x2B
#define HDATA_RATE(rate)\ #define HDATA_RATE(rate)\
(rate == DESC_RATE1M) ? "CCK_1M" : \ (rate == DESC_RATE1M) ? "CCK_1M" : \
...@@ -90,16 +66,7 @@ ...@@ -90,16 +66,7 @@
(rate == DESC_RATEMCS4) ? "MCS4" : \ (rate == DESC_RATEMCS4) ? "MCS4" : \
(rate == DESC_RATEMCS5) ? "MCS5" : \ (rate == DESC_RATEMCS5) ? "MCS5" : \
(rate == DESC_RATEMCS6) ? "MCS6" : \ (rate == DESC_RATEMCS6) ? "MCS6" : \
(rate == DESC_RATEMCS7) ? "MCS7" : \ (rate == DESC_RATEMCS7) ? "MCS7" : "UNKNOWN"
(rate == DESC_RATEMCS8) ? "MCS8" : \
(rate == DESC_RATEMCS9) ? "MCS9" : \
(rate == DESC_RATEMCS10) ? "MCS10" : \
(rate == DESC_RATEMCS11) ? "MCS11" : \
(rate == DESC_RATEMCS12) ? "MCS12" : \
(rate == DESC_RATEMCS13) ? "MCS13" : \
(rate == DESC_RATEMCS14) ? "MCS14" : \
(rate == DESC_RATEMCS15) ? "MCS15" : "UNKNOWN"
enum{ enum{
UP_LINK, UP_LINK,
......
drivers/staging/rtl8723bs/include/hal_com_phycfg.h
View file @ 0d6dc437
...@@ -16,9 +16,6 @@ enum rate_section { ...@@ -16,9 +16,6 @@ enum rate_section {
CCK = 0, CCK = 0,
OFDM, OFDM,
HT_MCS0_MCS7, HT_MCS0_MCS7,
HT_MCS8_MCS15,
HT_MCS16_MCS23,
HT_MCS24_MCS31,
}; };
enum { enum {
......
drivers/staging/rtl8723bs/include/hal_com_reg.h
View file @ 0d6dc437
...@@ -662,15 +662,6 @@ Default: 00b. ...@@ -662,15 +662,6 @@ Default: 00b.
#define RATR_MCS5 0x00020000 #define RATR_MCS5 0x00020000
#define RATR_MCS6 0x00040000 #define RATR_MCS6 0x00040000
#define RATR_MCS7 0x00080000 #define RATR_MCS7 0x00080000
/* MCS 2 Spatial Stream */
#define RATR_MCS8 0x00100000
#define RATR_MCS9 0x00200000
#define RATR_MCS10 0x00400000
#define RATR_MCS11 0x00800000
#define RATR_MCS12 0x01000000
#define RATR_MCS13 0x02000000
#define RATR_MCS14 0x04000000
#define RATR_MCS15 0x08000000
/* CCK */ /* CCK */
#define RATE_1M BIT(0) #define RATE_1M BIT(0)
...@@ -695,16 +686,6 @@ Default: 00b. ...@@ -695,16 +686,6 @@ Default: 00b.
#define RATE_MCS5 BIT(17) #define RATE_MCS5 BIT(17)
#define RATE_MCS6 BIT(18) #define RATE_MCS6 BIT(18)
#define RATE_MCS7 BIT(19) #define RATE_MCS7 BIT(19)
/* MCS 2 Spatial Stream */
#define RATE_MCS8 BIT(20)
#define RATE_MCS9 BIT(21)
#define RATE_MCS10 BIT(22)
#define RATE_MCS11 BIT(23)
#define RATE_MCS12 BIT(24)
#define RATE_MCS13 BIT(25)
#define RATE_MCS14 BIT(26)
#define RATE_MCS15 BIT(27)
/* ALL CCK Rate */ /* ALL CCK Rate */
#define RATE_BITMAP_ALL 0xFFFFF #define RATE_BITMAP_ALL 0xFFFFF
......
drivers/staging/rtl8723bs/include/ieee80211.h
View file @ 0d6dc437
...@@ -389,30 +389,6 @@ enum { ...@@ -389,30 +389,6 @@ enum {
MGN_MCS5, MGN_MCS5,
MGN_MCS6, MGN_MCS6,
MGN_MCS7, MGN_MCS7,
MGN_MCS8,
MGN_MCS9,
MGN_MCS10,
MGN_MCS11,
MGN_MCS12,
MGN_MCS13,
MGN_MCS14,
MGN_MCS15,
MGN_MCS16,
MGN_MCS17,
MGN_MCS18,
MGN_MCS19,
MGN_MCS20,
MGN_MCS21,
MGN_MCS22,
MGN_MCS23,
MGN_MCS24,
MGN_MCS25,
MGN_MCS26,
MGN_MCS27,
MGN_MCS28,
MGN_MCS29,
MGN_MCS30,
MGN_MCS31,
MGN_UNKNOWN MGN_UNKNOWN
}; };
......
drivers/staging/rtl8723bs/include/rtl8723b_xmit.h
View file @ 0d6dc437
...@@ -394,14 +394,6 @@ struct txdesc_8723b { ...@@ -394,14 +394,6 @@ struct txdesc_8723b {
#define DESC8723B_RATEMCS5 0x11 #define DESC8723B_RATEMCS5 0x11
#define DESC8723B_RATEMCS6 0x12 #define DESC8723B_RATEMCS6 0x12
#define DESC8723B_RATEMCS7 0x13 #define DESC8723B_RATEMCS7 0x13
#define DESC8723B_RATEMCS8 0x14
#define DESC8723B_RATEMCS9 0x15
#define DESC8723B_RATEMCS10 0x16
#define DESC8723B_RATEMCS11 0x17
#define DESC8723B_RATEMCS12 0x18
#define DESC8723B_RATEMCS13 0x19
#define DESC8723B_RATEMCS14 0x1a
#define DESC8723B_RATEMCS15 0x1b
#define RX_HAL_IS_CCK_RATE_8723B(pDesc)\ #define RX_HAL_IS_CCK_RATE_8723B(pDesc)\
(GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE1M ||\ (GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE1M ||\
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7