Commit 0e6c027c authored by Samuel Holland's avatar Samuel Holland Committed by Marc Zyngier

genirq: GENERIC_IRQ_EFFECTIVE_AFF_MASK depends on SMP

An IRQ's effective affinity can only be different from its configured
affinity if there are multiple CPUs. Make it clear that this option is
only meaningful when SMP is enabled. Most of the relevant code in
irqdesc.c is already hidden behind CONFIG_SMP anyway.
Signed-off-by: default avatarSamuel Holland <samuel@sholland.org>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220701200056.46555-4-samuel@sholland.org
parent 0f5209fe
...@@ -40,7 +40,7 @@ config ARCH_HIP04 ...@@ -40,7 +40,7 @@ config ARCH_HIP04
select HAVE_ARM_ARCH_TIMER select HAVE_ARM_ARCH_TIMER
select MCPM if SMP select MCPM if SMP
select MCPM_QUAD_CLUSTER if SMP select MCPM_QUAD_CLUSTER if SMP
select GENERIC_IRQ_EFFECTIVE_AFF_MASK select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
help help
Support for Hisilicon HiP04 SoC family Support for Hisilicon HiP04 SoC family
......
...@@ -8,7 +8,7 @@ config IRQCHIP ...@@ -8,7 +8,7 @@ config IRQCHIP
config ARM_GIC config ARM_GIC
bool bool
select IRQ_DOMAIN_HIERARCHY select IRQ_DOMAIN_HIERARCHY
select GENERIC_IRQ_EFFECTIVE_AFF_MASK select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
config ARM_GIC_PM config ARM_GIC_PM
bool bool
...@@ -34,7 +34,7 @@ config ARM_GIC_V3 ...@@ -34,7 +34,7 @@ config ARM_GIC_V3
bool bool
select IRQ_DOMAIN_HIERARCHY select IRQ_DOMAIN_HIERARCHY
select PARTITION_PERCPU select PARTITION_PERCPU
select GENERIC_IRQ_EFFECTIVE_AFF_MASK select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
config ARM_GIC_V3_ITS config ARM_GIC_V3_ITS
bool bool
...@@ -76,7 +76,7 @@ config ARMADA_370_XP_IRQ ...@@ -76,7 +76,7 @@ config ARMADA_370_XP_IRQ
bool bool
select GENERIC_IRQ_CHIP select GENERIC_IRQ_CHIP
select PCI_MSI if PCI select PCI_MSI if PCI
select GENERIC_IRQ_EFFECTIVE_AFF_MASK select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
config ALPINE_MSI config ALPINE_MSI
bool bool
...@@ -112,7 +112,7 @@ config BCM6345_L1_IRQ ...@@ -112,7 +112,7 @@ config BCM6345_L1_IRQ
bool bool
select GENERIC_IRQ_CHIP select GENERIC_IRQ_CHIP
select IRQ_DOMAIN select IRQ_DOMAIN
select GENERIC_IRQ_EFFECTIVE_AFF_MASK select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
config BCM7038_L1_IRQ config BCM7038_L1_IRQ
tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
...@@ -120,7 +120,7 @@ config BCM7038_L1_IRQ ...@@ -120,7 +120,7 @@ config BCM7038_L1_IRQ
default ARCH_BRCMSTB || BMIPS_GENERIC default ARCH_BRCMSTB || BMIPS_GENERIC
select GENERIC_IRQ_CHIP select GENERIC_IRQ_CHIP
select IRQ_DOMAIN select IRQ_DOMAIN
select GENERIC_IRQ_EFFECTIVE_AFF_MASK select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
config BCM7120_L2_IRQ config BCM7120_L2_IRQ
tristate "Broadcom STB 7120-style L2 interrupt controller driver" tristate "Broadcom STB 7120-style L2 interrupt controller driver"
...@@ -179,7 +179,7 @@ config IRQ_MIPS_CPU ...@@ -179,7 +179,7 @@ config IRQ_MIPS_CPU
select GENERIC_IRQ_CHIP select GENERIC_IRQ_CHIP
select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING
select IRQ_DOMAIN select IRQ_DOMAIN
select GENERIC_IRQ_EFFECTIVE_AFF_MASK select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
config CLPS711X_IRQCHIP config CLPS711X_IRQCHIP
bool bool
...@@ -294,7 +294,7 @@ config VERSATILE_FPGA_IRQ_NR ...@@ -294,7 +294,7 @@ config VERSATILE_FPGA_IRQ_NR
config XTENSA_MX config XTENSA_MX
bool bool
select IRQ_DOMAIN select IRQ_DOMAIN
select GENERIC_IRQ_EFFECTIVE_AFF_MASK select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
config XILINX_INTC config XILINX_INTC
bool "Xilinx Interrupt Controller IP" bool "Xilinx Interrupt Controller IP"
......
...@@ -24,6 +24,7 @@ config GENERIC_IRQ_SHOW_LEVEL ...@@ -24,6 +24,7 @@ config GENERIC_IRQ_SHOW_LEVEL
# Supports effective affinity mask # Supports effective affinity mask
config GENERIC_IRQ_EFFECTIVE_AFF_MASK config GENERIC_IRQ_EFFECTIVE_AFF_MASK
depends on SMP
bool bool
# Support for delayed migration from interrupt context # Support for delayed migration from interrupt context
......
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