Commit 0ff0e219 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Compute clocks earlier

Do the DPLL computation before fastset checks. This should
allow us to get rid of all that horrible fuzzy clock handling
for fastsets. Who knows how many bugs there are caused by our
state not actually matching what the hardware will generate.
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-9-ville.syrjala@linux.intel.com
parent 665a7b04
......@@ -2691,6 +2691,10 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
int ret;
ret = intel_dpll_crtc_compute_clock(state, crtc);
if (ret)
return ret;
ret = intel_crtc_compute_pipe_src(crtc_state);
if (ret)
return ret;
......@@ -6895,10 +6899,6 @@ static int intel_atomic_check(struct drm_device *dev,
if (intel_crtc_needs_modeset(new_crtc_state)) {
any_ms = true;
ret = intel_dpll_crtc_compute_clock(state, crtc);
if (ret)
goto fail;
intel_release_shared_dplls(state, crtc);
continue;
}
......
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