Commit 10fabcb8 authored by Biju Das's avatar Biju Das Committed by Simon Horman

ARM: dts: r8a7744: add VIN dt support

Add VIN[012] support to SoC dt.
Signed-off-by: default avatarBiju Das <biju.das@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 90bcf80c
...@@ -942,6 +942,39 @@ can1: can@e6e88000 { ...@@ -942,6 +942,39 @@ can1: can@e6e88000 {
status = "disabled"; status = "disabled";
}; };
vin0: video@e6ef0000 {
compatible = "renesas,vin-r8a7744",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef0000 0 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>;
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 811>;
status = "disabled";
};
vin1: video@e6ef1000 {
compatible = "renesas,vin-r8a7744",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef1000 0 0x1000>;
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>;
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 810>;
status = "disabled";
};
vin2: video@e6ef2000 {
compatible = "renesas,vin-r8a7744",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef2000 0 0x1000>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 809>;
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 809>;
status = "disabled";
};
rcar_sound: sound@ec500000 { rcar_sound: sound@ec500000 {
/* /*
* #sound-dai-cells is required * #sound-dai-cells is required
......
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