drm/amdgpu: Add otg vertical IRQ Source
[Why & How] In order to get appropriate timing for registers which read/write is vertical line sensitive, add new IRQ source variable. This interrupt is triggered by specific vertical line, Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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