Commit 12325f09 authored by Heiko Carstens's avatar Heiko Carstens Committed by Martin Schwidefsky

s390: cleanup and add sanity checks to control register macros

- turn some macros into functions
- merge two almost identical versions for 32/64 bit
- add BUILD_BUG_ON() check to make sure the passed in array is large enough
Signed-off-by: default avatarHeiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
parent 6aa2677a
...@@ -8,69 +8,59 @@ ...@@ -8,69 +8,59 @@
#define __ASM_CTL_REG_H #define __ASM_CTL_REG_H
#ifdef CONFIG_64BIT #ifdef CONFIG_64BIT
# define __CTL_LOAD "lctlg"
#define __ctl_load(array, low, high) ({ \ # define __CTL_STORE "stctg"
typedef struct { char _[sizeof(array)]; } addrtype; \ #else
asm volatile( \ # define __CTL_LOAD "lctl"
" lctlg %1,%2,%0\n" \ # define __CTL_STORE "stctl"
: : "Q" (*(addrtype *)(&array)), \ #endif
"i" (low), "i" (high)); \
}) #define __ctl_load(array, low, high) { \
typedef struct { char _[sizeof(array)]; } addrtype; \
#define __ctl_store(array, low, high) ({ \ \
typedef struct { char _[sizeof(array)]; } addrtype; \ BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
asm volatile( \ asm volatile( \
" stctg %1,%2,%0\n" \ __CTL_LOAD " %1,%2,%0\n" \
: "=Q" (*(addrtype *)(&array)) \ : : "Q" (*(addrtype *)(&array)), "i" (low), "i" (high));\
: "i" (low), "i" (high)); \ }
})
#define __ctl_store(array, low, high) { \
#else /* CONFIG_64BIT */ typedef struct { char _[sizeof(array)]; } addrtype; \
\
#define __ctl_load(array, low, high) ({ \ BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
typedef struct { char _[sizeof(array)]; } addrtype; \ asm volatile( \
asm volatile( \ __CTL_STORE " %1,%2,%0\n" \
" lctl %1,%2,%0\n" \ : "=Q" (*(addrtype *)(&array)) \
: : "Q" (*(addrtype *)(&array)), \ : "i" (low), "i" (high)); \
"i" (low), "i" (high)); \ }
})
static inline void __ctl_set_bit(unsigned int cr, unsigned int bit)
#define __ctl_store(array, low, high) ({ \ {
typedef struct { char _[sizeof(array)]; } addrtype; \ unsigned long reg;
asm volatile( \
" stctl %1,%2,%0\n" \ __ctl_store(reg, cr, cr);
: "=Q" (*(addrtype *)(&array)) \ reg |= 1UL << bit;
: "i" (low), "i" (high)); \ __ctl_load(reg, cr, cr);
}) }
#endif /* CONFIG_64BIT */ static inline void __ctl_clear_bit(unsigned int cr, unsigned int bit)
{
#define __ctl_set_bit(cr, bit) ({ \ unsigned long reg;
unsigned long __dummy; \
__ctl_store(__dummy, cr, cr); \ __ctl_store(reg, cr, cr);
__dummy |= 1UL << (bit); \ reg &= ~(1UL << bit);
__ctl_load(__dummy, cr, cr); \ __ctl_load(reg, cr, cr);
}) }
#define __ctl_clear_bit(cr, bit) ({ \ void smp_ctl_set_bit(int cr, int bit);
unsigned long __dummy; \ void smp_ctl_clear_bit(int cr, int bit);
__ctl_store(__dummy, cr, cr); \
__dummy &= ~(1UL << (bit)); \
__ctl_load(__dummy, cr, cr); \
})
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
# define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
extern void smp_ctl_set_bit(int cr, int bit); # define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
extern void smp_ctl_clear_bit(int cr, int bit);
#define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
#define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
#else #else
# define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
#define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit) # define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
#define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit) #endif
#endif /* CONFIG_SMP */
#endif /* __ASM_CTL_REG_H */ #endif /* __ASM_CTL_REG_H */
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment