Commit 12696bac authored by Gabriel Fernandez's avatar Gabriel Fernandez Committed by Stephen Boyd

clk: stm32f4: Add I2S clock

This patch introduces I2S clock for stm32f4 soc.
The I2S clock could be derived from an external clock or from pll-i2s
Signed-off-by: default avatarGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent daf2d117
...@@ -946,6 +946,8 @@ static const char *rtc_parents[4] = { ...@@ -946,6 +946,8 @@ static const char *rtc_parents[4] = {
static const char *lcd_parent[1] = { "pllsai-r-div" }; static const char *lcd_parent[1] = { "pllsai-r-div" };
static const char *i2s_parents[2] = { "plli2s-r", NULL };
struct stm32_aux_clk { struct stm32_aux_clk {
int idx; int idx;
const char *name; const char *name;
...@@ -975,6 +977,12 @@ static const struct stm32_aux_clk stm32f429_aux_clk[] = { ...@@ -975,6 +977,12 @@ static const struct stm32_aux_clk stm32f429_aux_clk[] = {
STM32F4_RCC_APB2ENR, 26, STM32F4_RCC_APB2ENR, 26,
CLK_SET_RATE_PARENT CLK_SET_RATE_PARENT
}, },
{
CLK_I2S, "i2s", i2s_parents, ARRAY_SIZE(i2s_parents),
STM32F4_RCC_CFGR, 23, 1,
NO_GATE, 0,
CLK_SET_RATE_PARENT
},
}; };
static const struct stm32f4_clk_data stm32f429_clk_data = { static const struct stm32f4_clk_data stm32f429_clk_data = {
...@@ -1069,7 +1077,7 @@ static struct clk_hw *stm32_register_aux_clk(const char *name, ...@@ -1069,7 +1077,7 @@ static struct clk_hw *stm32_register_aux_clk(const char *name,
static void __init stm32f4_rcc_init(struct device_node *np) static void __init stm32f4_rcc_init(struct device_node *np)
{ {
const char *hse_clk; const char *hse_clk, *i2s_in_clk;
int n; int n;
const struct of_device_id *match; const struct of_device_id *match;
const struct stm32f4_clk_data *data; const struct stm32f4_clk_data *data;
...@@ -1104,6 +1112,10 @@ static void __init stm32f4_rcc_init(struct device_node *np) ...@@ -1104,6 +1112,10 @@ static void __init stm32f4_rcc_init(struct device_node *np)
hse_clk = of_clk_get_parent_name(np, 0); hse_clk = of_clk_get_parent_name(np, 0);
i2s_in_clk = of_clk_get_parent_name(np, 1);
i2s_parents[1] = i2s_in_clk;
clk_register_fixed_rate_with_accuracy(NULL, "hsi", NULL, 0, clk_register_fixed_rate_with_accuracy(NULL, "hsi", NULL, 0,
16000000, 160000); 16000000, 160000);
pllcfgr = readl(base + STM32F4_RCC_PLLCFGR); pllcfgr = readl(base + STM32F4_RCC_PLLCFGR);
......
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