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Commit 1292ebb8 authored by Linus Torvalds's avatar Linus Torvalds
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Merge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6 

* git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6: (61 commits)
  ide: sanitize handling of IDE_HFLAG_NO_SET_MODE host flag
  sis5513: fail early for unsupported chipsets
  it821x: fix kzalloc() failure handling
  qd65xx: use IDE_HFLAG_SINGLE host flag
  qd65xx: always use ->selectproc method
  ide-cd: put proc-related functions together under single ifdef
  ide-cd: Replace __FUNCTION__ with __func__
  IDE: Coding Style fixes to drivers/ide/ide-cd.c
  IDE: Coding Style fixes to drivers/ide/pci/cy82c693.c
  IDE: Coding Style fixes to drivers/ide/pci/it8213.c
  IDE: Coding Style fixes to drivers/ide/ide-floppy.c
  IDE: Coding Style fixes to drivers/ide/legacy/ali14xx.c
  IDE: Coding Style fixes to drivers/ide/legacy/hd.c
  IDE: Coding Style fixes to drivers/ide/pci/cmd640.c
  IDE: Coding Style fixes to drivers/ide/pci/opti621.c
  IDE: Coding Style fixes to drivers/ide/ide-pnp.c
  IDE: Coding Style fixes to drivers/ide/ide-proc.c
  IDE: Coding Style fixes to drivers/ide/legacy/ide-4drives.c
  IDE: Coding Style fixes to drivers/ide/legacy/umc8672.c
  IDE: Coding Style fixes to drivers/ide/pci/generic.c
  ...
parents b8228758 784506cb
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Showing with 1194 additions and 1438 deletions
drivers/ide/Kconfig
View file @ 1292ebb8
......@@ -1031,7 +1031,7 @@ comment "Other IDE chipsets support"
comment "Note: most of these also require special kernel boot parameters"
config BLK_DEV_4DRIVES
bool "Generic 4 drives/port support"
tristate "Generic 4 drives/port support"
help
Certain older chipsets, including the Tekram 690CD, use a single set
of I/O ports at 0x1f0 to control up to four drives, instead of the
......
drivers/ide/arm/bast-ide.c
View file @ 1292ebb8
......@@ -21,6 +21,8 @@
#include <asm/arch/bast-map.h>
#include <asm/arch/bast-irq.h>
#define DRV_NAME "bast-ide"
static int __init bastide_register(unsigned int base, unsigned int aux, int irq)
{
ide_hwif_t *hwif;
......@@ -41,7 +43,7 @@ static int __init bastide_register(unsigned int base, unsigned int aux, int irq)
hw.io_ports[IDE_CONTROL_OFFSET] = aux + (6 * 0x20);
hw.irq = irq;
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif == NULL)
goto out;
......@@ -53,6 +55,7 @@ static int __init bastide_register(unsigned int base, unsigned int aux, int irq)
ide_init_port_data(hwif, i);
ide_init_port_hw(hwif, &hw);
hwif->mmio = 1;
hwif->quirkproc = NULL;
idx[0] = i;
......@@ -64,6 +67,8 @@ static int __init bastide_register(unsigned int base, unsigned int aux, int irq)
static int __init bastide_init(void)
{
unsigned long base = BAST_VA_IDEPRI + BAST_IDE_CS;
/* we can treat the VR1000 and the BAST the same */
if (!(machine_is_bast() || machine_is_vr1000()))
......@@ -71,6 +76,11 @@ static int __init bastide_init(void)
printk("BAST: IDE driver, (c) 2003-2004 Simtec Electronics\n");
if (!request_mem_region(base, 0x400000, DRV_NAME)) {
printk(KERN_ERR "%s: resources busy\n", DRV_NAME);
return -EBUSY;
}
bastide_register(BAST_VA_IDEPRI, BAST_VA_IDEPRIAUX, IRQ_IDE0);
bastide_register(BAST_VA_IDESEC, BAST_VA_IDESECAUX, IRQ_IDE1);
......
drivers/ide/arm/icside.c
View file @ 1292ebb8
......@@ -400,7 +400,7 @@ icside_setup(void __iomem *base, struct cardinfo *info, struct expansion_card *e
unsigned long port = (unsigned long)base + info->dataoffset;
ide_hwif_t *hwif;
hwif = ide_find_port(port);
hwif = ide_find_port();
if (hwif) {
int i;
......
drivers/ide/arm/ide_arm.c
View file @ 1292ebb8
......@@ -34,7 +34,7 @@ static int __init ide_arm_init(void)
ide_std_init_ports(&hw, IDE_ARM_IO, IDE_ARM_IO + 0x206);
hw.irq = IDE_ARM_IRQ;
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif) {
ide_init_port_hw(hwif, &hw);
idx[0] = hwif->index;
......
drivers/ide/arm/palm_bk3710.c
View file @ 1292ebb8
......@@ -96,11 +96,11 @@ static void palm_bk3710_setudmamode(void __iomem *base, unsigned int dev,
u16 val16;
/* DMA Data Setup */
t0 = (palm_bk3710_udmatimings[mode].cycletime + ide_palm_clk - 1)
/ ide_palm_clk - 1;
tenv = (20 + ide_palm_clk - 1) / ide_palm_clk - 1;
trp = (palm_bk3710_udmatimings[mode].rptime + ide_palm_clk - 1)
/ ide_palm_clk - 1;
t0 = DIV_ROUND_UP(palm_bk3710_udmatimings[mode].cycletime,
ide_palm_clk) - 1;
tenv = DIV_ROUND_UP(20, ide_palm_clk) - 1;
trp = DIV_ROUND_UP(palm_bk3710_udmatimings[mode].rptime,
ide_palm_clk) - 1;
/* udmatim Register */
val16 = readw(base + BK3710_UDMATIM) & (dev ? 0xFF0F : 0xFFF0);
......@@ -141,8 +141,8 @@ static void palm_bk3710_setdmamode(void __iomem *base, unsigned int dev,
cycletime = max_t(int, t->cycle, min_cycle);
/* DMA Data Setup */
t0 = (cycletime + ide_palm_clk - 1) / ide_palm_clk;
td = (t->active + ide_palm_clk - 1) / ide_palm_clk;
t0 = DIV_ROUND_UP(cycletime, ide_palm_clk);
td = DIV_ROUND_UP(t->active, ide_palm_clk);
tkw = t0 - td - 1;
td -= 1;
......@@ -168,9 +168,9 @@ static void palm_bk3710_setpiomode(void __iomem *base, ide_drive_t *mate,
struct ide_timing *t;
/* PIO Data Setup */
t0 = (cycletime + ide_palm_clk - 1) / ide_palm_clk;
t2 = (ide_timing_find_mode(XFER_PIO_0 + mode)->active +
ide_palm_clk - 1) / ide_palm_clk;
t0 = DIV_ROUND_UP(cycletime, ide_palm_clk);
t2 = DIV_ROUND_UP(ide_timing_find_mode(XFER_PIO_0 + mode)->active,
ide_palm_clk);
t2i = t0 - t2 - 1;
t2 -= 1;
......@@ -192,8 +192,8 @@ static void palm_bk3710_setpiomode(void __iomem *base, ide_drive_t *mate,
/* TASKFILE Setup */
t = ide_timing_find_mode(XFER_PIO_0 + mode);
t0 = (t->cyc8b + ide_palm_clk - 1) / ide_palm_clk;
t2 = (t->act8b + ide_palm_clk - 1) / ide_palm_clk;
t0 = DIV_ROUND_UP(t->cyc8b, ide_palm_clk);
t2 = DIV_ROUND_UP(t->act8b, ide_palm_clk);
t2i = t0 - t2 - 1;
t2 -= 1;
......@@ -378,7 +378,7 @@ static int __devinit palm_bk3710_probe(struct platform_device *pdev)
hw.irq = irq->start;
hw.chipset = ide_palm3710;
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif == NULL)
goto out;
......
drivers/ide/arm/rapide.c
View file @ 1292ebb8
......@@ -44,7 +44,7 @@ rapide_probe(struct expansion_card *ec, const struct ecard_id *id)
goto release;
}
hwif = ide_find_port((unsigned long)base);
hwif = ide_find_port();
if (hwif) {
memset(&hw, 0, sizeof(hw));
rapide_setup_ports(&hw, base, base + 0x818, 1 << 6, ec->irq);
......
drivers/ide/cris/ide-cris.c
View file @ 1292ebb8
......@@ -804,7 +804,7 @@ static int __init init_e100_ide(void)
cris_setup_ports(&hw, cris_ide_base_address(h));
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif == NULL)
continue;
ide_init_port_data(hwif, hwif->index);
......
drivers/ide/h8300/ide-h8300.c
View file @ 1292ebb8
......@@ -99,8 +99,7 @@ static int __init h8300_ide_init(void)
hw_setup(&hw);
/* register if */
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif == NULL) {
printk(KERN_ERR "ide-h8300: IDE I/F register failed\n");
return -ENOENT;
......
drivers/ide/ide-cd.c
View file @ 1292ebb8
This diff is collapsed.
drivers/ide/ide-cd.h
View file @ 1292ebb8
......@@ -119,10 +119,6 @@ struct cdrom_info {
struct atapi_toc *toc;
unsigned long sector_buffered;
unsigned long nsectors_buffered;
unsigned char *buffer;
/* The result of the last successful request sense command
on this device. */
struct request_sense sense_data;
......
drivers/ide/ide-disk.c
View file @ 1292ebb8
This diff is collapsed.
drivers/ide/ide-dma.c
View file @ 1292ebb8
......@@ -703,17 +703,8 @@ static int ide_tune_dma(ide_drive_t *drive)
speed = ide_max_dma_mode(drive);
if (!speed) {
/* is this really correct/needed? */
if ((hwif->host_flags & IDE_HFLAG_CY82C693) &&
ide_dma_good_drive(drive))
return 1;
else
return 0;
}
if (hwif->host_flags & IDE_HFLAG_NO_SET_MODE)
return 1;
if (!speed)
return 0;
if (ide_set_dma_mode(drive, speed))
return 0;
......
drivers/ide/ide-floppy.c
View file @ 1292ebb8
......@@ -396,7 +396,7 @@ static void idefloppy_retry_pc(ide_drive_t *drive)
}
/* The usual interrupt handler called during a packet command. */
static ide_startstop_t idefloppy_pc_intr (ide_drive_t *drive)
static ide_startstop_t idefloppy_pc_intr(ide_drive_t *drive)
{
idefloppy_floppy_t *floppy = drive->driver_data;
ide_hwif_t *hwif = drive->hwif;
......@@ -1596,13 +1596,13 @@ static int idefloppy_revalidate_disk(struct gendisk *disk)
}
static struct block_device_operations idefloppy_ops = {
.owner = THIS_MODULE,
.open = idefloppy_open,
.release = idefloppy_release,
.ioctl = idefloppy_ioctl,
.getgeo = idefloppy_getgeo,
.media_changed = idefloppy_media_changed,
.revalidate_disk= idefloppy_revalidate_disk
.owner = THIS_MODULE,
.open = idefloppy_open,
.release = idefloppy_release,
.ioctl = idefloppy_ioctl,
.getgeo = idefloppy_getgeo,
.media_changed = idefloppy_media_changed,
.revalidate_disk = idefloppy_revalidate_disk
};
static int ide_floppy_probe(ide_drive_t *drive)
......
drivers/ide/ide-generic.c
View file @ 1292ebb8
......@@ -33,7 +33,7 @@ static ssize_t store_add(struct class *cls, const char *buf, size_t n)
if (sscanf(buf, "%x:%x:%d", &base, &ctl, &irq) != 3)
return -EINVAL;
hwif = ide_find_port(base);
hwif = ide_find_port();
if (hwif == NULL)
return -ENOENT;
......@@ -90,11 +90,21 @@ static int __init ide_generic_init(void)
int i;
for (i = 0; i < MAX_HWIFS; i++) {
ide_hwif_t *hwif = &ide_hwifs[i];
ide_hwif_t *hwif;
unsigned long io_addr = ide_default_io_base(i);
hw_regs_t hw;
if (hwif->chipset == ide_unknown && io_addr) {
if (io_addr) {
/*
* Skip probing if the corresponding
* slot is already occupied.
*/
hwif = ide_find_port();
if (hwif == NULL || hwif->index != i) {
idx[i] = 0xff;
continue;
}
memset(&hw, 0, sizeof(hw));
ide_std_init_ports(&hw, io_addr, io_addr + 0x206);
hw.irq = ide_default_irq(io_addr);
......
drivers/ide/ide-io.c
View file @ 1292ebb8
......@@ -726,10 +726,6 @@ static ide_startstop_t do_special (ide_drive_t *drive)
s->b.set_tune = 0;
if (set_pio_mode_abuse(drive->hwif, req_pio)) {
if (hwif->set_pio_mode == NULL)
return ide_stopped;
/*
* take ide_lock for drive->[no_]unmask/[no_]io_32bit
*/
......
drivers/ide/ide-lib.c
View file @ 1292ebb8
......@@ -274,16 +274,6 @@ u8 ide_get_best_pio_mode (ide_drive_t *drive, u8 mode_wanted, u8 max_mode)
if (overridden)
printk(KERN_INFO "%s: tPIO > 2, assuming tPIO = 2\n",
drive->name);
/*
* Conservative "downgrade" for all pre-ATA2 drives
*/
if ((drive->hwif->host_flags & IDE_HFLAG_PIO_NO_DOWNGRADE) == 0 &&
pio_mode && pio_mode < 4) {
pio_mode--;
printk(KERN_INFO "%s: applying conservative "
"PIO \"downgrade\"\n", drive->name);
}
}
if (pio_mode > max_mode)
......@@ -300,7 +290,8 @@ void ide_set_pio(ide_drive_t *drive, u8 req_pio)
ide_hwif_t *hwif = drive->hwif;
u8 host_pio, pio;
if (hwif->set_pio_mode == NULL)
if (hwif->set_pio_mode == NULL ||
(hwif->host_flags & IDE_HFLAG_NO_SET_MODE))
return;
BUG_ON(hwif->pio_mask == 0x00);
......@@ -353,6 +344,9 @@ int ide_set_pio_mode(ide_drive_t *drive, const u8 mode)
{
ide_hwif_t *hwif = drive->hwif;
if (hwif->host_flags & IDE_HFLAG_NO_SET_MODE)
return 0;
if (hwif->set_pio_mode == NULL)
return -1;
......@@ -380,6 +374,9 @@ int ide_set_dma_mode(ide_drive_t *drive, const u8 mode)
{
ide_hwif_t *hwif = drive->hwif;
if (hwif->host_flags & IDE_HFLAG_NO_SET_MODE)
return 0;
if (hwif->set_dma_mode == NULL)
return -1;
......@@ -410,7 +407,8 @@ int ide_set_xfer_rate(ide_drive_t *drive, u8 rate)
{
ide_hwif_t *hwif = drive->hwif;
if (hwif->set_dma_mode == NULL)
if (hwif->set_dma_mode == NULL ||
(hwif->host_flags & IDE_HFLAG_NO_SET_MODE))
return -1;
rate = ide_rate_filter(drive, rate);
......
drivers/ide/ide-pnp.c
View file @ 1292ebb8
......@@ -11,7 +11,7 @@
*
* You should have received a copy of the GNU General Public License
* (for example /usr/src/linux/COPYING); if not, write to the Free
* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
......@@ -20,12 +20,12 @@
/* Add your devices here :)) */
static struct pnp_device_id idepnp_devices[] = {
/* Generic ESDI/IDE/ATA compatible hard disk controller */
/* Generic ESDI/IDE/ATA compatible hard disk controller */
{.id = "PNP0600", .driver_data = 0},
{.id = ""}
};
static int idepnp_probe(struct pnp_dev * dev, const struct pnp_device_id *dev_id)
static int idepnp_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id)
{
hw_regs_t hw;
ide_hwif_t *hwif;
......@@ -38,7 +38,7 @@ static int idepnp_probe(struct pnp_dev * dev, const struct pnp_device_id *dev_id
pnp_port_start(dev, 1));
hw.irq = pnp_irq(dev, 0);
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif) {
u8 index = hwif->index;
u8 idx[4] = { index, 0xff, 0xff, 0xff };
......@@ -47,7 +47,7 @@ static int idepnp_probe(struct pnp_dev * dev, const struct pnp_device_id *dev_id
ide_init_port_hw(hwif, &hw);
printk(KERN_INFO "ide%d: generic PnP IDE interface\n", index);
pnp_set_drvdata(dev,hwif);
pnp_set_drvdata(dev, hwif);
ide_device_add(idx, NULL);
......@@ -57,7 +57,7 @@ static int idepnp_probe(struct pnp_dev * dev, const struct pnp_device_id *dev_id
return -1;
}
static void idepnp_remove(struct pnp_dev * dev)
static void idepnp_remove(struct pnp_dev *dev)
{
ide_hwif_t *hwif = pnp_get_drvdata(dev);
......
drivers/ide/ide-probe.c
View file @ 1292ebb8
......@@ -1444,6 +1444,54 @@ static int ide_sysfs_register_port(ide_hwif_t *hwif)
return rc;
}
/**
* ide_find_port_slot - find free ide_hwifs[] slot
* @d: IDE port info
*
* Return the new hwif. If we are out of free slots return NULL.
*/
ide_hwif_t *ide_find_port_slot(const struct ide_port_info *d)
{
ide_hwif_t *hwif;
int i;
u8 bootable = (d && (d->host_flags & IDE_HFLAG_NON_BOOTABLE)) ? 0 : 1;
/*
* Claim an unassigned slot.
*
* Give preference to claiming other slots before claiming ide0/ide1,
* just in case there's another interface yet-to-be-scanned
* which uses ports 0x1f0/0x170 (the ide0/ide1 defaults).
*
* Unless there is a bootable card that does not use the standard
* ports 0x1f0/0x170 (the ide0/ide1 defaults).
*/
if (bootable) {
i = (d && (d->host_flags & IDE_HFLAG_QD_2ND_PORT)) ? 1 : 0;
for (; i < MAX_HWIFS; i++) {
hwif = &ide_hwifs[i];
if (hwif->chipset == ide_unknown)
return hwif;
}
} else {
for (i = 2; i < MAX_HWIFS; i++) {
hwif = &ide_hwifs[i];
if (hwif->chipset == ide_unknown)
return hwif;
}
for (i = 0; i < 2 && i < MAX_HWIFS; i++) {
hwif = &ide_hwifs[i];
if (hwif->chipset == ide_unknown)
return hwif;
}
}
return NULL;
}
EXPORT_SYMBOL_GPL(ide_find_port_slot);
int ide_device_add_all(u8 *idx, const struct ide_port_info *d)
{
ide_hwif_t *hwif, *mate = NULL;
......
drivers/ide/ide-proc.c
View file @ 1292ebb8
This diff is collapsed.
drivers/ide/ide.c
View file @ 1292ebb8
......@@ -100,13 +100,8 @@ int ide_noacpitfs = 1;
int ide_noacpionboot = 1;
#endif
/*
* This is declared extern in ide.h, for access by other IDE modules:
*/
ide_hwif_t ide_hwifs[MAX_HWIFS]; /* master data repository */
EXPORT_SYMBOL(ide_hwifs);
static void ide_port_init_devices_data(ide_hwif_t *);
/*
......@@ -232,30 +227,6 @@ static int ide_system_bus_speed(void)
return pci_dev_present(pci_default) ? 33 : 50;
}
ide_hwif_t * ide_find_port(unsigned long base)
{
ide_hwif_t *hwif;
int i;
for (i = 0; i < MAX_HWIFS; i++) {
hwif = &ide_hwifs[i];
if (hwif->io_ports[IDE_DATA_OFFSET] == base)
goto found;
}
for (i = 0; i < MAX_HWIFS; i++) {
hwif = &ide_hwifs[i];
if (hwif->chipset == ide_unknown)
goto found;
}
hwif = NULL;
found:
return hwif;
}
EXPORT_SYMBOL_GPL(ide_find_port);
static struct resource* hwif_request_region(ide_hwif_t *hwif,
unsigned long addr, int num)
{
......@@ -280,29 +251,21 @@ static struct resource* hwif_request_region(ide_hwif_t *hwif,
int ide_hwif_request_regions(ide_hwif_t *hwif)
{
unsigned long addr;
unsigned int i;
if (hwif->mmio)
return 0;
addr = hwif->io_ports[IDE_CONTROL_OFFSET];
if (addr && !hwif_request_region(hwif, addr, 1))
goto control_region_busy;
hwif->straight8 = 0;
addr = hwif->io_ports[IDE_DATA_OFFSET];
if ((addr | 7) == hwif->io_ports[IDE_STATUS_OFFSET]) {
if (!hwif_request_region(hwif, addr, 8))
goto data_region_busy;
hwif->straight8 = 1;
return 0;
}
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
addr = hwif->io_ports[i];
if (!hwif_request_region(hwif, addr, 1)) {
while (--i)
release_region(addr, 1);
goto data_region_busy;
}
}
BUG_ON((addr | 7) != hwif->io_ports[IDE_STATUS_OFFSET]);
if (!hwif_request_region(hwif, addr, 8))
goto data_region_busy;
return 0;
data_region_busy:
......@@ -328,19 +291,13 @@ int ide_hwif_request_regions(ide_hwif_t *hwif)
void ide_hwif_release_regions(ide_hwif_t *hwif)
{
u32 i = 0;
if (hwif->mmio)
return;
if (hwif->io_ports[IDE_CONTROL_OFFSET])
release_region(hwif->io_ports[IDE_CONTROL_OFFSET], 1);
if (hwif->straight8) {
release_region(hwif->io_ports[IDE_DATA_OFFSET], 8);
return;
}
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
if (hwif->io_ports[i])
release_region(hwif->io_ports[i], 1);
release_region(hwif->io_ports[IDE_DATA_OFFSET], 8);
}
void ide_remove_port_from_hwgroup(ide_hwif_t *hwif)
......@@ -627,11 +584,13 @@ int set_using_dma(ide_drive_t *drive, int arg)
int set_pio_mode(ide_drive_t *drive, int arg)
{
struct request rq;
ide_hwif_t *hwif = drive->hwif;
if (arg < 0 || arg > 255)
return -EINVAL;
if (drive->hwif->set_pio_mode == NULL)
if (hwif->set_pio_mode == NULL ||
(hwif->host_flags & IDE_HFLAG_NO_SET_MODE))
return -ENOSYS;
if (drive->special.b.set_tune)
......
drivers/ide/legacy/ali14xx.c
View file @ 1292ebb8
......@@ -86,7 +86,7 @@ static u8 regOff; /* output to base port to close registers */
/*
* Read a controller register.
*/
static inline u8 inReg (u8 reg)
static inline u8 inReg(u8 reg)
{
outb_p(reg, regPort);
return inb(dataPort);
......@@ -95,7 +95,7 @@ static inline u8 inReg (u8 reg)
/*
* Write a controller register.
*/
static void outReg (u8 data, u8 reg)
static void outReg(u8 data, u8 reg)
{
outb_p(reg, regPort);
outb_p(data, dataPort);
......@@ -143,7 +143,7 @@ static void ali14xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
/*
* Auto-detect the IDE controller port.
*/
static int __init findPort (void)
static int __init findPort(void)
{
int i;
u8 t;
......@@ -175,7 +175,8 @@ static int __init findPort (void)
/*
* Initialize controller registers with default values.
*/
static int __init initRegisters (void) {
static int __init initRegisters(void)
{
const RegInitializer *p;
u8 t;
unsigned long flags;
......@@ -199,7 +200,8 @@ static const struct ide_port_info ali14xx_port_info = {
static int __init ali14xx_probe(void)
{
static u8 idx[4] = { 0, 1, 0xff, 0xff };
ide_hwif_t *hwif, *mate;
static u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
hw_regs_t hw[2];
printk(KERN_DEBUG "ali14xx: base=0x%03x, regOn=0x%02x.\n",
......@@ -219,18 +221,26 @@ static int __init ali14xx_probe(void)
ide_std_init_ports(&hw[1], 0x170, 0x376);
hw[1].irq = 15;
ide_init_port_hw(&ide_hwifs[0], &hw[0]);
ide_init_port_hw(&ide_hwifs[1], &hw[1]);
hwif = ide_find_port();
if (hwif) {
ide_init_port_hw(hwif, &hw[0]);
hwif->set_pio_mode = &ali14xx_set_pio_mode;
idx[0] = hwif->index;
}
ide_hwifs[0].set_pio_mode = &ali14xx_set_pio_mode;
ide_hwifs[1].set_pio_mode = &ali14xx_set_pio_mode;
mate = ide_find_port();
if (mate) {
ide_init_port_hw(mate, &hw[1]);
mate->set_pio_mode = &ali14xx_set_pio_mode;
idx[1] = mate->index;
}
ide_device_add(idx, &ali14xx_port_info);
return 0;
}
int probe_ali14xx = 0;
int probe_ali14xx;
module_param_named(probe, probe_ali14xx, bool, 0);
MODULE_PARM_DESC(probe, "probe for ALI M14xx chipsets");
......
drivers/ide/legacy/buddha.c
View file @ 1292ebb8
......@@ -221,7 +221,7 @@ static int __init buddha_init(void)
buddha_setup_ports(&hw, base, ctl, irq_port, ack_intr);
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif) {
u8 index = hwif->index;
......
drivers/ide/legacy/dtc2278.c
View file @ 1292ebb8
......@@ -102,15 +102,9 @@ static int __init dtc2278_probe(void)
{
unsigned long flags;
ide_hwif_t *hwif, *mate;
static u8 idx[4] = { 0, 1, 0xff, 0xff };
static u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
hw_regs_t hw[2];
hwif = &ide_hwifs[0];
mate = &ide_hwifs[1];
if (hwif->chipset != ide_unknown || mate->chipset != ide_unknown)
return 1;
local_irq_save(flags);
/*
* This enables the second interface
......@@ -137,10 +131,18 @@ static int __init dtc2278_probe(void)
ide_std_init_ports(&hw[1], 0x170, 0x376);
hw[1].irq = 15;
ide_init_port_hw(hwif, &hw[0]);
ide_init_port_hw(mate, &hw[1]);
hwif = ide_find_port();
if (hwif) {
ide_init_port_hw(hwif, &hw[0]);
hwif->set_pio_mode = dtc2278_set_pio_mode;
idx[0] = hwif->index;
}
hwif->set_pio_mode = &dtc2278_set_pio_mode;
mate = ide_find_port();
if (mate) {
ide_init_port_hw(mate, &hw[1]);
idx[1] = mate->index;
}
ide_device_add(idx, &dtc2278_port_info);
......
drivers/ide/legacy/falconide.c
View file @ 1292ebb8
......@@ -22,6 +22,7 @@
#include <asm/atariints.h>
#include <asm/atari_stdma.h>
#define DRV_NAME "falconide"
/*
* Base of the IDE interface
......@@ -74,15 +75,21 @@ static int __init falconide_init(void)
printk(KERN_INFO "ide: Falcon IDE controller\n");
if (!request_mem_region(ATA_HD_BASE, 0x40, DRV_NAME)) {
printk(KERN_ERR "%s: resources busy\n", DRV_NAME);
return -EBUSY;
}
falconide_setup_ports(&hw);
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif) {
u8 index = hwif->index;
u8 idx[4] = { index, 0xff, 0xff, 0xff };
ide_init_port_data(hwif, index);
ide_init_port_hw(hwif, &hw);
hwif->mmio = 1;
ide_get_lock(NULL, NULL);
ide_device_add(idx, NULL);
......
drivers/ide/legacy/gayle.c
View file @ 1292ebb8
......@@ -175,7 +175,7 @@ static int __init gayle_init(void)
gayle_setup_ports(&hw, base, ctrlport, irqport, ack_intr);
hwif = ide_find_port(base);
hwif = ide_find_port();
if (hwif) {
u8 index = hwif->index;
......
drivers/ide/legacy/hd.c
View file @ 1292ebb8
......@@ -122,12 +122,12 @@ static int hd_error;
* This struct defines the HD's and their types.
*/
struct hd_i_struct {
unsigned int head,sect,cyl,wpcom,lzone,ctl;
unsigned int head, sect, cyl, wpcom, lzone, ctl;
int unit;
int recalibrate;
int special_op;
};
#ifdef HD_TYPE
static struct hd_i_struct hd_info[] = { HD_TYPE };
static int NR_HD = ARRAY_SIZE(hd_info);
......@@ -168,7 +168,7 @@ unsigned long read_timer(void)
spin_lock_irqsave(&i8253_lock, flags);
t = jiffies * 11932;
outb_p(0, 0x43);
outb_p(0, 0x43);
i = inb_p(0x40);
i |= inb(0x40) << 8;
spin_unlock_irqrestore(&i8253_lock, flags);
......@@ -183,7 +183,7 @@ static void __init hd_setup(char *str, int *ints)
if (ints[0] != 3)
return;
if (hd_info[0].head != 0)
hdind=1;
hdind = 1;
hd_info[hdind].head = ints[2];
hd_info[hdind].sect = ints[3];
hd_info[hdind].cyl = ints[1];
......@@ -193,7 +193,7 @@ static void __init hd_setup(char *str, int *ints)
NR_HD = hdind+1;
}
static void dump_status (const char *msg, unsigned int stat)
static void dump_status(const char *msg, unsigned int stat)
{
char *name = "hd?";
if (CURRENT)
......@@ -291,7 +291,6 @@ static int controller_ready(unsigned int drive, unsigned int head)
return 0;
}
static void hd_out(struct hd_i_struct *disk,
unsigned int nsect,
unsigned int sect,
......@@ -313,15 +312,15 @@ static void hd_out(struct hd_i_struct *disk,
return;
}
SET_HANDLER(intr_addr);
outb_p(disk->ctl,HD_CMD);
port=HD_DATA;
outb_p(disk->wpcom>>2,++port);
outb_p(nsect,++port);
outb_p(sect,++port);
outb_p(cyl,++port);
outb_p(cyl>>8,++port);
outb_p(0xA0|(disk->unit<<4)|head,++port);
outb_p(cmd,++port);
outb_p(disk->ctl, HD_CMD);
port = HD_DATA;
outb_p(disk->wpcom >> 2, ++port);
outb_p(nsect, ++port);
outb_p(sect, ++port);
outb_p(cyl, ++port);
outb_p(cyl >> 8, ++port);
outb_p(0xA0 | (disk->unit << 4) | head, ++port);
outb_p(cmd, ++port);
}
static void hd_request (void);
......@@ -344,14 +343,14 @@ static void reset_controller(void)
{
int i;
outb_p(4,HD_CMD);
for(i = 0; i < 1000; i++) barrier();
outb_p(hd_info[0].ctl & 0x0f,HD_CMD);
for(i = 0; i < 1000; i++) barrier();
outb_p(4, HD_CMD);
for (i = 0; i < 1000; i++) barrier();
outb_p(hd_info[0].ctl & 0x0f, HD_CMD);
for (i = 0; i < 1000; i++) barrier();
if (drive_busy())
printk("hd: controller still busy\n");
else if ((hd_error = inb(HD_ERROR)) != 1)
printk("hd: controller reset failed: %02x\n",hd_error);
printk("hd: controller reset failed: %02x\n", hd_error);
}
static void reset_hd(void)
......@@ -371,8 +370,8 @@ static void reset_hd(void)
if (++i < NR_HD) {
struct hd_i_struct *disk = &hd_info[i];
disk->special_op = disk->recalibrate = 1;
hd_out(disk,disk->sect,disk->sect,disk->head-1,
disk->cyl,WIN_SPECIFY,&reset_hd);
hd_out(disk, disk->sect, disk->sect, disk->head-1,
disk->cyl, WIN_SPECIFY, &reset_hd);
if (reset)
goto repeat;
} else
......@@ -393,7 +392,7 @@ static void unexpected_hd_interrupt(void)
unsigned int stat = inb_p(HD_STATUS);
if (stat & (BUSY_STAT|DRQ_STAT|ECC_STAT|ERR_STAT)) {
dump_status ("unexpected interrupt", stat);
dump_status("unexpected interrupt", stat);
SET_TIMER;
}
}
......@@ -453,7 +452,7 @@ static void read_intr(void)
return;
ok_to_read:
req = CURRENT;
insw(HD_DATA,req->buffer,256);
insw(HD_DATA, req->buffer, 256);
req->sector++;
req->buffer += 512;
req->errors = 0;
......@@ -507,7 +506,7 @@ static void write_intr(void)
end_request(req, 1);
if (i > 0) {
SET_HANDLER(&write_intr);
outsw(HD_DATA,req->buffer,256);
outsw(HD_DATA, req->buffer, 256);
local_irq_enable();
} else {
#if (HD_DELAY > 0)
......@@ -560,11 +559,11 @@ static int do_special_op(struct hd_i_struct *disk, struct request *req)
{
if (disk->recalibrate) {
disk->recalibrate = 0;
hd_out(disk,disk->sect,0,0,0,WIN_RESTORE,&recal_intr);
hd_out(disk, disk->sect, 0, 0, 0, WIN_RESTORE, &recal_intr);
return reset;
}
if (disk->head > 16) {
printk ("%s: cannot handle device with more than 16 heads - giving up\n", req->rq_disk->disk_name);
printk("%s: cannot handle device with more than 16 heads - giving up\n", req->rq_disk->disk_name);
end_request(req, 0);
}
disk->special_op = 0;
......@@ -633,19 +632,21 @@ static void hd_request(void)
if (blk_fs_request(req)) {
switch (rq_data_dir(req)) {
case READ:
hd_out(disk,nsect,sec,head,cyl,WIN_READ,&read_intr);
hd_out(disk, nsect, sec, head, cyl, WIN_READ,
&read_intr);
if (reset)
goto repeat;
break;
case WRITE:
hd_out(disk,nsect,sec,head,cyl,WIN_WRITE,&write_intr);
hd_out(disk, nsect, sec, head, cyl, WIN_WRITE,
&write_intr);
if (reset)
goto repeat;
if (wait_DRQ()) {
bad_rw_intr();
goto repeat;
}
outsw(HD_DATA,req->buffer,256);
outsw(HD_DATA, req->buffer, 256);
break;
default:
printk("unknown hd-command\n");
......@@ -655,7 +656,7 @@ static void hd_request(void)
}
}
static void do_hd_request (struct request_queue * q)
static void do_hd_request(struct request_queue *q)
{
disable_irq(HD_IRQ);
hd_request();
......@@ -708,12 +709,12 @@ static int __init hd_init(void)
{
int drive;
if (register_blkdev(MAJOR_NR,"hd"))
if (register_blkdev(MAJOR_NR, "hd"))
return -1;
hd_queue = blk_init_queue(do_hd_request, &hd_lock);
if (!hd_queue) {
unregister_blkdev(MAJOR_NR,"hd");
unregister_blkdev(MAJOR_NR, "hd");
return -ENOMEM;
}
......@@ -742,7 +743,7 @@ static int __init hd_init(void)
goto out;
}
for (drive=0 ; drive < NR_HD ; drive++) {
for (drive = 0 ; drive < NR_HD ; drive++) {
struct gendisk *disk = alloc_disk(64);
struct hd_i_struct *p = &hd_info[drive];
if (!disk)
......@@ -756,7 +757,7 @@ static int __init hd_init(void)
disk->queue = hd_queue;
p->unit = drive;
hd_gendisk[drive] = disk;
printk ("%s: %luMB, CHS=%d/%d/%d\n",
printk("%s: %luMB, CHS=%d/%d/%d\n",
disk->disk_name, (unsigned long)get_capacity(disk)/2048,
p->cyl, p->head, p->sect);
}
......@@ -776,7 +777,7 @@ static int __init hd_init(void)
}
/* Let them fly */
for(drive=0; drive < NR_HD; drive++)
for (drive = 0; drive < NR_HD; drive++)
add_disk(hd_gendisk[drive]);
return 0;
......@@ -791,7 +792,7 @@ static int __init hd_init(void)
NR_HD = 0;
out:
del_timer(&device_timer);
unregister_blkdev(MAJOR_NR,"hd");
unregister_blkdev(MAJOR_NR, "hd");
blk_cleanup_queue(hd_queue);
return -1;
Enomem:
......@@ -800,7 +801,8 @@ static int __init hd_init(void)
goto out;
}
static int __init parse_hd_setup (char *line) {
static int __init parse_hd_setup(char *line)
{
int ints[6];
(void) get_options(line, ARRAY_SIZE(ints), ints);
......
drivers/ide/legacy/ht6560b.c
View file @ 1292ebb8
......@@ -35,6 +35,7 @@
* Try: http://www.maf.iki.fi/~maf/ht6560b/
*/
#define DRV_NAME "ht6560b"
#define HT6560B_VERSION "v0.08"
#include <linux/module.h>
......@@ -339,16 +340,13 @@ static const struct ide_port_info ht6560b_port_info __initdata = {
static int __init ht6560b_init(void)
{
ide_hwif_t *hwif, *mate;
static u8 idx[4] = { 0, 1, 0xff, 0xff };
static u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
hw_regs_t hw[2];
if (probe_ht6560b == 0)
return -ENODEV;
hwif = &ide_hwifs[0];
mate = &ide_hwifs[1];
if (!request_region(HT_CONFIG_PORT, 1, hwif->name)) {
if (!request_region(HT_CONFIG_PORT, 1, DRV_NAME)) {
printk(KERN_NOTICE "%s: HT_CONFIG_PORT not found\n",
__FUNCTION__);
return -ENODEV;
......@@ -367,17 +365,23 @@ static int __init ht6560b_init(void)
ide_std_init_ports(&hw[1], 0x170, 0x376);
hw[1].irq = 15;
ide_init_port_hw(hwif, &hw[0]);
ide_init_port_hw(mate, &hw[1]);
hwif->selectproc = &ht6560b_selectproc;
hwif->set_pio_mode = &ht6560b_set_pio_mode;
mate->selectproc = &ht6560b_selectproc;
mate->set_pio_mode = &ht6560b_set_pio_mode;
hwif = ide_find_port();
if (hwif) {
ide_init_port_hw(hwif, &hw[0]);
hwif->selectproc = ht6560b_selectproc;
hwif->set_pio_mode = ht6560b_set_pio_mode;
hwif->port_init_devs = ht6560b_port_init_devs;
idx[0] = hwif->index;
}
hwif->port_init_devs = ht6560b_port_init_devs;
mate->port_init_devs = ht6560b_port_init_devs;
mate = ide_find_port();
if (mate) {
ide_init_port_hw(mate, &hw[1]);
mate->selectproc = ht6560b_selectproc;
mate->set_pio_mode = ht6560b_set_pio_mode;
mate->port_init_devs = ht6560b_port_init_devs;
idx[1] = mate->index;
}
ide_device_add(idx, &ht6560b_port_info);
......
drivers/ide/legacy/ide-4drives.c
View file @ 1292ebb8
......@@ -4,7 +4,7 @@
#include <linux/module.h>
#include <linux/ide.h>
int probe_4drives = 0;
int probe_4drives;
module_param_named(probe, probe_4drives, bool, 0);
MODULE_PARM_DESC(probe, "probe for generic IDE chipset with 4 drives/port");
......@@ -12,31 +12,37 @@ MODULE_PARM_DESC(probe, "probe for generic IDE chipset with 4 drives/port");
static int __init ide_4drives_init(void)
{
ide_hwif_t *hwif, *mate;
u8 idx[4] = { 0, 1, 0xff, 0xff };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
hw_regs_t hw;
if (probe_4drives == 0)
return -ENODEV;
hwif = &ide_hwifs[0];
mate = &ide_hwifs[1];
memset(&hw, 0, sizeof(hw));
ide_std_init_ports(&hw, 0x1f0, 0x3f6);
hw.irq = 14;
hw.chipset = ide_4drives;
ide_init_port_hw(hwif, &hw);
ide_init_port_hw(mate, &hw);
mate->drives[0].select.all ^= 0x20;
mate->drives[1].select.all ^= 0x20;
hwif->mate = mate;
mate->mate = hwif;
hwif->serialized = mate->serialized = 1;
hwif = ide_find_port();
if (hwif) {
ide_init_port_hw(hwif, &hw);
idx[0] = hwif->index;
}
mate = ide_find_port();
if (mate) {
ide_init_port_hw(mate, &hw);
mate->drives[0].select.all ^= 0x20;
mate->drives[1].select.all ^= 0x20;
idx[1] = mate->index;
if (hwif) {
hwif->mate = mate;
mate->mate = hwif;
hwif->serialized = mate->serialized = 1;
}
}
ide_device_add(idx, NULL);
......
drivers/ide/legacy/ide-cs.c
View file @ 1292ebb8
......@@ -156,7 +156,7 @@ static int idecs_register(unsigned long io, unsigned long ctl, unsigned long irq
hw.chipset = ide_pci;
hw.dev = &handle->dev;
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif == NULL)
return -1;
......
drivers/ide/legacy/ide_platform.c
View file @ 1292ebb8
......@@ -89,7 +89,7 @@ static int __devinit plat_ide_probe(struct platform_device *pdev)
res_alt->start, res_alt->end - res_alt->start + 1);
}
hwif = ide_find_port((unsigned long)base);
hwif = ide_find_port();
if (!hwif) {
ret = -ENODEV;
goto out;
......@@ -100,11 +100,10 @@ static int __devinit plat_ide_probe(struct platform_device *pdev)
hw.dev = &pdev->dev;
ide_init_port_hw(hwif, &hw);
hwif->mmio = 1;
if (mmio) {
hwif->mmio = 1;
if (mmio)
default_hwif_mmiops(hwif);
}
idx[0] = hwif->index;
......
drivers/ide/legacy/macide.c
View file @ 1292ebb8
......@@ -120,7 +120,7 @@ static int __init macide_init(void)
macide_setup_ports(&hw, base, irq, ack_intr);
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif) {
u8 index = hwif->index;
u8 idx[4] = { index, 0xff, 0xff, 0xff };
......
drivers/ide/legacy/q40ide.c
View file @ 1292ebb8
......@@ -137,7 +137,7 @@ static int __init q40ide_init(void)
// m68kide_iops,
q40ide_default_irq(pcide_bases[i]));
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif) {
ide_init_port_data(hwif, hwif->index);
ide_init_port_hw(hwif, &hw);
......
drivers/ide/legacy/qd65xx.c
View file @ 1292ebb8
......@@ -88,12 +88,12 @@
static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
/*
* qd_select:
* qd65xx_select:
*
* This routine is invoked from ide.c to prepare for access to a given drive.
* This routine is invoked to prepare for access to a given drive.
*/
static void qd_select (ide_drive_t *drive)
static void qd65xx_select(ide_drive_t *drive)
{
u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
(QD_TIMREG(drive) & 0x02);
......@@ -167,37 +167,16 @@ static int qd_find_disk_type (ide_drive_t *drive,
return 0;
}
/*
* qd_timing_ok:
*
* check whether timings don't conflict
*/
static int qd_timing_ok (ide_drive_t drives[])
{
return (IDE_IMPLY(drives[0].present && drives[1].present,
IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
QD_TIMING(drives) == QD_TIMING(drives+1))));
/* if same timing register, must be same timing */
}
/*
* qd_set_timing:
*
* records the timing, and enables selectproc as needed
* records the timing
*/
static void qd_set_timing (ide_drive_t *drive, u8 timing)
{
ide_hwif_t *hwif = HWIF(drive);
drive->drive_data &= 0xff00;
drive->drive_data |= timing;
if (qd_timing_ok(hwif->drives)) {
qd_select(drive); /* selects once */
hwif->selectproc = NULL;
} else
hwif->selectproc = &qd_select;
printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
}
......@@ -225,10 +204,11 @@ static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
int base = HWIF(drive)->select_data;
ide_hwif_t *hwif = drive->hwif;
unsigned int cycle_time;
int active_time = 175;
int recovery_time = 415; /* worst case values from the dos driver */
u8 base = (hwif->config_data & 0xff00) >> 8;
if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
cycle_time = ide_pio_cycle_time(drive, pio);
......@@ -299,21 +279,10 @@ static int __init qd_testreg(int port)
return (readreg != QD_TESTVAL);
}
/*
* qd_setup:
*
* called to setup an ata channel : adjusts attributes & links for tuning
*/
static void __init qd_setup(ide_hwif_t *hwif, int base, int config)
{
hwif->select_data = base;
hwif->config_data = config;
}
static void __init qd6500_port_init_devs(ide_hwif_t *hwif)
{
u8 base = hwif->select_data, config = QD_CONFIG(hwif);
u8 base = (hwif->config_data & 0xff00) >> 8;
u8 config = QD_CONFIG(hwif);
hwif->drives[0].drive_data = QD6500_DEF_DATA;
hwif->drives[1].drive_data = QD6500_DEF_DATA;
......@@ -322,9 +291,10 @@ static void __init qd6500_port_init_devs(ide_hwif_t *hwif)
static void __init qd6580_port_init_devs(ide_hwif_t *hwif)
{
u16 t1, t2;
u8 base = hwif->select_data, config = QD_CONFIG(hwif);
u8 base = (hwif->config_data & 0xff00) >> 8;
u8 config = QD_CONFIG(hwif);
if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
if (hwif->host_flags & IDE_HFLAG_SINGLE) {
t1 = QD6580_DEF_DATA;
t2 = QD6580_DEF_DATA2;
} else
......@@ -355,14 +325,18 @@ static int __init qd_probe(int base)
u8 config, unit;
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
hw_regs_t hw[2];
struct ide_port_info d = qd65xx_port_info;
config = inb(QD_CONFIG_PORT);
if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
return 1;
return -ENODEV;
unit = ! (config & QD_CONFIG_IDE_BASEPORT);
if (unit)
d.host_flags |= IDE_HFLAG_QD_2ND_PORT;
memset(&hw, 0, sizeof(hw));
ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
......@@ -373,30 +347,37 @@ static int __init qd_probe(int base)
if ((config & 0xf0) == QD_CONFIG_QD6500) {
if (qd_testreg(base)) return 1; /* bad register */
if (qd_testreg(base))
return -ENODEV; /* bad register */
/* qd6500 found */
hwif = &ide_hwifs[unit];
printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
config, QD_ID3);
if (config & QD_CONFIG_DISABLED) {
printk(KERN_WARNING "qd6500 is disabled !\n");
return 1;
return -ENODEV;
}
printk(KERN_NOTICE "qd6500 at %#x\n", base);
printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
config, QD_ID3);
d.host_flags |= IDE_HFLAG_SINGLE;
hwif = ide_find_port_slot(&d);
if (hwif == NULL)
return -ENOENT;
ide_init_port_hw(hwif, &hw[unit]);
qd_setup(hwif, base, config);
hwif->config_data = (base << 8) | config;
hwif->port_init_devs = qd6500_port_init_devs;
hwif->set_pio_mode = &qd6500_set_pio_mode;
hwif->set_pio_mode = qd6500_set_pio_mode;
hwif->selectproc = qd65xx_select;
idx[unit] = unit;
idx[unit] = hwif->index;
ide_device_add(idx, &qd65xx_port_info);
ide_device_add(idx, &d);
return 1;
}
......@@ -406,8 +387,8 @@ static int __init qd_probe(int base)
u8 control;
if (qd_testreg(base) || qd_testreg(base+0x02)) return 1;
/* bad registers */
if (qd_testreg(base) || qd_testreg(base + 0x02))
return -ENODEV; /* bad registers */
/* qd6580 found */
......@@ -422,46 +403,52 @@ static int __init qd_probe(int base)
if (control & QD_CONTR_SEC_DISABLED) {
/* secondary disabled */
hwif = &ide_hwifs[unit];
printk(KERN_INFO "%s: qd6580: single IDE board\n",
hwif->name);
printk(KERN_INFO "qd6580: single IDE board\n");
d.host_flags |= IDE_HFLAG_SINGLE;
hwif = ide_find_port_slot(&d);
if (hwif == NULL)
return -ENOENT;
ide_init_port_hw(hwif, &hw[unit]);
qd_setup(hwif, base, config | (control << 8));
hwif->config_data = (base << 8) | config;
hwif->port_init_devs = qd6580_port_init_devs;
hwif->set_pio_mode = &qd6580_set_pio_mode;
hwif->set_pio_mode = qd6580_set_pio_mode;
hwif->selectproc = qd65xx_select;
idx[unit] = unit;
idx[unit] = hwif->index;
ide_device_add(idx, &qd65xx_port_info);
ide_device_add(idx, &d);
return 1;
} else {
ide_hwif_t *mate;
hwif = &ide_hwifs[0];
mate = &ide_hwifs[1];
/* secondary enabled */
printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
hwif->name, mate->name);
ide_init_port_hw(hwif, &hw[0]);
ide_init_port_hw(mate, &hw[1]);
qd_setup(hwif, base, config | (control << 8));
hwif->port_init_devs = qd6580_port_init_devs;
hwif->set_pio_mode = &qd6580_set_pio_mode;
qd_setup(mate, base, config | (control << 8));
mate->port_init_devs = qd6580_port_init_devs;
mate->set_pio_mode = &qd6580_set_pio_mode;
idx[0] = 0;
idx[1] = 1;
printk(KERN_INFO "qd6580: dual IDE board\n");
hwif = ide_find_port();
if (hwif) {
ide_init_port_hw(hwif, &hw[0]);
hwif->config_data = (base << 8) | config;
hwif->port_init_devs = qd6580_port_init_devs;
hwif->set_pio_mode = qd6580_set_pio_mode;
hwif->selectproc = qd65xx_select;
idx[0] = hwif->index;
}
mate = ide_find_port();
if (mate) {
ide_init_port_hw(mate, &hw[1]);
mate->config_data = (base << 8) | config;
mate->port_init_devs = qd6580_port_init_devs;
mate->set_pio_mode = qd6580_set_pio_mode;
mate->selectproc = qd65xx_select;
idx[1] = mate->index;
}
ide_device_add(idx, &qd65xx_port_info);
......@@ -469,7 +456,7 @@ static int __init qd_probe(int base)
}
}
/* no qd65xx found */
return 1;
return -ENODEV;
}
int probe_qd65xx = 0;
......@@ -479,14 +466,18 @@ MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
static int __init qd65xx_init(void)
{
int rc1, rc2 = -ENODEV;
if (probe_qd65xx == 0)
return -ENODEV;
if (qd_probe(0x30))
qd_probe(0xb0);
if (ide_hwifs[0].chipset != ide_qd65xx &&
ide_hwifs[1].chipset != ide_qd65xx)
rc1 = qd_probe(0x30);
if (rc1)
rc2 = qd_probe(0xb0);
if (rc1 < 0 && rc2 < 0)
return -ENODEV;
return 0;
}
......
drivers/ide/legacy/qd65xx.h
View file @ 1292ebb8
......@@ -30,7 +30,6 @@
#define QD_ID3 ((config & QD_CONFIG_ID3)!=0)
#define QD_CONFIG(hwif) ((hwif)->config_data & 0x00ff)
#define QD_CONTROL(hwif) (((hwif)->config_data & 0xff00) >> 8)
#define QD_TIMING(drive) (byte)(((drive)->drive_data) & 0x00ff)
#define QD_TIMREG(drive) (byte)((((drive)->drive_data) & 0xff00) >> 8)
......
drivers/ide/legacy/umc8672.c
View file @ 1292ebb8
......@@ -19,7 +19,7 @@
*/
/*
* VLB Controller Support from
* VLB Controller Support from
* Wolfram Podien
* Rohoefe 3
* D28832 Achim
......@@ -32,7 +32,7 @@
* #define UMC_DRIVE0 11
* in the beginning of the driver, which sets the speed of drive 0 to 11 (there
* are some lines present). 0 - 11 are allowed speed values. These values are
* the results from the DOS speed test program supplied from UMC. 11 is the
* the results from the DOS speed test program supplied from UMC. 11 is the
* highest speed (about PIO mode 3)
*/
#define REALLY_SLOW_IO /* some systems can safely undef this */
......@@ -60,62 +60,62 @@
#define UMC_DRIVE3 1 /* In case of crash reduce speed */
static u8 current_speeds[4] = {UMC_DRIVE0, UMC_DRIVE1, UMC_DRIVE2, UMC_DRIVE3};
static const u8 pio_to_umc [5] = {0,3,7,10,11}; /* rough guesses */
static const u8 pio_to_umc [5] = {0, 3, 7, 10, 11}; /* rough guesses */
/* 0 1 2 3 4 5 6 7 8 9 10 11 */
static const u8 speedtab [3][12] = {
{0xf, 0xb, 0x2, 0x2, 0x2, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1 },
{0x3, 0x2, 0x2, 0x2, 0x2, 0x2, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1 },
{0xff,0xcb,0xc0,0x58,0x36,0x33,0x23,0x22,0x21,0x11,0x10,0x0}};
{0x0f, 0x0b, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x1},
{0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x1},
{0xff, 0xcb, 0xc0, 0x58, 0x36, 0x33, 0x23, 0x22, 0x21, 0x11, 0x10, 0x0}
};
static void out_umc (char port,char wert)
static void out_umc(char port, char wert)
{
outb_p(port,0x108);
outb_p(wert,0x109);
outb_p(port, 0x108);
outb_p(wert, 0x109);
}
static inline u8 in_umc (char port)
static inline u8 in_umc(char port)
{
outb_p(port,0x108);
outb_p(port, 0x108);
return inb_p(0x109);
}
static void umc_set_speeds (u8 speeds[])
static void umc_set_speeds(u8 speeds[])
{
int i, tmp;
outb_p(0x5A,0x108); /* enable umc */
outb_p(0x5A, 0x108); /* enable umc */
out_umc (0xd7,(speedtab[0][speeds[2]] | (speedtab[0][speeds[3]]<<4)));
out_umc (0xd6,(speedtab[0][speeds[0]] | (speedtab[0][speeds[1]]<<4)));
out_umc(0xd7, (speedtab[0][speeds[2]] | (speedtab[0][speeds[3]]<<4)));
out_umc(0xd6, (speedtab[0][speeds[0]] | (speedtab[0][speeds[1]]<<4)));
tmp = 0;
for (i = 3; i >= 0; i--) {
for (i = 3; i >= 0; i--)
tmp = (tmp << 2) | speedtab[1][speeds[i]];
out_umc(0xdc, tmp);
for (i = 0; i < 4; i++) {
out_umc(0xd0 + i, speedtab[2][speeds[i]]);
out_umc(0xd8 + i, speedtab[2][speeds[i]]);
}
out_umc (0xdc,tmp);
for (i = 0;i < 4; i++) {
out_umc (0xd0+i,speedtab[2][speeds[i]]);
out_umc (0xd8+i,speedtab[2][speeds[i]]);
}
outb_p(0xa5,0x108); /* disable umc */
outb_p(0xa5, 0x108); /* disable umc */
printk ("umc8672: drive speeds [0 to 11]: %d %d %d %d\n",
printk("umc8672: drive speeds [0 to 11]: %d %d %d %d\n",
speeds[0], speeds[1], speeds[2], speeds[3]);
}
static void umc_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
ide_hwif_t *hwif = drive->hwif;
unsigned long flags;
ide_hwgroup_t *hwgroup = ide_hwifs[HWIF(drive)->index^1].hwgroup;
printk("%s: setting umc8672 to PIO mode%d (speed %d)\n",
drive->name, pio, pio_to_umc[pio]);
spin_lock_irqsave(&ide_lock, flags);
if (hwgroup && hwgroup->handler != NULL) {
if (hwif->mate && hwif->mate->hwgroup->handler) {
printk(KERN_ERR "umc8672: other interface is busy: exiting tune_umc()\n");
} else {
current_speeds[drive->name[2] - 'a'] = pio_to_umc[pio];
umc_set_speeds (current_speeds);
umc_set_speeds(current_speeds);
}
spin_unlock_irqrestore(&ide_lock, flags);
}
......@@ -128,8 +128,9 @@ static const struct ide_port_info umc8672_port_info __initdata = {
static int __init umc8672_probe(void)
{
ide_hwif_t *hwif, *mate;
unsigned long flags;
static u8 idx[4] = { 0, 1, 0xff, 0xff };
static u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
hw_regs_t hw[2];
if (!request_region(0x108, 2, "umc8672")) {
......@@ -137,16 +138,16 @@ static int __init umc8672_probe(void)
return 1;
}
local_irq_save(flags);
outb_p(0x5A,0x108); /* enable umc */
outb_p(0x5A, 0x108); /* enable umc */
if (in_umc (0xd5) != 0xa0) {
local_irq_restore(flags);
printk(KERN_ERR "umc8672: not found\n");
release_region(0x108, 2);
return 1;
return 1;
}
outb_p(0xa5,0x108); /* disable umc */
outb_p(0xa5, 0x108); /* disable umc */
umc_set_speeds (current_speeds);
umc_set_speeds(current_speeds);
local_irq_restore(flags);
memset(&hw, 0, sizeof(hw));
......@@ -157,18 +158,26 @@ static int __init umc8672_probe(void)
ide_std_init_ports(&hw[1], 0x170, 0x376);
hw[1].irq = 15;
ide_init_port_hw(&ide_hwifs[0], &hw[0]);
ide_init_port_hw(&ide_hwifs[1], &hw[1]);
hwif = ide_find_port();
if (hwif) {
ide_init_port_hw(hwif, &hw[0]);
hwif->set_pio_mode = umc_set_pio_mode;
idx[0] = hwif->index;
}
ide_hwifs[0].set_pio_mode = &umc_set_pio_mode;
ide_hwifs[1].set_pio_mode = &umc_set_pio_mode;
mate = ide_find_port();
if (mate) {
ide_init_port_hw(mate, &hw[1]);
mate->set_pio_mode = umc_set_pio_mode;
idx[1] = mate->index;
}
ide_device_add(idx, &umc8672_port_info);
return 0;
}
int probe_umc8672 = 0;
int probe_umc8672;
module_param_named(probe, probe_umc8672, bool, 0);
MODULE_PARM_DESC(probe, "probe for UMC8672 chipset");
......
drivers/ide/mips/au1xxx-ide.c
View file @ 1292ebb8
......@@ -599,9 +599,11 @@ static int au_ide_probe(struct device *dev)
goto out;
}
/* FIXME: This might possibly break PCMCIA IDE devices */
hwif = &ide_hwifs[pdev->id];
hwif = ide_find_port();
if (hwif == NULL) {
ret = -ENOENT;
goto out;
}
memset(&hw, 0, sizeof(hw));
auide_setup_ports(&hw, ahwif);
......
drivers/ide/mips/swarm.c
View file @ 1292ebb8
......@@ -76,17 +76,12 @@ static int __devinit swarm_ide_probe(struct device *dev)
if (!SIBYTE_HAVE_IDE)
return -ENODEV;
/* Find an empty slot. */
for (i = 0; i < MAX_HWIFS; i++)
if (!ide_hwifs[i].io_ports[IDE_DATA_OFFSET])
break;
if (i >= MAX_HWIFS) {
hwif = ide_find_port();
if (hwif == NULL) {
printk(KERN_ERR DRV_NAME ": no free slot for interface\n");
return -ENOMEM;
}
hwif = ide_hwifs + i;
base = ioremap(A_IO_EXT_BASE, 0x800);
offset = __raw_readq(base + R_IO_EXT_REG(R_IO_EXT_START_ADDR, IDE_CS));
size = __raw_readq(base + R_IO_EXT_REG(R_IO_EXT_MULT_SIZE, IDE_CS));
......
drivers/ide/pci/aec62xx.c
View file @ 1292ebb8
......@@ -220,7 +220,8 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
.init_hwif = init_hwif_aec62xx,
.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
.host_flags = IDE_HFLAG_NO_ATAPI_DMA |
IDE_HFLAG_ABUSE_SET_DMA_MODE,
IDE_HFLAG_ABUSE_SET_DMA_MODE |
IDE_HFLAG_NON_BOOTABLE,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA4,
......
drivers/ide/pci/alim15x3.c
View file @ 1292ebb8
......@@ -750,7 +750,6 @@ static const struct ide_port_info ali15x3_chipset __devinitdata = {
.init_chipset = init_chipset_ali15x3,
.init_hwif = init_hwif_ali15x3,
.init_dma = init_dma_ali15x3,
.host_flags = IDE_HFLAG_BOOTABLE,
.pio_mask = ATA_PIO5,
.swdma_mask = ATA_SWDMA2,
.mwdma_mask = ATA_MWDMA2,
......
drivers/ide/pci/amd74xx.c
View file @ 1292ebb8
......@@ -219,12 +219,10 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
#define IDE_HFLAGS_AMD \
(IDE_HFLAG_PIO_NO_BLACKLIST | \
IDE_HFLAG_PIO_NO_DOWNGRADE | \
IDE_HFLAG_ABUSE_SET_DMA_MODE | \
IDE_HFLAG_POST_SET_MODE | \
IDE_HFLAG_IO_32BIT | \
IDE_HFLAG_UNMASK_IRQS | \
IDE_HFLAG_BOOTABLE)
IDE_HFLAG_UNMASK_IRQS)
#define DECLARE_AMD_DEV(name_str, swdma, udma) \
{ \
......
drivers/ide/pci/atiixp.c
View file @ 1292ebb8
......@@ -151,7 +151,7 @@ static const struct ide_port_info atiixp_pci_info[] __devinitdata = {
.name = "ATIIXP",
.init_hwif = init_hwif_atiixp,
.enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
.host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
.host_flags = IDE_HFLAG_LEGACY_IRQS,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA5,
......@@ -159,8 +159,7 @@ static const struct ide_port_info atiixp_pci_info[] __devinitdata = {
.name = "SB600_PATA",
.init_hwif = init_hwif_atiixp,
.enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
.host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS |
IDE_HFLAG_BOOTABLE,
.host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA5,
......
drivers/ide/pci/cmd640.c
View file @ 1292ebb8
This diff is collapsed.
drivers/ide/pci/cmd64x.c
View file @ 1292ebb8
......@@ -440,8 +440,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
.init_hwif = init_hwif_cmd64x,
.enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
.host_flags = IDE_HFLAG_CLEAR_SIMPLEX |
IDE_HFLAG_ABUSE_PREFETCH |
IDE_HFLAG_BOOTABLE,
IDE_HFLAG_ABUSE_PREFETCH,
.pio_mask = ATA_PIO5,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = 0x00, /* no udma */
......@@ -451,7 +450,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
.init_hwif = init_hwif_cmd64x,
.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
.chipset = ide_cmd646,
.host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE,
.host_flags = IDE_HFLAG_ABUSE_PREFETCH,
.pio_mask = ATA_PIO5,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA2,
......@@ -460,7 +459,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
.host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE,
.host_flags = IDE_HFLAG_ABUSE_PREFETCH,
.pio_mask = ATA_PIO5,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA4,
......@@ -469,7 +468,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
.host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE,
.host_flags = IDE_HFLAG_ABUSE_PREFETCH,
.pio_mask = ATA_PIO5,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA5,
......
drivers/ide/pci/cs5520.c
View file @ 1292ebb8
......@@ -122,8 +122,7 @@ static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
IDE_HFLAG_CS5520 | \
IDE_HFLAG_VDMA | \
IDE_HFLAG_NO_ATAPI_DMA | \
IDE_HFLAG_ABUSE_SET_DMA_MODE |\
IDE_HFLAG_BOOTABLE, \
IDE_HFLAG_ABUSE_SET_DMA_MODE, \
.pio_mask = ATA_PIO4, \
}
......
drivers/ide/pci/cs5530.c
View file @ 1292ebb8
......@@ -249,8 +249,7 @@ static const struct ide_port_info cs5530_chipset __devinitdata = {
.init_chipset = init_chipset_cs5530,
.init_hwif = init_hwif_cs5530,
.host_flags = IDE_HFLAG_SERIALIZE |
IDE_HFLAG_POST_SET_MODE |
IDE_HFLAG_BOOTABLE,
IDE_HFLAG_POST_SET_MODE,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA2,
......
drivers/ide/pci/cs5535.c
View file @ 1292ebb8
......@@ -186,7 +186,7 @@ static const struct ide_port_info cs5535_chipset __devinitdata = {
.name = "CS5535",
.init_hwif = init_hwif_cs5535,
.host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE |
IDE_HFLAG_ABUSE_SET_DMA_MODE | IDE_HFLAG_BOOTABLE,
IDE_HFLAG_ABUSE_SET_DMA_MODE,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA4,
......
drivers/ide/pci/cy82c693.c
View file @ 1292ebb8
......@@ -6,7 +6,7 @@
*
* The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards.
* Writing the driver was quite simple, since most of the job is
* done by the generic pci-ide support.
* done by the generic pci-ide support.
* The hard part was finding the CY82C693's datasheet on Cypress's
* web page :-(. But Altavista solved this problem :-).
*
......@@ -15,12 +15,12 @@
* - I recently got a 16.8G IBM DTTA, so I was able to test it with
* a large and fast disk - the results look great, so I'd say the
* driver is working fine :-)
* hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA
* - this is my first linux driver, so there's probably a lot of room
* hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA
* - this is my first linux driver, so there's probably a lot of room
* for optimizations and bug fixing, so feel free to do it.
* - use idebus=xx parameter to set PCI bus speed - needed to calc
* timings for PIO modes (default will be 40)
* - if using PIO mode it's a good idea to set the PIO mode and
* - if using PIO mode it's a good idea to set the PIO mode and
* 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda
* - I had some problems with my IBM DHEA with PIO modes < 2
* (lost interrupts) ?????
......@@ -110,11 +110,11 @@ typedef struct pio_clocks_s {
* calc clocks using bus_speed
* returns (rounded up) time in bus clocks for time in ns
*/
static int calc_clk (int time, int bus_speed)
static int calc_clk(int time, int bus_speed)
{
int clocks;
clocks = (time*bus_speed+999)/1000 -1;
clocks = (time*bus_speed+999)/1000 - 1;
if (clocks < 0)
clocks = 0;
......@@ -132,8 +132,8 @@ static int calc_clk (int time, int bus_speed)
* NOTE: for mode 0,1 and 2 drives 8-bit IDE command control registers are used
* for mode 3 and 4 drives 8 and 16-bit timings are the same
*
*/
static void compute_clocks (u8 pio, pio_clocks_t *p_pclk)
*/
static void compute_clocks(u8 pio, pio_clocks_t *p_pclk)
{
int clk1, clk2;
int bus_speed = system_bus_clock(); /* get speed of PCI bus */
......@@ -158,7 +158,7 @@ static void compute_clocks (u8 pio, pio_clocks_t *p_pclk)
clk1 = (clk1<<4)|clk2; /* combine active and recovery clocks */
/* note: we use the same values for 16bit IOR and IOW
* those are all the same, since I don't have other
* those are all the same, since I don't have other
* timings than those from ide-lib.c
*/
......@@ -186,7 +186,7 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
outb(index, CY82_INDEX_PORT);
data = inb(CY82_DATA_PORT);
printk (KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n",
printk(KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n",
drive->name, HWIF(drive)->channel, drive->select.b.unit,
(data&0x3), ((data>>2)&1));
#endif /* CY82C693_DEBUG_LOGS */
......@@ -202,7 +202,7 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
mode & 3, single);
#endif /* CY82C693_DEBUG_INFO */
/*
/*
* note: below we set the value for Bus Master IDE TimeOut Register
* I'm not absolutly sure what this does, but it solved my problem
* with IDE DMA and sound, so I now can play sound and work with
......@@ -216,8 +216,8 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT);
outb(data, CY82_DATA_PORT);
#if CY82C693_DEBUG_INFO
printk (KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n",
#if CY82C693_DEBUG_INFO
printk(KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n",
drive->name, data);
#endif /* CY82C693_DEBUG_INFO */
}
......@@ -242,14 +242,14 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
#if CY82C693_DEBUG_LOGS
/* for debug let's show the register values */
if (drive->select.b.unit == 0) {
if (drive->select.b.unit == 0) {
/*
* get master drive registers
* get master drive registers
* address setup control register
* is 32 bit !!!
*/
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
*/
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
addrCtrl &= 0x0F;
/* now let's get the remaining registers */
......@@ -261,7 +261,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
* set slave drive registers
* address setup control register
* is 32 bit !!!
*/
*/
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
addrCtrl &= 0xF0;
......@@ -288,9 +288,9 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
* set master drive
* address setup control register
* is 32 bit !!!
*/
*/
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
addrCtrl &= (~0xF);
addrCtrl |= (unsigned int)pclk.address_time;
pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
......@@ -299,14 +299,14 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, pclk.time_16r);
pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, pclk.time_16w);
pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, pclk.time_8);
addrCtrl &= 0xF;
} else {
/*
* set slave drive
* address setup control register
* is 32 bit !!!
*/
*/
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
addrCtrl &= (~0xF0);
......@@ -320,7 +320,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
addrCtrl >>= 4;
addrCtrl &= 0xF;
}
}
#if CY82C693_DEBUG_INFO
printk(KERN_INFO "%s (ch=%d, dev=%d): set PIO timing to "
......@@ -340,41 +340,41 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c
#ifdef CY82C693_SETDMA_CLOCK
u8 data = 0;
#endif /* CY82C693_SETDMA_CLOCK */
#endif /* CY82C693_SETDMA_CLOCK */
/* write info about this verion of the driver */
printk(KERN_INFO CY82_VERSION "\n");
#ifdef CY82C693_SETDMA_CLOCK
/* okay let's set the DMA clock speed */
outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT);
data = inb(CY82_DATA_PORT);
outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT);
data = inb(CY82_DATA_PORT);
#if CY82C693_DEBUG_INFO
printk(KERN_INFO "%s: Peripheral Configuration Register: 0x%X\n",
name, data);
#endif /* CY82C693_DEBUG_INFO */
/*
/*
* for some reason sometimes the DMA controller
* speed is set to ATCLK/2 ???? - we fix this here
*
*
* note: i don't know what causes this strange behaviour,
* but even changing the dma speed doesn't solve it :-(
* the ide performance is still only half the normal speed
*
* the ide performance is still only half the normal speed
*
* if anybody knows what goes wrong with my machine, please
* let me know - ASK
*/
*/
data |= 0x03;
outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT);
outb(data, CY82_DATA_PORT);
outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT);
outb(data, CY82_DATA_PORT);
#if CY82C693_DEBUG_INFO
printk (KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n",
printk(KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n",
name, data);
#endif /* CY82C693_DEBUG_INFO */
......@@ -410,8 +410,7 @@ static const struct ide_port_info cy82c693_chipset __devinitdata = {
.init_iops = init_iops_cy82c693,
.init_hwif = init_hwif_cy82c693,
.chipset = ide_cy82c693,
.host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_CY82C693 |
IDE_HFLAG_BOOTABLE,
.host_flags = IDE_HFLAG_SINGLE,
.pio_mask = ATA_PIO4,
.swdma_mask = ATA_SWDMA2,
.mwdma_mask = ATA_MWDMA2,
......@@ -424,7 +423,7 @@ static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_dev
/* CY82C693 is more than only a IDE controller.
Function 1 is primary IDE channel, function 2 - secondary. */
if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
PCI_FUNC(dev->devfn) == 1) {
dev2 = pci_get_slot(dev->bus, dev->devfn + 1);
ret = ide_setup_pci_devices(dev, dev2, &cy82c693_chipset);
......
drivers/ide/pci/delkin_cb.c
View file @ 1292ebb8
......@@ -71,14 +71,13 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
if (setup[i])
outb(setup[i], base + i);
}
pci_release_regions(dev); /* IDE layer handles regions itself */
memset(&hw, 0, sizeof(hw));
ide_std_init_ports(&hw, base + 0x10, base + 0x1e);
hw.irq = dev->irq;
hw.chipset = ide_pci; /* this enables IRQ sharing */
hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
hwif = ide_find_port();
if (hwif == NULL)
goto out_disable;
......@@ -90,6 +89,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
ide_init_port_data(hwif, i);
ide_init_port_hw(hwif, &hw);
hwif->mmio = 1;
hwif->quirkproc = &ide_undecoded_slave;
idx[0] = i;
......@@ -110,6 +110,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
out_disable:
printk(KERN_ERR "delkin_cb: no IDE devices found\n");
pci_release_regions(dev);
pci_disable_device(dev);
return -ENODEV;
}
......@@ -122,6 +123,7 @@ delkin_cb_remove (struct pci_dev *dev)
if (hwif)
ide_unregister(hwif->index);
pci_release_regions(dev);
pci_disable_device(dev);
}
......
drivers/ide/pci/generic.c
View file @ 1292ebb8
......@@ -38,8 +38,7 @@ MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE st
{ \
.name = name_str, \
.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \
extra_flags | \
IDE_HFLAG_BOOTABLE, \
extra_flags, \
.swdma_mask = ATA_SWDMA2, \
.mwdma_mask = ATA_MWDMA2, \
.udma_mask = ATA_UDMA6, \
......@@ -50,9 +49,8 @@ static const struct ide_port_info generic_chipsets[] __devinitdata = {
{ /* 1 */
.name = "NS87410",
.enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}},
.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
IDE_HFLAG_BOOTABLE,
.enablebits = { {0x43, 0x08, 0x08}, {0x47, 0x08, 0x08} },
.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
.swdma_mask = ATA_SWDMA2,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA6,
......@@ -99,7 +97,7 @@ static const struct ide_port_info generic_chipsets[] __devinitdata = {
* Called when the PCI registration layer (or the IDE initialization)
* finds a device matching our IDE device tables.
*/
static int __devinit generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
const struct ide_port_info *d = &generic_chipsets[id->driver_data];
......
drivers/ide/pci/hpt34x.c
View file @ 1292ebb8
......@@ -133,7 +133,7 @@ static const struct ide_port_info hpt34x_chipsets[] __devinitdata = {
.init_chipset = init_chipset_hpt34x,
.init_hwif = init_hwif_hpt34x,
.extra = 16,
.host_flags = IDE_HFLAGS_HPT34X,
.host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_NON_BOOTABLE,
.pio_mask = ATA_PIO5,
},
{ /* 1 */
......
drivers/ide/pci/hpt366.c
View file @ 1292ebb8
......@@ -1557,7 +1557,7 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic
hpt374_init(dev, dev2);
else {
if (hpt36x_init(dev, dev2))
d.host_flags |= IDE_HFLAG_BOOTABLE;
d.host_flags &= ~IDE_HFLAG_NON_BOOTABLE;
}
ret = ide_setup_pci_devices(dev, dev2, &d);
......
drivers/ide/pci/it8213.c
View file @ 1292ebb8
......@@ -35,7 +35,7 @@ static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
static DEFINE_SPINLOCK(tune_lock);
int control = 0;
static const u8 timings[][2]= {
static const u8 timings[][2] = {
{ 0, 0 },
{ 0, 0 },
{ 1, 0 },
......@@ -105,11 +105,10 @@ static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
if (!(reg48 & u_flag))
pci_write_config_byte(dev, 0x48, reg48 | u_flag);
if (speed >= XFER_UDMA_5) {
if (speed >= XFER_UDMA_5)
pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
} else {
else
pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
}
if ((reg4a & a_speed) != u_speed)
pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
......@@ -170,9 +169,8 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
{ \
.name = name_str, \
.init_hwif = init_hwif_it8213, \
.enablebits = {{0x41,0x80,0x80}}, \
.host_flags = IDE_HFLAG_SINGLE | \
IDE_HFLAG_BOOTABLE, \
.enablebits = { {0x41, 0x80, 0x80} }, \
.host_flags = IDE_HFLAG_SINGLE, \
.pio_mask = ATA_PIO4, \
.swdma_mask = ATA_SWDMA2_ONLY, \
.mwdma_mask = ATA_MWDMA12_ONLY, \
......
drivers/ide/pci/it821x.c
View file @ 1292ebb8
......@@ -523,16 +523,12 @@ static void __devinit it821x_quirkproc(ide_drive_t *drive)
static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
struct it821x_dev *idev = kzalloc(sizeof(struct it821x_dev), GFP_KERNEL);
struct it821x_dev **itdevs = (struct it821x_dev **)pci_get_drvdata(dev);
struct it821x_dev *idev = itdevs[hwif->channel];
u8 conf;
hwif->quirkproc = &it821x_quirkproc;
if (idev == NULL) {
printk(KERN_ERR "it821x: out of memory, falling back to legacy behaviour.\n");
return;
}
ide_set_hwifdata(hwif, idev);
pci_read_config_byte(dev, 0x50, &conf);
......@@ -623,7 +619,6 @@ static unsigned int __devinit init_chipset_it821x(struct pci_dev *dev, const cha
.name = name_str, \
.init_chipset = init_chipset_it821x, \
.init_hwif = init_hwif_it821x, \
.host_flags = IDE_HFLAG_BOOTABLE, \
.pio_mask = ATA_PIO4, \
}
......@@ -642,6 +637,22 @@ static const struct ide_port_info it821x_chipsets[] __devinitdata = {
static int __devinit it821x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
struct it821x_dev *itdevs[2] = { NULL, NULL} , *itdev;
unsigned int i;
for (i = 0; i < 2; i++) {
itdev = kzalloc(sizeof(*itdev), GFP_KERNEL);
if (itdev == NULL) {
kfree(itdevs[0]);
printk(KERN_ERR "it821x: out of memory\n");
return -ENOMEM;
}
itdevs[i] = itdev;
}
pci_set_drvdata(dev, itdevs);
return ide_setup_pci_device(dev, &it821x_chipsets[id->driver_data]);
}
......
drivers/ide/pci/jmicron.c
View file @ 1292ebb8
......@@ -63,8 +63,7 @@ static u8 __devinit ata66_jmicron(ide_hwif_t *hwif)
* actually do our cable checking etc. Thankfully we don't need
* to do the plumbing for other cases.
*/
switch (port_map[port])
{
switch (port_map[port]) {
case PORT_PATA0:
if (control & (1 << 3)) /* 40/80 pin primary */
return ATA_CBL_PATA40;
......@@ -114,7 +113,6 @@ static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
static const struct ide_port_info jmicron_chipset __devinitdata = {
.name = "JMB",
.init_hwif = init_hwif_jmicron,
.host_flags = IDE_HFLAG_BOOTABLE,
.enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } },
.pio_mask = ATA_PIO5,
.mwdma_mask = ATA_MWDMA2,
......
drivers/ide/pci/ns87415.c
View file @ 1292ebb8
......@@ -265,8 +265,7 @@ static const struct ide_port_info ns87415_chipset __devinitdata = {
#endif
.init_hwif = init_hwif_ns87415,
.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
IDE_HFLAG_NO_ATAPI_DMA |
IDE_HFLAG_BOOTABLE,
IDE_HFLAG_NO_ATAPI_DMA,
};
static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id)
......
drivers/ide/pci/opti621.c
View file @ 1292ebb8
......@@ -57,9 +57,9 @@
* (use idebus=xx to select PCI bus speed).
*
* Version 0.1, Nov 8, 1996
* by Jaromir Koutek, for 2.1.8.
* by Jaromir Koutek, for 2.1.8.
* Initial version of driver.
*
*
* Version 0.2
* Number 0.2 skipped.
*
......@@ -75,7 +75,7 @@
* by Jaromir Koutek
* Updates for use with (again) new IDE block driver.
* Update of documentation.
*
*
* Version 0.6, Jan 2, 1999
* by Jaromir Koutek
* Reversed to version 0.3 of the driver, because
......@@ -208,29 +208,34 @@ typedef struct pio_clocks_s {
static void compute_clocks(int pio, pio_clocks_t *clks)
{
if (pio != PIO_NOT_EXIST) {
int adr_setup, data_pls;
if (pio != PIO_NOT_EXIST) {
int adr_setup, data_pls;
int bus_speed = system_bus_clock();
adr_setup = ide_pio_timings[pio].setup_time;
data_pls = ide_pio_timings[pio].active_time;
clks->address_time = cmpt_clk(adr_setup, bus_speed);
clks->data_time = cmpt_clk(data_pls, bus_speed);
clks->recovery_time = cmpt_clk(ide_pio_timings[pio].cycle_time
- adr_setup-data_pls, bus_speed);
if (clks->address_time<1) clks->address_time = 1;
if (clks->address_time>4) clks->address_time = 4;
if (clks->data_time<1) clks->data_time = 1;
if (clks->data_time>16) clks->data_time = 16;
if (clks->recovery_time<2) clks->recovery_time = 2;
if (clks->recovery_time>17) clks->recovery_time = 17;
adr_setup = ide_pio_timings[pio].setup_time;
data_pls = ide_pio_timings[pio].active_time;
clks->address_time = cmpt_clk(adr_setup, bus_speed);
clks->data_time = cmpt_clk(data_pls, bus_speed);
clks->recovery_time = cmpt_clk(ide_pio_timings[pio].cycle_time
- adr_setup-data_pls, bus_speed);
if (clks->address_time < 1)
clks->address_time = 1;
if (clks->address_time > 4)
clks->address_time = 4;
if (clks->data_time < 1)
clks->data_time = 1;
if (clks->data_time > 16)
clks->data_time = 16;
if (clks->recovery_time < 2)
clks->recovery_time = 2;
if (clks->recovery_time > 17)
clks->recovery_time = 17;
} else {
clks->address_time = 1;
clks->data_time = 1;
clks->recovery_time = 2;
/* minimal values */
}
}
static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
......@@ -247,8 +252,8 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
/* sets drive->drive_data for both drives */
compute_pios(drive, pio);
pio1 = hwif->drives[0].drive_data;
pio2 = hwif->drives[1].drive_data;
pio1 = hwif->drives[0].drive_data;
pio2 = hwif->drives[1].drive_data;
compute_clocks(pio1, &first);
compute_clocks(pio2, &second);
......@@ -275,7 +280,7 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
spin_lock_irqsave(&opti621_lock, flags);
reg_base = hwif->io_ports[IDE_DATA_OFFSET];
reg_base = hwif->io_ports[IDE_DATA_OFFSET];
/* allow Register-B */
outb(0xc0, reg_base + CNTRL_REG);
......@@ -324,7 +329,7 @@ static void __devinit opti621_port_init_devs(ide_hwif_t *hwif)
/*
* init_hwif_opti621() is called once for each hwif found at boot.
*/
static void __devinit init_hwif_opti621 (ide_hwif_t *hwif)
static void __devinit init_hwif_opti621(ide_hwif_t *hwif)
{
hwif->port_init_devs = opti621_port_init_devs;
hwif->set_pio_mode = &opti621_set_pio_mode;
......@@ -334,18 +339,16 @@ static const struct ide_port_info opti621_chipsets[] __devinitdata = {
{ /* 0 */
.name = "OPTI621",
.init_hwif = init_hwif_opti621,
.enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
IDE_HFLAG_BOOTABLE,
.enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
.pio_mask = ATA_PIO3,
.swdma_mask = ATA_SWDMA2,
.mwdma_mask = ATA_MWDMA2,
},{ /* 1 */
}, { /* 1 */
.name = "OPTI621X",
.init_hwif = init_hwif_opti621,
.enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
IDE_HFLAG_BOOTABLE,
.enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
.pio_mask = ATA_PIO3,
.swdma_mask = ATA_SWDMA2,
.mwdma_mask = ATA_MWDMA2,
......
drivers/ide/pci/piix.c
View file @ 1292ebb8
......@@ -307,9 +307,9 @@ static void __devinit init_hwif_ich(ide_hwif_t *hwif)
}
#ifndef CONFIG_IA64
#define IDE_HFLAGS_PIIX (IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE)
#define IDE_HFLAGS_PIIX IDE_HFLAG_LEGACY_IRQS
#else
#define IDE_HFLAGS_PIIX IDE_HFLAG_BOOTABLE
#define IDE_HFLAGS_PIIX 0
#endif
#define DECLARE_PIIX_DEV(name_str, udma) \
......
drivers/ide/pci/rz1000.c
View file @ 1292ebb8
......@@ -43,7 +43,7 @@ static const struct ide_port_info rz1000_chipset __devinitdata = {
.name = "RZ100x",
.init_hwif = init_hwif_rz1000,
.chipset = ide_rz1000,
.host_flags = IDE_HFLAG_NO_DMA | IDE_HFLAG_BOOTABLE,
.host_flags = IDE_HFLAG_NO_DMA,
};
static int __devinit rz1000_init_one(struct pci_dev *dev, const struct pci_device_id *id)
......
drivers/ide/pci/sc1200.c
View file @ 1292ebb8
......@@ -307,8 +307,7 @@ static const struct ide_port_info sc1200_chipset __devinitdata = {
.init_hwif = init_hwif_sc1200,
.host_flags = IDE_HFLAG_SERIALIZE |
IDE_HFLAG_POST_SET_MODE |
IDE_HFLAG_ABUSE_DMA_MODES |
IDE_HFLAG_BOOTABLE,
IDE_HFLAG_ABUSE_DMA_MODES,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA2,
......
drivers/ide/pci/scc_pata.c
View file @ 1292ebb8
......@@ -65,7 +65,7 @@
static struct scc_ports {
unsigned long ctl, dma;
unsigned char hwif_id; /* for removing hwif from system */
ide_hwif_t *hwif; /* for removing port from system */
} scc_ports[MAX_HWIFS];
/* PIO transfer mode table */
......@@ -534,12 +534,8 @@ static int scc_ide_setup_pci_device(struct pci_dev *dev,
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
int i;
for (i = 0; i < MAX_HWIFS; i++) {
hwif = &ide_hwifs[i];
if (hwif->chipset == ide_unknown)
break; /* pick an unused entry */
}
if (i == MAX_HWIFS) {
hwif = ide_find_port();
if (hwif == NULL) {
printk(KERN_ERR "%s: too many IDE interfaces, "
"no room in table\n", SCC_PATA_NAME);
return -ENOMEM;
......@@ -696,7 +692,7 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
{
struct scc_ports *ports = ide_get_hwifdata(hwif);
ports->hwif_id = hwif->index;
ports->hwif = hwif;
hwif->dma_command = hwif->dma_base;
hwif->dma_status = hwif->dma_base + 0x04;
......@@ -725,8 +721,7 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
.name = name_str, \
.init_iops = init_iops_scc, \
.init_hwif = init_hwif_scc, \
.host_flags = IDE_HFLAG_SINGLE | \
IDE_HFLAG_BOOTABLE, \
.host_flags = IDE_HFLAG_SINGLE, \
.pio_mask = ATA_PIO4, \
}
......@@ -758,7 +753,7 @@ static int __devinit scc_init_one(struct pci_dev *dev, const struct pci_device_i
static void __devexit scc_remove(struct pci_dev *dev)
{
struct scc_ports *ports = pci_get_drvdata(dev);
ide_hwif_t *hwif = &ide_hwifs[ports->hwif_id];
ide_hwif_t *hwif = ports->hwif;
unsigned long ctl_base = pci_resource_start(dev, 0);
unsigned long dma_base = pci_resource_start(dev, 1);
unsigned long ctl_size = pci_resource_len(dev, 0);
......
drivers/ide/pci/serverworks.c
View file @ 1292ebb8
......@@ -350,8 +350,7 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
#define IDE_HFLAGS_SVWKS \
(IDE_HFLAG_LEGACY_IRQS | \
IDE_HFLAG_ABUSE_SET_DMA_MODE | \
IDE_HFLAG_BOOTABLE)
IDE_HFLAG_ABUSE_SET_DMA_MODE)
static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
{ /* 0 */
......@@ -418,7 +417,7 @@ static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device
else if (idx == 2 || idx == 3) {
if ((PCI_FUNC(dev->devfn) & 1) == 0) {
if (pci_resource_start(dev, 0) != 0x01f1)
d.host_flags &= ~IDE_HFLAG_BOOTABLE;
d.host_flags |= IDE_HFLAG_NON_BOOTABLE;
d.host_flags |= IDE_HFLAG_SINGLE;
} else
d.host_flags &= ~IDE_HFLAG_SINGLE;
......
drivers/ide/pci/sgiioc4.c
View file @ 1292ebb8
......@@ -590,20 +590,12 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
unsigned long bar0, cmd_phys_base, ctl;
void __iomem *virt_base;
ide_hwif_t *hwif;
int h;
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
hw_regs_t hw;
struct ide_port_info d = sgiioc4_port_info;
/*
* Find an empty HWIF; if none available, return -ENOMEM.
*/
for (h = 0; h < MAX_HWIFS; ++h) {
hwif = &ide_hwifs[h];
if (hwif->chipset == ide_unknown)
break;
}
if (h == MAX_HWIFS) {
hwif = ide_find_port();
if (hwif == NULL) {
printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n",
DRV_NAME);
return -ENOMEM;
......
drivers/ide/pci/siimage.c
View file @ 1292ebb8
......@@ -808,7 +808,6 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
.init_chipset = init_chipset_siimage, \
.init_iops = init_iops_siimage, \
.init_hwif = init_hwif_siimage, \
.host_flags = IDE_HFLAG_BOOTABLE, \
.pio_mask = ATA_PIO4, \
.mwdma_mask = ATA_MWDMA2, \
.udma_mask = ATA_UDMA6, \
......
drivers/ide/pci/sis5513.c
View file @ 1292ebb8
......@@ -59,10 +59,10 @@
#define ATA_16 0x01
#define ATA_33 0x02
#define ATA_66 0x03
#define ATA_100a 0x04 // SiS730/SiS550 is ATA100 with ATA66 layout
#define ATA_100a 0x04 /* SiS730/SiS550 is ATA100 with ATA66 layout */
#define ATA_100 0x05
#define ATA_133a 0x06 // SiS961b with 133 support
#define ATA_133 0x07 // SiS962/963
#define ATA_133a 0x06 /* SiS961b with 133 support */
#define ATA_133 0x07 /* SiS962/963 */
static u8 chipset_family;
......@@ -111,69 +111,70 @@ static const struct {
Indexed by chipset_family and (dma_mode - XFER_UDMA_0) */
/* {0, ATA_16, ATA_33, ATA_66, ATA_100a, ATA_100, ATA_133} */
static u8 cycle_time_offset[] = {0,0,5,4,4,0,0};
static u8 cycle_time_range[] = {0,0,2,3,3,4,4};
static u8 cycle_time_offset[] = { 0, 0, 5, 4, 4, 0, 0 };
static u8 cycle_time_range[] = { 0, 0, 2, 3, 3, 4, 4 };
static u8 cycle_time_value[][XFER_UDMA_6 - XFER_UDMA_0 + 1] = {
{0,0,0,0,0,0,0}, /* no udma */
{0,0,0,0,0,0,0}, /* no udma */
{3,2,1,0,0,0,0}, /* ATA_33 */
{7,5,3,2,1,0,0}, /* ATA_66 */
{7,5,3,2,1,0,0}, /* ATA_100a (730 specific), differences are on cycle_time range and offset */
{11,7,5,4,2,1,0}, /* ATA_100 */
{15,10,7,5,3,2,1}, /* ATA_133a (earliest 691 southbridges) */
{15,10,7,5,3,2,1}, /* ATA_133 */
{ 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */
{ 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */
{ 3, 2, 1, 0, 0, 0, 0 }, /* ATA_33 */
{ 7, 5, 3, 2, 1, 0, 0 }, /* ATA_66 */
{ 7, 5, 3, 2, 1, 0, 0 }, /* ATA_100a (730 specific),
different cycle_time range and offset */
{ 11, 7, 5, 4, 2, 1, 0 }, /* ATA_100 */
{ 15, 10, 7, 5, 3, 2, 1 }, /* ATA_133a (earliest 691 southbridges) */
{ 15, 10, 7, 5, 3, 2, 1 }, /* ATA_133 */
};
/* CRC Valid Setup Time vary across IDE clock setting 33/66/100/133
See SiS962 data sheet for more detail */
static u8 cvs_time_value[][XFER_UDMA_6 - XFER_UDMA_0 + 1] = {
{0,0,0,0,0,0,0}, /* no udma */
{0,0,0,0,0,0,0}, /* no udma */
{2,1,1,0,0,0,0},
{4,3,2,1,0,0,0},
{4,3,2,1,0,0,0},
{6,4,3,1,1,1,0},
{9,6,4,2,2,2,2},
{9,6,4,2,2,2,2},
{ 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */
{ 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */
{ 2, 1, 1, 0, 0, 0, 0 },
{ 4, 3, 2, 1, 0, 0, 0 },
{ 4, 3, 2, 1, 0, 0, 0 },
{ 6, 4, 3, 1, 1, 1, 0 },
{ 9, 6, 4, 2, 2, 2, 2 },
{ 9, 6, 4, 2, 2, 2, 2 },
};
/* Initialize time, Active time, Recovery time vary across
IDE clock settings. These 3 arrays hold the register value
for PIO0/1/2/3/4 and DMA0/1/2 mode in order */
static u8 ini_time_value[][8] = {
{0,0,0,0,0,0,0,0},
{0,0,0,0,0,0,0,0},
{2,1,0,0,0,1,0,0},
{4,3,1,1,1,3,1,1},
{4,3,1,1,1,3,1,1},
{6,4,2,2,2,4,2,2},
{9,6,3,3,3,6,3,3},
{9,6,3,3,3,6,3,3},
{ 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0 },
{ 2, 1, 0, 0, 0, 1, 0, 0 },
{ 4, 3, 1, 1, 1, 3, 1, 1 },
{ 4, 3, 1, 1, 1, 3, 1, 1 },
{ 6, 4, 2, 2, 2, 4, 2, 2 },
{ 9, 6, 3, 3, 3, 6, 3, 3 },
{ 9, 6, 3, 3, 3, 6, 3, 3 },
};
static u8 act_time_value[][8] = {
{0,0,0,0,0,0,0,0},
{0,0,0,0,0,0,0,0},
{9,9,9,2,2,7,2,2},
{19,19,19,5,4,14,5,4},
{19,19,19,5,4,14,5,4},
{28,28,28,7,6,21,7,6},
{38,38,38,10,9,28,10,9},
{38,38,38,10,9,28,10,9},
{ 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0 },
{ 9, 9, 9, 2, 2, 7, 2, 2 },
{ 19, 19, 19, 5, 4, 14, 5, 4 },
{ 19, 19, 19, 5, 4, 14, 5, 4 },
{ 28, 28, 28, 7, 6, 21, 7, 6 },
{ 38, 38, 38, 10, 9, 28, 10, 9 },
{ 38, 38, 38, 10, 9, 28, 10, 9 },
};
static u8 rco_time_value[][8] = {
{0,0,0,0,0,0,0,0},
{0,0,0,0,0,0,0,0},
{9,2,0,2,0,7,1,1},
{19,5,1,5,2,16,3,2},
{19,5,1,5,2,16,3,2},
{30,9,3,9,4,25,6,4},
{40,12,4,12,5,34,12,5},
{40,12,4,12,5,34,12,5},
{ 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0 },
{ 9, 2, 0, 2, 0, 7, 1, 1 },
{ 19, 5, 1, 5, 2, 16, 3, 2 },
{ 19, 5, 1, 5, 2, 16, 3, 2 },
{ 30, 9, 3, 9, 4, 25, 6, 4 },
{ 40, 12, 4, 12, 5, 34, 12, 5 },
{ 40, 12, 4, 12, 5, 34, 12, 5 },
};
/*
* Printing configuration
*/
/* Used for chipset type printing at boot time */
static char* chipset_capability[] = {
static char *chipset_capability[] = {
"ATA", "ATA 16",
"ATA 33", "ATA 66",
"ATA 100 (1st gen)", "ATA 100 (2nd gen)",
......@@ -272,7 +273,7 @@ static void sis_program_timings(ide_drive_t *drive, const u8 mode)
sis_ata133_program_timings(drive, mode);
}
static void config_drive_art_rwp (ide_drive_t *drive)
static void config_drive_art_rwp(ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *dev = to_pci_dev(hwif->dev);
......@@ -358,8 +359,7 @@ static u8 sis5513_ata133_udma_filter(ide_drive_t *drive)
return (regdw & 0x08) ? ATA_UDMA6 : ATA_UDMA5;
}
/* Chip detection and general config */
static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const char *name)
static int __devinit sis_find_family(struct pci_dev *dev)
{
struct pci_dev *host;
int i = 0;
......@@ -381,7 +381,7 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c
chipset_family = ATA_100a;
}
pci_dev_put(host);
printk(KERN_INFO "SIS5513: %s %s controller\n",
SiSHostChipInfo[i].name, chipset_capability[chipset_family]);
}
......@@ -440,63 +440,60 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c
}
}
if (!chipset_family)
return -1;
return chipset_family;
}
static unsigned int __devinit init_chipset_sis5513(struct pci_dev *dev,
const char *name)
{
/* Make general config ops here
1/ tell IDE channels to operate in Compatibility mode only
2/ tell old chips to allow per drive IDE timings */
{
u8 reg;
u16 regw;
switch(chipset_family) {
case ATA_133:
/* SiS962 operation mode */
pci_read_config_word(dev, 0x50, &regw);
if (regw & 0x08)
pci_write_config_word(dev, 0x50, regw&0xfff7);
pci_read_config_word(dev, 0x52, &regw);
if (regw & 0x08)
pci_write_config_word(dev, 0x52, regw&0xfff7);
break;
case ATA_133a:
case ATA_100:
/* Fixup latency */
pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x80);
/* Set compatibility bit */
pci_read_config_byte(dev, 0x49, &reg);
if (!(reg & 0x01)) {
pci_write_config_byte(dev, 0x49, reg|0x01);
}
break;
case ATA_100a:
case ATA_66:
/* Fixup latency */
pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x10);
/* On ATA_66 chips the bit was elsewhere */
pci_read_config_byte(dev, 0x52, &reg);
if (!(reg & 0x04)) {
pci_write_config_byte(dev, 0x52, reg|0x04);
}
break;
case ATA_33:
/* On ATA_33 we didn't have a single bit to set */
pci_read_config_byte(dev, 0x09, &reg);
if ((reg & 0x0f) != 0x00) {
pci_write_config_byte(dev, 0x09, reg&0xf0);
}
case ATA_16:
/* force per drive recovery and active timings
needed on ATA_33 and below chips */
pci_read_config_byte(dev, 0x52, &reg);
if (!(reg & 0x08)) {
pci_write_config_byte(dev, 0x52, reg|0x08);
}
break;
}
u8 reg;
u16 regw;
switch (chipset_family) {
case ATA_133:
/* SiS962 operation mode */
pci_read_config_word(dev, 0x50, &regw);
if (regw & 0x08)
pci_write_config_word(dev, 0x50, regw&0xfff7);
pci_read_config_word(dev, 0x52, &regw);
if (regw & 0x08)
pci_write_config_word(dev, 0x52, regw&0xfff7);
break;
case ATA_133a:
case ATA_100:
/* Fixup latency */
pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x80);
/* Set compatibility bit */
pci_read_config_byte(dev, 0x49, &reg);
if (!(reg & 0x01))
pci_write_config_byte(dev, 0x49, reg|0x01);
break;
case ATA_100a:
case ATA_66:
/* Fixup latency */
pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x10);
/* On ATA_66 chips the bit was elsewhere */
pci_read_config_byte(dev, 0x52, &reg);
if (!(reg & 0x04))
pci_write_config_byte(dev, 0x52, reg|0x04);
break;
case ATA_33:
/* On ATA_33 we didn't have a single bit to set */
pci_read_config_byte(dev, 0x09, &reg);
if ((reg & 0x0f) != 0x00)
pci_write_config_byte(dev, 0x09, reg&0xf0);
case ATA_16:
/* force per drive recovery and active timings
needed on ATA_33 and below chips */
pci_read_config_byte(dev, 0x52, &reg);
if (!(reg & 0x08))
pci_write_config_byte(dev, 0x52, reg|0x08);
break;
}
return 0;
......@@ -546,10 +543,8 @@ static u8 __devinit ata66_sis5513(ide_hwif_t *hwif)
return ata66 ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
}
static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
static void __devinit init_hwif_sis5513(ide_hwif_t *hwif)
{
u8 udma_rates[] = { 0x00, 0x00, 0x07, 0x1f, 0x3f, 0x3f, 0x7f, 0x7f };
hwif->set_pio_mode = &sis_set_pio_mode;
hwif->set_dma_mode = &sis_set_dma_mode;
......@@ -557,27 +552,29 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
hwif->udma_filter = sis5513_ata133_udma_filter;
hwif->cable_detect = ata66_sis5513;
if (hwif->dma_base == 0)
return;
hwif->ultra_mask = udma_rates[chipset_family];
}
static const struct ide_port_info sis5513_chipset __devinitdata = {
.name = "SIS5513",
.init_chipset = init_chipset_sis5513,
.init_hwif = init_hwif_sis5513,
.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
.host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA |
IDE_HFLAG_BOOTABLE,
.enablebits = { {0x4a, 0x02, 0x02}, {0x4a, 0x04, 0x04} },
.host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
};
static int __devinit sis5513_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
return ide_setup_pci_device(dev, &sis5513_chipset);
struct ide_port_info d = sis5513_chipset;
u8 udma_rates[] = { 0x00, 0x00, 0x07, 0x1f, 0x3f, 0x3f, 0x7f, 0x7f };
if (sis_find_family(dev) == 0)
return -ENOTSUPP;
d.udma_mask = udma_rates[chipset_family];
return ide_setup_pci_device(dev, &d);
}
static const struct pci_device_id sis5513_pci_tbl[] = {
......
drivers/ide/pci/sl82c105.c
View file @ 1292ebb8
......@@ -332,8 +332,7 @@ static const struct ide_port_info sl82c105_chipset __devinitdata = {
#if defined(CONFIG_LOPEC) || defined(CONFIG_SANDPOINT)
IDE_HFLAG_FORCE_LEGACY_IRQS |
#endif
IDE_HFLAG_NO_AUTODMA |
IDE_HFLAG_BOOTABLE,
IDE_HFLAG_NO_AUTODMA,
.pio_mask = ATA_PIO5,
};
......
drivers/ide/pci/slc90e66.c
View file @ 1292ebb8
......@@ -27,9 +27,9 @@ static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
unsigned long flags;
u16 master_data;
u8 slave_data;
int control = 0;
int control = 0;
/* ISP RTC */
static const u8 timings[][2]= {
static const u8 timings[][2] = {
{ 0, 0 },
{ 0, 0 },
{ 1, 0 },
......@@ -136,8 +136,8 @@ static void __devinit init_hwif_slc90e66(ide_hwif_t *hwif)
static const struct ide_port_info slc90e66_chipset __devinitdata = {
.name = "SLC90E66",
.init_hwif = init_hwif_slc90e66,
.enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}},
.host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
.enablebits = { {0x41, 0x80, 0x80}, {0x43, 0x80, 0x80} },
.host_flags = IDE_HFLAG_LEGACY_IRQS,
.pio_mask = ATA_PIO4,
.swdma_mask = ATA_SWDMA2_ONLY,
.mwdma_mask = ATA_MWDMA12_ONLY,
......
drivers/ide/pci/tc86c001.c
View file @ 1292ebb8
......@@ -18,20 +18,20 @@ static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed)
u16 mode, scr = inw(scr_port);
switch (speed) {
case XFER_UDMA_4: mode = 0x00c0; break;
case XFER_UDMA_3: mode = 0x00b0; break;
case XFER_UDMA_2: mode = 0x00a0; break;
case XFER_UDMA_1: mode = 0x0090; break;
case XFER_UDMA_0: mode = 0x0080; break;
case XFER_MW_DMA_2: mode = 0x0070; break;
case XFER_MW_DMA_1: mode = 0x0060; break;
case XFER_MW_DMA_0: mode = 0x0050; break;
case XFER_PIO_4: mode = 0x0400; break;
case XFER_PIO_3: mode = 0x0300; break;
case XFER_PIO_2: mode = 0x0200; break;
case XFER_PIO_1: mode = 0x0100; break;
case XFER_PIO_0:
default: mode = 0x0000; break;
case XFER_UDMA_4: mode = 0x00c0; break;
case XFER_UDMA_3: mode = 0x00b0; break;
case XFER_UDMA_2: mode = 0x00a0; break;
case XFER_UDMA_1: mode = 0x0090; break;
case XFER_UDMA_0: mode = 0x0080; break;
case XFER_MW_DMA_2: mode = 0x0070; break;
case XFER_MW_DMA_1: mode = 0x0060; break;
case XFER_MW_DMA_0: mode = 0x0050; break;
case XFER_PIO_4: mode = 0x0400; break;
case XFER_PIO_3: mode = 0x0300; break;
case XFER_PIO_2: mode = 0x0200; break;
case XFER_PIO_1: mode = 0x0100; break;
case XFER_PIO_0:
default: mode = 0x0000; break;
}
scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
......
drivers/ide/pci/triflex.c
View file @ 1292ebb8
......@@ -97,7 +97,6 @@ static const struct ide_port_info triflex_device __devinitdata = {
.name = "TRIFLEX",
.init_hwif = init_hwif_triflex,
.enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}},
.host_flags = IDE_HFLAG_BOOTABLE,
.pio_mask = ATA_PIO4,
.swdma_mask = ATA_SWDMA2,
.mwdma_mask = ATA_MWDMA2,
......
drivers/ide/pci/trm290.c
View file @ 1292ebb8
......@@ -337,7 +337,6 @@ static const struct ide_port_info trm290_chipset __devinitdata = {
IDE_HFLAG_TRUST_BIOS_FOR_DMA |
#endif
IDE_HFLAG_NO_AUTODMA |
IDE_HFLAG_BOOTABLE |
IDE_HFLAG_NO_LBA48,
};
......
drivers/ide/pci/via82cxxx.c
View file @ 1292ebb8
......@@ -429,11 +429,9 @@ static const struct ide_port_info via82cxxx_chipset __devinitdata = {
.init_hwif = init_hwif_via82cxxx,
.enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
.host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
IDE_HFLAG_PIO_NO_DOWNGRADE |
IDE_HFLAG_ABUSE_SET_DMA_MODE |
IDE_HFLAG_POST_SET_MODE |
IDE_HFLAG_IO_32BIT |
IDE_HFLAG_BOOTABLE,
IDE_HFLAG_IO_32BIT,
.pio_mask = ATA_PIO5,
.swdma_mask = ATA_SWDMA2,
.mwdma_mask = ATA_MWDMA2,
......
drivers/ide/ppc/mpc8xx.c
View file @ 1292ebb8
......@@ -36,6 +36,8 @@
#include <asm/machdep.h>
#include <asm/irq.h>
#define DRV_NAME "ide-mpc8xx"
static int identify (volatile u8 *p);
static void print_fixed (volatile u8 *p);
static void print_funcid (int func);
......@@ -127,7 +129,7 @@ static int pcmcia_schlvl = PCMCIA_SCHLVL;
* MPC8xx's internal PCMCIA interface
*/
#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT)
static void __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
static int __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
{
unsigned long *p = hw->io_ports;
int i;
......@@ -182,6 +184,13 @@ static void __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
pcmcia_phy_base, pcmcia_phy_end,
pcmcia_phy_end - pcmcia_phy_base);
if (!request_mem_region(pcmcia_phy_base,
pcmcia_phy_end - pcmcia_phy_base,
DRV_NAME)) {
printk(KERN_ERR "%s: resources busy\n", DRV_NAME);
return -EBUSY;
}
pcmcia_base=(unsigned long)ioremap(pcmcia_phy_base,
pcmcia_phy_end-pcmcia_phy_base);
......@@ -236,7 +245,7 @@ static void __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
if (pcmp->pcmc_pipr & (M8XX_PCMCIA_CD1(_slot_)|M8XX_PCMCIA_CD2(_slot_))) {
printk ("No card in slot %c: PIPR=%08x\n",
'A' + _slot_, (u32) pcmp->pcmc_pipr);
return; /* No card in slot */
return -ENODEV; /* No card in slot */
}
check_ide_device (pcmcia_base);
......@@ -279,9 +288,6 @@ static void __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
}
#endif /* CONFIG_IDE_8xx_PCCARD */
ide_hwifs[data_port].pio_mask = ATA_PIO4;
ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode;
/* Enable Harddisk Interrupt,
* and make it edge sensitive
*/
......@@ -296,6 +302,8 @@ static void __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
/* Enable falling edge irq */
pcmp->pcmc_per = 0x100000 >> (16 * _slot_);
#endif /* CONFIG_IDE_8xx_PCCARD */
return 0;
}
#endif /* CONFIG_IDE_8xx_PCCARD || CONFIG_IDE_8xx_DIRECT */
......@@ -304,7 +312,7 @@ static void __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
* MPC8xx's internal PCMCIA interface
*/
#if defined(CONFIG_IDE_EXT_DIRECT)
static void __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
static int __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
{
unsigned long *p = hw->io_ports;
int i;
......@@ -327,7 +335,12 @@ static void __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
printk ("IDE phys mem : %08x...%08x (size %08x)\n",
ide_phy_base, ide_phy_end,
ide_phy_end - ide_phy_base);
if (!request_mem_region(ide_phy_base, 0x200, DRV_NAME)) {
printk(KERN_ERR "%s: resources busy\n", DRV_NAME);
return -EBUSY;
}
ide_base=(unsigned long)ioremap(ide_phy_base,
ide_phy_end-ide_phy_base);
......@@ -357,15 +370,14 @@ static void __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
hw->irq = ioport_dsc[data_port].irq;
hw->ack_intr = (ide_ack_intr_t *)ide_interrupt_ack;
ide_hwifs[data_port].pio_mask = ATA_PIO4;
ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode;
/* Enable Harddisk Interrupt,
* and make it edge sensitive
*/
/* (11-18) Set edge detect for irq, no wakeup from low power mode */
((immap_t *) IMAP_ADDR)->im_siu_conf.sc_siel |=
(0x80000000 >> ioport_dsc[data_port].irq);
return 0;
}
#endif /* CONFIG_IDE_8xx_DIRECT */
......@@ -794,14 +806,28 @@ static int __init mpc8xx_ide_probe(void)
#ifdef IDE0_BASE_OFFSET
memset(&hw, 0, sizeof(hw));
m8xx_ide_init_ports(&hw, 0);
ide_init_port_hw(&ide_hwifs[0], &hw);
idx[0] = 0;
if (!m8xx_ide_init_ports(&hw, 0)) {
ide_hwif_t *hwif = &ide_hwifs[0];
ide_init_port_hw(hwif, &hw);
hwif->mmio = 1;
hwif->pio_mask = ATA_PIO4;
hwif->set_pio_mode = m8xx_ide_set_pio_mode;
idx[0] = 0;
}
#ifdef IDE1_BASE_OFFSET
memset(&hw, 0, sizeof(hw));
m8xx_ide_init_ports(&hw, 1);
ide_init_port_hw(&ide_hwifs[1], &hw);
idx[1] = 1;
if (!m8xx_ide_init_ports(&hw, 1)) {
ide_hwif_t *mate = &ide_hwifs[1];
ide_init_port_hw(mate, &hw);
mate->mmio = 1;
mate->pio_mask = ATA_PIO4;
mate->set_pio_mode = m8xx_ide_set_pio_mode;
idx[1] = 1;
}
#endif
#endif
......
drivers/ide/ppc/pmac.c
View file @ 1292ebb8
......@@ -79,8 +79,6 @@ typedef struct pmac_ide_hwif {
} pmac_ide_hwif_t;
static pmac_ide_hwif_t pmac_ide[MAX_HWIFS];
enum {
controller_ohare, /* OHare based */
controller_heathrow, /* Heathrow/Paddington */
......@@ -923,7 +921,6 @@ pmac_ide_do_resume(ide_hwif_t *hwif)
static const struct ide_port_info pmac_port_info = {
.chipset = ide_pmac,
.host_flags = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA |
IDE_HFLAG_PIO_NO_DOWNGRADE |
IDE_HFLAG_POST_SET_MODE |
IDE_HFLAG_NO_DMA | /* no SFF-style DMA */
IDE_HFLAG_UNMASK_IRQS,
......@@ -1088,35 +1085,36 @@ pmac_ide_macio_attach(struct macio_dev *mdev, const struct of_device_id *match)
{
void __iomem *base;
unsigned long regbase;
int irq;
ide_hwif_t *hwif;
pmac_ide_hwif_t *pmif;
int i, rc;
int irq, rc;
hw_regs_t hw;
i = 0;
while (i < MAX_HWIFS && (ide_hwifs[i].io_ports[IDE_DATA_OFFSET] != 0
|| pmac_ide[i].node != NULL))
++i;
if (i >= MAX_HWIFS) {
pmif = kzalloc(sizeof(*pmif), GFP_KERNEL);
if (pmif == NULL)
return -ENOMEM;
hwif = ide_find_port();
if (hwif == NULL) {
printk(KERN_ERR "ide-pmac: MacIO interface attach with no slot\n");
printk(KERN_ERR " %s\n", mdev->ofdev.node->full_name);
return -ENODEV;
rc = -ENODEV;
goto out_free_pmif;
}
pmif = &pmac_ide[i];
hwif = &ide_hwifs[i];
if (macio_resource_count(mdev) == 0) {
printk(KERN_WARNING "ide%d: no address for %s\n",
i, mdev->ofdev.node->full_name);
return -ENXIO;
printk(KERN_WARNING "ide-pmac: no address for %s\n",
mdev->ofdev.node->full_name);
rc = -ENXIO;
goto out_free_pmif;
}
/* Request memory resource for IO ports */
if (macio_request_resource(mdev, 0, "ide-pmac (ports)")) {
printk(KERN_ERR "ide%d: can't request mmio resource !\n", i);
return -EBUSY;
printk(KERN_ERR "ide-pmac: can't request MMIO resource for "
"%s!\n", mdev->ofdev.node->full_name);
rc = -EBUSY;
goto out_free_pmif;
}
/* XXX This is bogus. Should be fixed in the registry by checking
......@@ -1125,8 +1123,8 @@ pmac_ide_macio_attach(struct macio_dev *mdev, const struct of_device_id *match)
* where that happens though...
*/
if (macio_irq_count(mdev) == 0) {
printk(KERN_WARNING "ide%d: no intrs for device %s, using 13\n",
i, mdev->ofdev.node->full_name);
printk(KERN_WARNING "ide-pmac: no intrs for device %s, using "
"13\n", mdev->ofdev.node->full_name);
irq = irq_create_mapping(NULL, 13);
} else
irq = macio_irq(mdev, 0);
......@@ -1144,7 +1142,9 @@ pmac_ide_macio_attach(struct macio_dev *mdev, const struct of_device_id *match)
#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
if (macio_resource_count(mdev) >= 2) {
if (macio_request_resource(mdev, 1, "ide-pmac (dma)"))
printk(KERN_WARNING "ide%d: can't request DMA resource !\n", i);
printk(KERN_WARNING "ide-pmac: can't request DMA "
"resource for %s!\n",
mdev->ofdev.node->full_name);
else
pmif->dma_regs = ioremap(macio_resource_start(mdev, 1), 0x1000);
} else
......@@ -1166,11 +1166,15 @@ pmac_ide_macio_attach(struct macio_dev *mdev, const struct of_device_id *match)
iounmap(pmif->dma_regs);
macio_release_resource(mdev, 1);
}
memset(pmif, 0, sizeof(*pmif));
macio_release_resource(mdev, 0);
kfree(pmif);
}
return rc;
out_free_pmif:
kfree(pmif);
return rc;
}
static int
......@@ -1215,7 +1219,7 @@ pmac_ide_pci_attach(struct pci_dev *pdev, const struct pci_device_id *id)
pmac_ide_hwif_t *pmif;
void __iomem *base;
unsigned long rbase, rlen;
int i, rc;
int rc;
hw_regs_t hw;
np = pci_device_to_OF_node(pdev);
......@@ -1223,30 +1227,32 @@ pmac_ide_pci_attach(struct pci_dev *pdev, const struct pci_device_id *id)
printk(KERN_ERR "ide-pmac: cannot find MacIO node for Kauai ATA interface\n");
return -ENODEV;
}
i = 0;
while (i < MAX_HWIFS && (ide_hwifs[i].io_ports[IDE_DATA_OFFSET] != 0
|| pmac_ide[i].node != NULL))
++i;
if (i >= MAX_HWIFS) {
pmif = kzalloc(sizeof(*pmif), GFP_KERNEL);
if (pmif == NULL)
return -ENOMEM;
hwif = ide_find_port();
if (hwif == NULL) {
printk(KERN_ERR "ide-pmac: PCI interface attach with no slot\n");
printk(KERN_ERR " %s\n", np->full_name);
return -ENODEV;
rc = -ENODEV;
goto out_free_pmif;
}
pmif = &pmac_ide[i];
hwif = &ide_hwifs[i];
if (pci_enable_device(pdev)) {
printk(KERN_WARNING "ide%i: Can't enable PCI device for %s\n",
i, np->full_name);
return -ENXIO;
printk(KERN_WARNING "ide-pmac: Can't enable PCI device for "
"%s\n", np->full_name);
rc = -ENXIO;
goto out_free_pmif;
}
pci_set_master(pdev);
if (pci_request_regions(pdev, "Kauai ATA")) {
printk(KERN_ERR "ide%d: Cannot obtain PCI resources for %s\n",
i, np->full_name);
return -ENXIO;
printk(KERN_ERR "ide-pmac: Cannot obtain PCI resources for "
"%s\n", np->full_name);
rc = -ENXIO;
goto out_free_pmif;
}
hwif->dev = &pdev->dev;
......@@ -1276,11 +1282,15 @@ pmac_ide_pci_attach(struct pci_dev *pdev, const struct pci_device_id *id)
/* The inteface is released to the common IDE layer */
pci_set_drvdata(pdev, NULL);
iounmap(base);
memset(pmif, 0, sizeof(*pmif));
pci_release_regions(pdev);
kfree(pmif);
}
return rc;
out_free_pmif:
kfree(pmif);
return rc;
}
static int
......
drivers/ide/setup-pci.c
View file @ 1292ebb8
This diff is collapsed.
include/linux/Kbuild
View file @ 1292ebb8
......@@ -210,7 +210,6 @@ unifdef-y += hayesesp.h
unifdef-y += hdlcdrv.h
unifdef-y += hdlc.h
unifdef-y += hdreg.h
unifdef-y += hdsmart.h
unifdef-y += hid.h
unifdef-y += hiddev.h
unifdef-y += hidraw.h
......
include/linux/hdsmart.h deleted 100644 → 0
View file @ b8228758
/*
* linux/include/linux/hdsmart.h
*
* Copyright (C) 1999-2000 Michael Cornwell <cornwell@acm.org>
* Copyright (C) 2000 Andre Hedrick <andre@linux-ide.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* You should have received a copy of the GNU General Public License
* (for example /usr/src/linux/COPYING); if not, write to the Free
* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _LINUX_HDSMART_H
#define _LINUX_HDSMART_H
#ifndef __KERNEL__
#define OFFLINE_FULL_SCAN 0
#define SHORT_SELF_TEST 1
#define EXTEND_SELF_TEST 2
#define SHORT_CAPTIVE_SELF_TEST 129
#define EXTEND_CAPTIVE_SELF_TEST 130
/* smart_attribute is the vendor specific in SFF-8035 spec */
typedef struct ata_smart_attribute_s {
unsigned char id;
unsigned short status_flag;
unsigned char normalized;
unsigned char worse_normal;
unsigned char raw[6];
unsigned char reserv;
} __attribute__ ((packed)) ata_smart_attribute_t;
/* smart_values is format of the read drive Atrribute command */
typedef struct ata_smart_values_s {
unsigned short revnumber;
ata_smart_attribute_t vendor_attributes [30];
unsigned char offline_data_collection_status;
unsigned char self_test_exec_status;
unsigned short total_time_to_complete_off_line;
unsigned char vendor_specific_366;
unsigned char offline_data_collection_capability;
unsigned short smart_capability;
unsigned char errorlog_capability;
unsigned char vendor_specific_371;
unsigned char short_test_completion_time;
unsigned char extend_test_completion_time;
unsigned char reserved_374_385 [12];
unsigned char vendor_specific_386_509 [125];
unsigned char chksum;
} __attribute__ ((packed)) ata_smart_values_t;
/* Smart Threshold data structures */
/* Vendor attribute of SMART Threshold */
typedef struct ata_smart_threshold_entry_s {
unsigned char id;
unsigned char normalized_threshold;
unsigned char reserved[10];
} __attribute__ ((packed)) ata_smart_threshold_entry_t;
/* Format of Read SMART THreshold Command */
typedef struct ata_smart_thresholds_s {
unsigned short revnumber;
ata_smart_threshold_entry_t thres_entries[30];
unsigned char reserved[149];
unsigned char chksum;
} __attribute__ ((packed)) ata_smart_thresholds_t;
typedef struct ata_smart_errorlog_command_struct_s {
unsigned char devicecontrolreg;
unsigned char featuresreg;
unsigned char sector_count;
unsigned char sector_number;
unsigned char cylinder_low;
unsigned char cylinder_high;
unsigned char drive_head;
unsigned char commandreg;
unsigned int timestamp;
} __attribute__ ((packed)) ata_smart_errorlog_command_struct_t;
typedef struct ata_smart_errorlog_error_struct_s {
unsigned char error_condition;
unsigned char extended_error[14];
unsigned char state;
unsigned short timestamp;
} __attribute__ ((packed)) ata_smart_errorlog_error_struct_t;
typedef struct ata_smart_errorlog_struct_s {
ata_smart_errorlog_command_struct_t commands[6];
ata_smart_errorlog_error_struct_t error_struct;
} __attribute__ ((packed)) ata_smart_errorlog_struct_t;
typedef struct ata_smart_errorlog_s {
unsigned char revnumber;
unsigned char error_log_pointer;
ata_smart_errorlog_struct_t errorlog_struct[5];
unsigned short ata_error_count;
unsigned short non_fatal_count;
unsigned short drive_timeout_count;
unsigned char reserved[53];
unsigned char chksum;
} __attribute__ ((packed)) ata_smart_errorlog_t;
typedef struct ata_smart_selftestlog_struct_s {
unsigned char selftestnumber;
unsigned char selfteststatus;
unsigned short timestamp;
unsigned char selftestfailurecheckpoint;
unsigned int lbafirstfailure;
unsigned char vendorspecific[15];
} __attribute__ ((packed)) ata_smart_selftestlog_struct_t;
typedef struct ata_smart_selftestlog_s {
unsigned short revnumber;
ata_smart_selftestlog_struct_t selftest_struct[21];
unsigned char vendorspecific[2];
unsigned char mostrecenttest;
unsigned char resevered[2];
unsigned char chksum;
} __attribute__ ((packed)) ata_smart_selftestlog_t;
#endif /* __KERNEL__ */
#endif /* _LINUX_HDSMART_H */
include/linux/ide.h
View file @ 1292ebb8
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