Commit 12ada3ae authored by Russell King's avatar Russell King

Merge flint.arm.linux.org.uk:/usr/src/linux-bk-2.5/linux-2.5

into flint.arm.linux.org.uk:/usr/src/linux-bk-2.5/linux-2.5-rmk
parents 7f939798 e4923829
......@@ -54,7 +54,7 @@ struct safe_buffer {
dma_addr_t safe_dma_addr;
};
LIST_HEAD(safe_buffers);
static LIST_HEAD(safe_buffers);
#define SIZE_SMALL 1024
......
......@@ -218,7 +218,7 @@ static void sa1111_unmask_lowirq(unsigned int irq)
* be triggered. In fact, its very difficult, if not impossible to get
* INTSET to re-trigger the interrupt.
*/
static void sa1111_rerun_lowirq(unsigned int irq)
static int sa1111_retrigger_lowirq(unsigned int irq)
{
unsigned int mask = SA1111_IRQMASK_LO(irq);
int i;
......@@ -233,6 +233,7 @@ static void sa1111_rerun_lowirq(unsigned int irq)
if (i == 8)
printk(KERN_ERR "Danger Will Robinson: failed to "
"re-trigger IRQ%d\n", irq);
return i == 8 ? -1 : 0;
}
static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
......@@ -270,7 +271,7 @@ static struct irqchip sa1111_low_chip = {
.ack = sa1111_ack_irq,
.mask = sa1111_mask_lowirq,
.unmask = sa1111_unmask_lowirq,
.rerun = sa1111_rerun_lowirq,
.retrigger = sa1111_retrigger_lowirq,
.type = sa1111_type_lowirq,
.wake = sa1111_wake_lowirq,
};
......@@ -292,7 +293,7 @@ static void sa1111_unmask_highirq(unsigned int irq)
* be triggered. In fact, its very difficult, if not impossible to get
* INTSET to re-trigger the interrupt.
*/
static void sa1111_rerun_highirq(unsigned int irq)
static int sa1111_retrigger_highirq(unsigned int irq)
{
unsigned int mask = SA1111_IRQMASK_HI(irq);
int i;
......@@ -307,6 +308,7 @@ static void sa1111_rerun_highirq(unsigned int irq)
if (i == 8)
printk(KERN_ERR "Danger Will Robinson: failed to "
"re-trigger IRQ%d\n", irq);
return i == 8 ? -1 : 0;
}
static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
......@@ -344,7 +346,7 @@ static struct irqchip sa1111_high_chip = {
.ack = sa1111_ack_irq,
.mask = sa1111_mask_highirq,
.unmask = sa1111_unmask_highirq,
.rerun = sa1111_rerun_highirq,
.retrigger = sa1111_retrigger_highirq,
.type = sa1111_type_highirq,
.wake = sa1111_wake_highirq,
};
......
This diff is collapsed.
......@@ -29,6 +29,7 @@
#include <linux/init.h>
#include <linux/seq_file.h>
#include <linux/errno.h>
#include <linux/list.h>
#include <asm/irq.h>
#include <asm/system.h>
......@@ -45,6 +46,7 @@
static volatile unsigned long irq_err_count;
static spinlock_t irq_controller_lock;
static LIST_HEAD(irq_pending);
struct irqdesc irq_desc[NR_IRQS];
void (*init_arch_irq)(void) __initdata = NULL;
......@@ -69,9 +71,10 @@ static struct irqchip bad_chip = {
};
static struct irqdesc bad_irq_desc = {
.chip = &bad_chip,
.handle = do_bad_IRQ,
.depth = 1,
.chip = &bad_chip,
.handle = do_bad_IRQ,
.pend = LIST_HEAD_INIT(bad_irq_desc.pend),
.disable_depth = 1,
};
/**
......@@ -90,6 +93,7 @@ void disable_irq(unsigned int irq)
spin_lock_irqsave(&irq_controller_lock, flags);
desc->disable_depth++;
list_del_init(&desc->pend);
spin_unlock_irqrestore(&irq_controller_lock, flags);
}
......@@ -122,9 +126,11 @@ void enable_irq(unsigned int irq)
* from here since the caller might be in an
* interrupt-protected region.
*/
if (desc->pending) {
if (desc->pending && list_empty(&desc->pend)) {
desc->pending = 0;
desc->chip->rerun(irq);
if (!desc->chip->retrigger ||
desc->chip->retrigger(irq))
list_add(&desc->pend, &irq_pending);
}
}
spin_unlock_irqrestore(&irq_controller_lock, flags);
......@@ -346,6 +352,40 @@ do_level_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
}
}
static void do_pending_irqs(struct pt_regs *regs)
{
struct list_head head, *l, *n;
do {
struct irqdesc *desc;
/*
* First, take the pending interrupts off the list.
* The act of calling the handlers may add some IRQs
* back onto the list.
*/
head = irq_pending;
INIT_LIST_HEAD(&irq_pending);
head.next->prev = &head;
head.prev->next = &head;
/*
* Now run each entry. We must delete it from our
* list before calling the handler.
*/
list_for_each_safe(l, n, &head) {
desc = list_entry(l, struct irqdesc, pend);
list_del_init(&desc->pend);
desc->handle(desc - irq_desc, desc, regs);
}
/*
* The list must be empty.
*/
BUG_ON(!list_empty(&head));
} while (!list_empty(&irq_pending));
}
/*
* do_IRQ handles all hardware IRQ's. Decoded IRQs should not
* come via this function. Instead, they should provide their
......@@ -365,6 +405,13 @@ asmlinkage void asm_do_IRQ(int irq, struct pt_regs *regs)
irq_enter();
spin_lock(&irq_controller_lock);
desc->handle(irq, desc, regs);
/*
* Now re-run any pending interrupts.
*/
if (!list_empty(&irq_pending))
do_pending_irqs(regs);
spin_unlock(&irq_controller_lock);
irq_exit();
}
......@@ -740,8 +787,10 @@ void __init init_IRQ(void)
extern void init_dma(void);
int irq;
for (irq = 0, desc = irq_desc; irq < NR_IRQS; irq++, desc++)
for (irq = 0, desc = irq_desc; irq < NR_IRQS; irq++, desc++) {
*desc = bad_irq_desc;
INIT_LIST_HEAD(&desc->pend);
}
init_arch_irq();
init_dma();
......
......@@ -52,9 +52,14 @@ static const char *handler[]= { "prefetch abort", "data abort", "address excepti
void dump_backtrace_entry(unsigned long where, unsigned long from)
{
#ifdef CONFIG_KALLSYMS
printk("[<%08lx>] ", where);
print_symbol("(%s) ", where);
printk("from [<%08lx>] ", from);
print_symbol("(%s)\n", from);
#else
printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from);
print_symbol(" %s", where);
printk("\n");
#endif
}
/*
......@@ -503,11 +508,11 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs)
die_if_kernel("unknown data abort code", regs, instr);
}
void __bug(const char *file, int line, void *data)
volatile void __bug(const char *file, int line, void *data)
{
printk(KERN_CRIT"kernel BUG at %s:%d!", file, line);
if (data)
printk(KERN_CRIT" - extra data = %p", data);
printk(" - extra data = %p", data);
printk("\n");
*(int *)0 = 0;
}
......
......@@ -19,6 +19,9 @@
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/stddef.h>
#include <linux/timer.h>
#include <linux/list.h>
#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/irq.h>
......
......@@ -15,6 +15,7 @@
* 16-Mar-1999 RMK Added autodetect of ISA PICs
*/
#include <linux/ioport.h>
#include <linux/list.h>
#include <linux/init.h>
#include <asm/mach/irq.h>
......
......@@ -16,6 +16,7 @@
*/
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/init.h>
#include <asm/mach/irq.h>
......
......@@ -15,6 +15,7 @@
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <asm/mach/irq.h>
#include <asm/irq.h>
......
......@@ -360,6 +360,8 @@ int iop310_setup(int nr, struct pci_sys_data *sys)
if (!res)
panic("PCI: unable to alloc resources");
memset(res, 0, sizeof(struct resource) * 2);
switch (nr) {
case 0:
res[0].start = IOP310_PCIPRI_LOWER_IO + 0x6e000000;
......
......@@ -15,6 +15,7 @@
* Fixes for various revision boards - DS
*/
#include <linux/init.h>
#include <linux/list.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
......
......@@ -11,6 +11,7 @@
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/list.h>
#include <asm/mach/irq.h>
#include <asm/irq.h>
......
......@@ -85,19 +85,6 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
return 0;
}
/*
* Since we can't actually physically mask edge triggered interrupts
* without the risk of missing transitions, we therefore logically mask
* them and defer their processing through tis function.
*/
static void pxa_manual_rerun(unsigned int irq)
{
struct pt_regs regs;
memset(&regs, 0, sizeof(regs));
irq_desc[irq].handle(irq, &irq_desc[irq], &regs);
}
/*
* GPIO IRQs must be acknoledged. This is for GPIO 0 and 1.
*/
......@@ -111,7 +98,6 @@ static struct irqchip pxa_low_gpio_chip = {
.ack = pxa_ack_low_gpio,
.mask = pxa_mask_irq,
.unmask = pxa_unmask_irq,
.rerun = pxa_manual_rerun,
.type = pxa_gpio_irq_type,
};
......
#include <linux/init.h>
#include <linux/list.h>
#include <asm/mach/irq.h>
#include <asm/hardware/iomd.h>
......
......@@ -13,6 +13,7 @@
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/ptrace.h>
#include <linux/device.h>
#include <asm/hardware.h>
#include <asm/irq.h>
......@@ -24,20 +25,12 @@
/*
* SA1100 GPIO edge detection for IRQs:
* IRQs are generated on Falling-Edge, Rising-Edge, or both.
* This must be called *before* the appropriate IRQ is registered.
* Use this instead of directly setting GRER/GFER.
*/
static int GPIO_IRQ_rising_edge;
static int GPIO_IRQ_falling_edge;
static int GPIO_IRQ_mask = (1 << 11) - 1;
static void sa1100_manual_rerun(unsigned int irq)
{
struct pt_regs regs;
memset(&regs, 0, sizeof(regs));
irq_desc[irq].handle(irq, &irq_desc[irq], &regs);
}
/*
* To get the GPIO number from an IRQ number
*/
......@@ -105,7 +98,6 @@ static struct irqchip sa1100_low_gpio_chip = {
.ack = sa1100_low_gpio_ack,
.mask = sa1100_low_gpio_mask,
.unmask = sa1100_low_gpio_unmask,
.rerun = sa1100_manual_rerun,
.type = sa1100_gpio_type,
.wake = sa1100_low_gpio_wake,
};
......@@ -189,7 +181,6 @@ static struct irqchip sa1100_high_gpio_chip = {
.ack = sa1100_high_gpio_ack,
.mask = sa1100_high_gpio_mask,
.unmask = sa1100_high_gpio_unmask,
.rerun = sa1100_manual_rerun,
.type = sa1100_gpio_type,
.wake = sa1100_high_gpio_wake,
};
......@@ -212,7 +203,6 @@ static struct irqchip sa1100_normal_chip = {
.ack = sa1100_mask_irq,
.mask = sa1100_mask_irq,
.unmask = sa1100_unmask_irq,
/* rerun should never be called */
};
static struct resource irq_resource = {
......@@ -267,10 +257,4 @@ void __init sa1100_init_irq(void)
*/
set_irq_chip(IRQ_GPIO11_27, &sa1100_normal_chip);
set_irq_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler);
/*
* We generally don't want the LCD IRQ being
* enabled as soon as we request it.
*/
set_irq_flags(IRQ_LCD, IRQF_VALID/* | IRQF_NOAUTOEN*/);
}
......@@ -15,9 +15,9 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/serial_sa1100.h>
#include <asm/hardware/sa1111.h>
#include "generic.h"
#include "sa1111.h"
static void xp860_power_off(void)
......
......@@ -83,7 +83,7 @@ static void vm_region_dump(struct vm_region *head, char *fn)
struct vm_region *c;
printk("Consistent Allocation Map (%s):\n", fn);
list_for_each_entry(c, &head->list, vm_list) {
list_for_each_entry(c, &head->vm_list, vm_list) {
printk(" %p: %08lx - %08lx (0x%08x)\n", c,
c->vm_start, c->vm_end, c->vm_end - c->vm_start);
}
......
......@@ -678,7 +678,7 @@ __xscale_setup:
mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes
mrc p15, 0, r0, c1, c0, 0 @ get control register
bic r0, r0, #0x0200 @ .... ..R. .... ....
bic r0, r0, #0x0082 @ .... .... B... ..A.
bic r0, r0, #0x0002 @ .... .... .... ..A.
orr r0, r0, #0x0005 @ .... .... .... .C.M
orr r0, r0, #0x3900 @ ..VI Z..S .... ....
mov pc, lr
......
......@@ -7,7 +7,11 @@
OUTPUT_ARCH(arm)
ENTRY(stext)
#ifndef __ARMEB__
jiffies = jiffies_64;
#else
jiffies = jiffies_64 + 4;
#endif
SECTIONS
{
. = TEXTADDR;
......
......@@ -24,8 +24,8 @@
#define STD_SERIAL_PORT_DEFNS \
/* UART CLK PORT IRQ FLAGS */ \
{ 0, BASE_BAUD, 0xfe810000, IRQ_UART2, STD_COM_FLAGS }, /* ttyS0 */ \
{ 0, BASE_BAUD, 0xfe800000, IRQ_UART1, STD_COM_FLAGS } /* ttyS1 */
{ 0, BASE_BAUD, IQ80310_UART2, IRQ_UART2, STD_COM_FLAGS }, /* ttyS0 */ \
{ 0, BASE_BAUD, IQ80310_UART1, IRQ_UART1, STD_COM_FLAGS } /* ttyS1 */
#endif // CONFIG_ARCH_IQ80310
......
......@@ -33,9 +33,12 @@ struct irqchip {
*/
void (*unmask)(unsigned int);
/*
* Re-run the IRQ
* Ask the hardware to re-trigger the IRQ.
* Note: This method _must_ _not_ call the interrupt handler.
* If you are unable to retrigger the interrupt, do not
* provide a function, or if you do, return non-zero.
*/
void (*rerun)(unsigned int);
int (*retrigger)(unsigned int);
/*
* Set the type of the IRQ.
*/
......@@ -50,6 +53,7 @@ struct irqdesc {
irq_handler_t handle;
struct irqchip *chip;
struct irqaction *action;
struct list_head pend;
unsigned int disable_depth;
unsigned int triggered: 1; /* IRQ has occurred */
......
......@@ -23,7 +23,7 @@
#define KERNEL_STACK_SIZE PAGE_SIZE
#define INIT_EXTRA_THREAD_INFO \
.cpu_domain = domain_val(DOMAIN_USER, DOMAIN_CLIENT) | \
.cpu_domain = domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
domain_val(DOMAIN_IO, DOMAIN_CLIENT)
......
......@@ -14,9 +14,14 @@
#define set_cr(x) \
__asm__ __volatile__( \
"mcr p15, 0, %0, c1, c0 @ set CR" \
"mcr p15, 0, %0, c1, c0, 0 @ set CR" \
: : "r" (x))
#define get_cr(x) \
__asm__ __volatile__( \
"mrc p15, 0, %0, c1, c0, 0 @ get CR" \
: "=r" (x))
#define CR_M (1 << 0) /* MMU enable */
#define CR_A (1 << 1) /* Alignment abort enable */
#define CR_C (1 << 2) /* Dcache enable */
......@@ -24,9 +29,9 @@
#define CR_P (1 << 4) /* 32-bit exception handler */
#define CR_D (1 << 5) /* 32-bit data address range */
#define CR_L (1 << 6) /* Implementation defined */
#define CD_B (1 << 7) /* Big endian */
#define CR_B (1 << 7) /* Big endian */
#define CR_S (1 << 8) /* System MMU protection */
#define CD_R (1 << 9) /* ROM MMU protection */
#define CR_R (1 << 9) /* ROM MMU protection */
#define CR_F (1 << 10) /* Implementation defined */
#define CR_Z (1 << 11) /* Implementation defined */
#define CR_I (1 << 12) /* Icache enable */
......
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