Commit 13381016 authored by Alan Cox's avatar Alan Cox Committed by Linus Torvalds

[PATCH] correct irq logic for x86

We must not look for a PCI IRQ for a non native mode IDE device
We must write PCI_INTERRUPT_LINE for VIA
parent 7ee60db1
...@@ -804,6 +804,7 @@ void pcibios_penalize_isa_irq(int irq) ...@@ -804,6 +804,7 @@ void pcibios_penalize_isa_irq(int irq)
int pirq_enable_irq(struct pci_dev *dev) int pirq_enable_irq(struct pci_dev *dev)
{ {
u8 pin; u8 pin;
extern int interrupt_line_quirk;
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) { if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
char *msg; char *msg;
...@@ -813,9 +814,17 @@ int pirq_enable_irq(struct pci_dev *dev) ...@@ -813,9 +814,17 @@ int pirq_enable_irq(struct pci_dev *dev)
msg = ""; msg = "";
else else
msg = " Please try using pci=biosirq."; msg = " Please try using pci=biosirq.";
/* With IDE legacy devices the IRQ lookup failure is not a problem.. */
if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
return;
printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n", printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
'A' + pin - 1, dev->slot_name, msg); 'A' + pin - 1, dev->slot_name, msg);
} }
/* VIA bridges use interrupt line for apic/pci steering across
the V-Link */
else if (interrupt_line_quirk)
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
return 0; return 0;
} }
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