Commit 13f3e642 authored by Sonic Zhang's avatar Sonic Zhang Committed by Linus Torvalds

spi_bfin: wait for tx to complete on write paths

SPI writes should also not return until the last bit is sent.
Signed-off-by: default avatarSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: default avatarBryan Wu <bryan.wu@analog.com>
Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 4fd432d9
...@@ -278,16 +278,16 @@ static void u8_writer(struct driver_data *drv_data) ...@@ -278,16 +278,16 @@ static void u8_writer(struct driver_data *drv_data)
dev_dbg(&drv_data->pdev->dev, dev_dbg(&drv_data->pdev->dev,
"cr8-s is 0x%x\n", read_STAT(drv_data)); "cr8-s is 0x%x\n", read_STAT(drv_data));
/* poll for SPI completion before start */
while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();
while (drv_data->tx < drv_data->tx_end) { while (drv_data->tx < drv_data->tx_end) {
write_TDBR(drv_data, (*(u8 *) (drv_data->tx))); write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
while (read_STAT(drv_data) & BIT_STAT_TXS) while (read_STAT(drv_data) & BIT_STAT_TXS)
cpu_relax(); cpu_relax();
++drv_data->tx; ++drv_data->tx;
} }
/* poll for SPI completion before return */
while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();
} }
static void u8_cs_chg_writer(struct driver_data *drv_data) static void u8_cs_chg_writer(struct driver_data *drv_data)
...@@ -398,32 +398,30 @@ static void u16_writer(struct driver_data *drv_data) ...@@ -398,32 +398,30 @@ static void u16_writer(struct driver_data *drv_data)
dev_dbg(&drv_data->pdev->dev, dev_dbg(&drv_data->pdev->dev,
"cr16 is 0x%x\n", read_STAT(drv_data)); "cr16 is 0x%x\n", read_STAT(drv_data));
/* poll for SPI completion before start */
while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();
while (drv_data->tx < drv_data->tx_end) { while (drv_data->tx < drv_data->tx_end) {
write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
while ((read_STAT(drv_data) & BIT_STAT_TXS)) while ((read_STAT(drv_data) & BIT_STAT_TXS))
cpu_relax(); cpu_relax();
drv_data->tx += 2; drv_data->tx += 2;
} }
/* poll for SPI completion before return */
while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();
} }
static void u16_cs_chg_writer(struct driver_data *drv_data) static void u16_cs_chg_writer(struct driver_data *drv_data)
{ {
struct chip_data *chip = drv_data->cur_chip; struct chip_data *chip = drv_data->cur_chip;
/* poll for SPI completion before start */
while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();
while (drv_data->tx < drv_data->tx_end) { while (drv_data->tx < drv_data->tx_end) {
cs_active(drv_data, chip); cs_active(drv_data, chip);
write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
while ((read_STAT(drv_data) & BIT_STAT_TXS)) while ((read_STAT(drv_data) & BIT_STAT_TXS))
cpu_relax(); cpu_relax();
while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();
cs_deactive(drv_data, chip); cs_deactive(drv_data, chip);
......
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