Commit 14421383 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'sh/for-2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* 'sh/for-2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: Don't allocate smaller sized mappings on every iteration
  sh: Try PMB mapping based on physical address, not mapping size
  sh: Plug PMB alloc memory leak
  sh: Sprinkle __uses_jump_to_uncached
  sh: enable sleep state LEDs on Ecovec24
  usb: r8a66597-udc unaligned fifo fix
  sh: mach-ecovec24: Document DS2 switch settings.
  sh: Build fix: export __movmem
  sh: Disable unaligned kernel access printks by default.
  sh: mach-ecovec24: modify 1st MTD area to read only
  sh: mach-ecovec24: Add TouchScreen support
  sh: magicpanelr2 and dreamcast can use the generic I/O base.
  sh: Don't enable interrupts in the page fault path
  sh: Set the default I/O port base to P2SEG.
  sh: Handle ioport_map() cases for >= P1SEG addresses.
parents 902ff186 a2767cfb
......@@ -205,8 +205,6 @@ static void __init setup_port_multiplexing(void)
static void __init mpr2_setup(char **cmdline_p)
{
__set_io_port_base(0xa0000000);
/* set Pin Select Register A:
* /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2,
* /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND
......
......@@ -42,8 +42,6 @@ static void __init dreamcast_setup(char **cmdline_p)
/* Acknowledge any previous events */
/* XXX */
__set_io_port_base(0xa0000000);
/* Assign all virtual IRQs to the System ASIC int. handler */
for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
set_irq_chip_and_handler(i, &systemasic_int,
......
......@@ -18,6 +18,7 @@
#include <linux/delay.h>
#include <linux/usb/r8a66597.h>
#include <linux/i2c.h>
#include <linux/i2c/tsc2007.h>
#include <linux/input.h>
#include <video/sh_mobile_lcdc.h>
#include <media/sh_mobile_ceu.h>
......@@ -38,6 +39,20 @@
* 0x1800_0000 MFI 16bit
*/
/* SWITCH
*------------------------------
* DS2[1] = FlashROM write protect ON : write protect
* OFF : No write protect
* DS2[2] = RMII / TS, SCIF ON : RMII
* OFF : TS, SCIF3
* DS2[3] = Camera / Video ON : Camera
* OFF : NTSC/PAL (IN)
* DS2[5] = NTSC_OUT Clock ON : On board OSC
* OFF : SH7724 DV_CLK
* DS2[6-7] = MMC / SD ON-OFF : SD
* OFF-ON : MMC
*/
/* Heartbeat */
static unsigned char led_pos[] = { 0, 1, 2, 3 };
static struct heartbeat_data heartbeat_data = {
......@@ -70,7 +85,7 @@ static struct mtd_partition nor_flash_partitions[] = {
.name = "boot loader",
.offset = 0,
.size = (5 * 1024 * 1024),
.mask_flags = MTD_CAP_ROM,
.mask_flags = MTD_WRITEABLE, /* force read-only */
}, {
.name = "free-area",
.offset = MTDPART_OFS_APPEND,
......@@ -376,6 +391,43 @@ static struct platform_device keysc_device = {
},
};
/* TouchScreen */
#define IRQ0 32
static int ts_get_pendown_state(void)
{
int val = 0;
gpio_free(GPIO_FN_INTC_IRQ0);
gpio_request(GPIO_PTZ0, NULL);
gpio_direction_input(GPIO_PTZ0);
val = gpio_get_value(GPIO_PTZ0);
gpio_free(GPIO_PTZ0);
gpio_request(GPIO_FN_INTC_IRQ0, NULL);
return val ? 0 : 1;
}
static int ts_init(void)
{
gpio_request(GPIO_FN_INTC_IRQ0, NULL);
return 0;
}
struct tsc2007_platform_data tsc2007_info = {
.model = 2007,
.x_plate_ohms = 180,
.get_pendown_state = ts_get_pendown_state,
.init_platform_hw = ts_init,
};
static struct i2c_board_info ts_i2c_clients = {
I2C_BOARD_INFO("tsc2007", 0x48),
.type = "tsc2007",
.platform_data = &tsc2007_info,
.irq = IRQ0,
};
static struct platform_device *ecovec_devices[] __initdata = {
&heartbeat_device,
&nor_flash_device,
......@@ -460,6 +512,11 @@ static void __init sh_eth_init(void)
#define IODRIVEA 0xA405018A
static int __init arch_setup(void)
{
/* enable STATUS0, STATUS2 and PDSTATUS */
gpio_request(GPIO_FN_STATUS0, NULL);
gpio_request(GPIO_FN_STATUS2, NULL);
gpio_request(GPIO_FN_PDSTATUS, NULL);
/* enable SCIFA0 */
gpio_request(GPIO_FN_SCIF0_TXD, NULL);
gpio_request(GPIO_FN_SCIF0_RXD, NULL);
......@@ -590,6 +647,10 @@ static int __init arch_setup(void)
*/
gpio_request(GPIO_PTF4, NULL);
gpio_direction_output(GPIO_PTF4, 1);
/* enable TouchScreen */
i2c_register_board_info(0, &ts_i2c_clients, 1);
set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
}
/* enable CEU0 */
......
......@@ -152,8 +152,6 @@ call_do_page_fault:
mov.l 1f, r0
mov.l @r0, r6
sti
mov.l 3f, r0
mov.l 4f, r1
mov r15, r4
......
......@@ -147,6 +147,9 @@ void generic_outsl(unsigned long port, const void *src, unsigned long count)
void __iomem *generic_ioport_map(unsigned long addr, unsigned int size)
{
if (PXSEG(addr) >= P1SEG)
return (void __iomem *)addr;
return (void __iomem *)(addr + generic_io_base);
}
......
......@@ -14,6 +14,7 @@
#include <linux/string.h>
#include <asm/machvec.h>
#include <asm/sections.h>
#include <asm/addrspace.h>
#include <asm/setup.h>
#include <asm/io.h>
#include <asm/irq.h>
......@@ -133,4 +134,6 @@ void __init sh_mv_setup(void)
if (!sh_mv.mv_nr_irqs)
sh_mv.mv_nr_irqs = NR_IRQS;
__set_io_port_base(P2SEG);
}
......@@ -84,6 +84,7 @@ DECLARE_EXPORT(__movstrSI60);
DECLARE_EXPORT(__movstr_i4_even);
DECLARE_EXPORT(__movstr_i4_odd);
DECLARE_EXPORT(__movstrSI12_i4);
DECLARE_EXPORT(__movmem);
DECLARE_EXPORT(__movmem_i4_even);
DECLARE_EXPORT(__movmem_i4_odd);
DECLARE_EXPORT(__movmemSI12_i4);
......
......@@ -54,8 +54,8 @@ static unsigned long se_multi;
/* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not
valid! */
static int se_usermode = 3;
/* 0: no warning 1: print a warning message */
static int se_kernmode_warn = 1;
/* 0: no warning 1: print a warning message, disabled by default */
static int se_kernmode_warn;
#ifdef CONFIG_PROC_FS
static const char *se_usermode_action[] = {
......
......@@ -43,7 +43,7 @@ static void (*__flush_dcache_segment_fn)(unsigned long, unsigned long) =
* Called from kernel/module.c:sys_init_module and routine for a.out format,
* signal handler code and kprobes code
*/
static void sh4_flush_icache_range(void *args)
static void __uses_jump_to_uncached sh4_flush_icache_range(void *args)
{
struct flusher_data *data = args;
unsigned long start, end;
......
......@@ -78,7 +78,7 @@ static void sh7705_flush_icache_range(void *args)
/*
* Writeback&Invalidate the D-cache of the page
*/
static void __flush_dcache_page(unsigned long phys)
static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys)
{
unsigned long ways, waysize, addrstart;
unsigned long flags;
......@@ -144,7 +144,7 @@ static void sh7705_flush_dcache_page(void *arg)
__flush_dcache_page(PHYSADDR(page_address(page)));
}
static void sh7705_flush_cache_all(void *args)
static void __uses_jump_to_uncached sh7705_flush_cache_all(void *args)
{
unsigned long flags;
......
......@@ -83,7 +83,7 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
*
* PMB entries are all pre-faulted.
*/
if (unlikely(size >= 0x1000000)) {
if (unlikely(phys_addr >= P1SEG)) {
unsigned long mapped = pmb_remap(addr, phys_addr, size, flags);
if (likely(mapped)) {
......
......@@ -33,6 +33,8 @@
#define NR_PMB_ENTRIES 16
static void __pmb_unmap(struct pmb_entry *);
static struct kmem_cache *pmb_cache;
static unsigned long pmb_map;
......@@ -218,9 +220,10 @@ static struct {
long pmb_remap(unsigned long vaddr, unsigned long phys,
unsigned long size, unsigned long flags)
{
struct pmb_entry *pmbp;
struct pmb_entry *pmbp, *pmbe;
unsigned long wanted;
int pmb_flags, i;
long err;
/* Convert typical pgprot value to the PMB equivalent */
if (flags & _PAGE_CACHABLE) {
......@@ -236,20 +239,22 @@ long pmb_remap(unsigned long vaddr, unsigned long phys,
again:
for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
struct pmb_entry *pmbe;
int ret;
if (size < pmb_sizes[i].size)
continue;
pmbe = pmb_alloc(vaddr, phys, pmb_flags | pmb_sizes[i].flag);
if (IS_ERR(pmbe))
return PTR_ERR(pmbe);
if (IS_ERR(pmbe)) {
err = PTR_ERR(pmbe);
goto out;
}
ret = set_pmb_entry(pmbe);
if (ret != 0) {
pmb_free(pmbe);
return -EBUSY;
err = -EBUSY;
goto out;
}
phys += pmb_sizes[i].size;
......@@ -264,12 +269,25 @@ long pmb_remap(unsigned long vaddr, unsigned long phys,
pmbp->link = pmbe;
pmbp = pmbe;
/*
* Instead of trying smaller sizes on every iteration
* (even if we succeed in allocating space), try using
* pmb_sizes[i].size again.
*/
i--;
}
if (size >= 0x1000000)
goto again;
return wanted - size;
out:
if (pmbp)
__pmb_unmap(pmbp);
return err;
}
void pmb_unmap(unsigned long addr)
......@@ -283,12 +301,19 @@ void pmb_unmap(unsigned long addr)
if (unlikely(!pmbe))
return;
__pmb_unmap(pmbe);
}
static void __pmb_unmap(struct pmb_entry *pmbe)
{
WARN_ON(!test_bit(pmbe->entry, &pmb_map));
do {
struct pmb_entry *pmblink = pmbe;
clear_pmb_entry(pmbe);
if (pmbe->entry != PMB_NO_ENTRY)
clear_pmb_entry(pmbe);
pmbe = pmblink->link;
pmb_free(pmblink);
......
......@@ -131,31 +131,48 @@ static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)
}
static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
unsigned long offset, u16 *buf,
unsigned long offset,
unsigned char *buf,
int len)
{
unsigned long fifoaddr = r8a66597->reg + offset;
unsigned int data;
int i;
if (r8a66597->pdata->on_chip) {
unsigned long fifoaddr = r8a66597->reg + offset;
unsigned long count;
union {
unsigned long dword;
unsigned char byte[4];
} data;
unsigned char *pb;
int i;
count = len / 4;
insl(fifoaddr, buf, count);
if (len & 0x00000003) {
data.dword = inl(fifoaddr);
pb = (unsigned char *)buf + count * 4;
for (i = 0; i < (len & 0x00000003); i++)
pb[i] = data.byte[i];
/* 32-bit accesses for on_chip controllers */
/* aligned buf case */
if (len >= 4 && !((unsigned long)buf & 0x03)) {
insl(fifoaddr, buf, len / 4);
buf += len & ~0x03;
len &= 0x03;
}
/* unaligned buf case */
for (i = 0; i < len; i++) {
if (!(i & 0x03))
data = inl(fifoaddr);
buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
}
} else {
len = (len + 1) / 2;
insw(r8a66597->reg + offset, buf, len);
/* 16-bit accesses for external controllers */
/* aligned buf case */
if (len >= 2 && !((unsigned long)buf & 0x01)) {
insw(fifoaddr, buf, len / 2);
buf += len & ~0x01;
len &= 0x01;
}
/* unaligned buf case */
for (i = 0; i < len; i++) {
if (!(i & 0x01))
data = inw(fifoaddr);
buf[i] = (data >> ((i & 0x01) * 8)) & 0xff;
}
}
}
......@@ -166,38 +183,40 @@ static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
}
static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
unsigned long offset, u16 *buf,
unsigned long offset,
unsigned char *buf,
int len)
{
unsigned long fifoaddr = r8a66597->reg + offset;
int adj = 0;
int i;
if (r8a66597->pdata->on_chip) {
unsigned long count;
unsigned char *pb;
int i;
count = len / 4;
outsl(fifoaddr, buf, count);
if (len & 0x00000003) {
pb = (unsigned char *)buf + count * 4;
for (i = 0; i < (len & 0x00000003); i++) {
if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
outb(pb[i], fifoaddr + i);
else
outb(pb[i], fifoaddr + 3 - i);
}
/* 32-bit access only if buf is 32-bit aligned */
if (len >= 4 && !((unsigned long)buf & 0x03)) {
outsl(fifoaddr, buf, len / 4);
buf += len & ~0x03;
len &= 0x03;
}
} else {
int odd = len & 0x0001;
len = len / 2;
outsw(fifoaddr, buf, len);
if (unlikely(odd)) {
buf = &buf[len];
outb((unsigned char)*buf, fifoaddr);
/* 16-bit access only if buf is 16-bit aligned */
if (len >= 2 && !((unsigned long)buf & 0x01)) {
outsw(fifoaddr, buf, len / 2);
buf += len & ~0x01;
len &= 0x01;
}
}
/* adjust fifo address in the little endian case */
if (!(r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)) {
if (r8a66597->pdata->on_chip)
adj = 0x03; /* 32-bit wide */
else
adj = 0x01; /* 16-bit wide */
}
for (i = 0; i < len; i++)
outb(buf[i], fifoaddr + adj - (i & adj));
}
static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,
......
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