Commit 14cac662 authored by Alain Volmat's avatar Alain Volmat Committed by Jakub Kicinski

net: ethernet: stmmac: dwmac-sti: remove stih415/stih416/stid127

Remove no more supported platforms (stih415/stih416 and stid127)
Signed-off-by: default avatarAlain Volmat <avolmat@me.com>
Acked-by: default avatarJakub Kicinski <kuba@kernel.org>
Reviewed-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
Link: https://lore.kernel.org/r/20230416195523.61075-1-avolmat@me.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 33d74c8f
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
#define IS_PHY_IF_MODE_GBIT(iface) (IS_PHY_IF_MODE_RGMII(iface) || \ #define IS_PHY_IF_MODE_GBIT(iface) (IS_PHY_IF_MODE_RGMII(iface) || \
iface == PHY_INTERFACE_MODE_GMII) iface == PHY_INTERFACE_MODE_GMII)
/* STiH4xx register definitions (STiH415/STiH416/STiH407/STiH410 families) /* STiH4xx register definitions (STiH407/STiH410 families)
* *
* Below table summarizes the clock requirement and clock sources for * Below table summarizes the clock requirement and clock sources for
* supported phy interface modes with link speeds. * supported phy interface modes with link speeds.
...@@ -75,27 +75,6 @@ ...@@ -75,27 +75,6 @@
#define STIH4XX_ETH_SEL_INTERNAL_NOTEXT_PHYCLK BIT(7) #define STIH4XX_ETH_SEL_INTERNAL_NOTEXT_PHYCLK BIT(7)
#define STIH4XX_ETH_SEL_TXCLK_NOT_CLK125 BIT(6) #define STIH4XX_ETH_SEL_TXCLK_NOT_CLK125 BIT(6)
/* STiD127 register definitions
*-----------------------
* src |BIT(6)| BIT(7)|
*-----------------------
* MII | 1 | n/a |
*-----------------------
* RMII | n/a | 1 |
* clkgen| | |
*-----------------------
* RMII | n/a | 0 |
* phyclk| | |
*-----------------------
* RGMII | 1 | n/a |
* clkgen| | |
*-----------------------
*/
#define STID127_RETIME_SRC_MASK GENMASK(7, 6)
#define STID127_ETH_SEL_INTERNAL_NOTEXT_PHYCLK BIT(7)
#define STID127_ETH_SEL_INTERNAL_NOTEXT_TXCLK BIT(6)
#define ENMII_MASK GENMASK(5, 5) #define ENMII_MASK GENMASK(5, 5)
#define ENMII BIT(5) #define ENMII BIT(5)
#define EN_MASK GENMASK(1, 1) #define EN_MASK GENMASK(1, 1)
...@@ -194,36 +173,6 @@ static void stih4xx_fix_retime_src(void *priv, u32 spd) ...@@ -194,36 +173,6 @@ static void stih4xx_fix_retime_src(void *priv, u32 spd)
stih4xx_tx_retime_val[src]); stih4xx_tx_retime_val[src]);
} }
static void stid127_fix_retime_src(void *priv, u32 spd)
{
struct sti_dwmac *dwmac = priv;
u32 reg = dwmac->ctrl_reg;
u32 freq = 0;
u32 val = 0;
if (dwmac->interface == PHY_INTERFACE_MODE_MII) {
val = STID127_ETH_SEL_INTERNAL_NOTEXT_TXCLK;
} else if (dwmac->interface == PHY_INTERFACE_MODE_RMII) {
if (!dwmac->ext_phyclk) {
val = STID127_ETH_SEL_INTERNAL_NOTEXT_PHYCLK;
freq = DWMAC_50MHZ;
}
} else if (IS_PHY_IF_MODE_RGMII(dwmac->interface)) {
val = STID127_ETH_SEL_INTERNAL_NOTEXT_TXCLK;
if (spd == SPEED_1000)
freq = DWMAC_125MHZ;
else if (spd == SPEED_100)
freq = DWMAC_25MHZ;
else if (spd == SPEED_10)
freq = DWMAC_2_5MHZ;
}
if (freq)
clk_set_rate(dwmac->clk, freq);
regmap_update_bits(dwmac->regmap, reg, STID127_RETIME_SRC_MASK, val);
}
static int sti_dwmac_set_mode(struct sti_dwmac *dwmac) static int sti_dwmac_set_mode(struct sti_dwmac *dwmac)
{ {
struct regmap *regmap = dwmac->regmap; struct regmap *regmap = dwmac->regmap;
...@@ -408,14 +357,7 @@ static const struct sti_dwmac_of_data stih4xx_dwmac_data = { ...@@ -408,14 +357,7 @@ static const struct sti_dwmac_of_data stih4xx_dwmac_data = {
.fix_retime_src = stih4xx_fix_retime_src, .fix_retime_src = stih4xx_fix_retime_src,
}; };
static const struct sti_dwmac_of_data stid127_dwmac_data = {
.fix_retime_src = stid127_fix_retime_src,
};
static const struct of_device_id sti_dwmac_match[] = { static const struct of_device_id sti_dwmac_match[] = {
{ .compatible = "st,stih415-dwmac", .data = &stih4xx_dwmac_data},
{ .compatible = "st,stih416-dwmac", .data = &stih4xx_dwmac_data},
{ .compatible = "st,stid127-dwmac", .data = &stid127_dwmac_data},
{ .compatible = "st,stih407-dwmac", .data = &stih4xx_dwmac_data}, { .compatible = "st,stih407-dwmac", .data = &stih4xx_dwmac_data},
{ } { }
}; };
......
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