Commit 15711ba6 authored by Johnny Huang's avatar Johnny Huang Committed by Linus Walleij

pinctrl: aspeed-g6: Add AST2600 pinconf support

The AST2600 pinconf is a little different from previous generations of
ASPEED BMC SoCs in terms of architecture. The pull-down setting is
per-pin setting now, and drive-strength support 4 kind of value (e.g.
4ma, 8ma, 12ma, 16ma).
Signed-off-by: default avatarJohnny Huang <johnny_huang@aspeedtech.com>
[AJ: Trim unused pinctrl register macros]
Signed-off-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20191202061432.3996-8-andrew@aj.id.auSigned-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 5f52c853
This diff is collapsed.
......@@ -41,6 +41,13 @@ struct aspeed_pin_config {
.mask = BIT_MASK(bit_) \
}
#define ASPEED_PULL_DOWN_PINCONF(pin_, reg_, bit_) \
ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, pin_, pin_, reg_, bit_), \
ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, pin_, pin_, reg_, bit_)
#define ASPEED_PULL_UP_PINCONF(pin_, reg_, bit_) \
ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_UP, pin_, pin_, reg_, bit_), \
ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, pin_, pin_, reg_, bit_)
/*
* Aspeed pin configuration description.
*
......
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