Commit 15966a2a authored by Andrew Lunn's avatar Andrew Lunn Committed by David S. Miller

net: dsa: Converting remaining registers to mnemonics

Use defines for registers, shifts and bits in the remaining register
accesses in the individual drivers, in order to aid readability.
Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent dbde9e66
...@@ -54,7 +54,9 @@ static char *mv88e6123_61_65_probe(struct device *host_dev, int sw_addr) ...@@ -54,7 +54,9 @@ static char *mv88e6123_61_65_probe(struct device *host_dev, int sw_addr)
static int mv88e6123_61_65_setup_global(struct dsa_switch *ds) static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)
{ {
u32 upstream_port = dsa_upstream_port(ds);
int ret; int ret;
u32 reg;
ret = mv88e6xxx_setup_global(ds); ret = mv88e6xxx_setup_global(ds);
if (ret) if (ret)
...@@ -64,18 +66,21 @@ static int mv88e6123_61_65_setup_global(struct dsa_switch *ds) ...@@ -64,18 +66,21 @@ static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)
* external PHYs to poll), don't discard packets with * external PHYs to poll), don't discard packets with
* excessive collisions, and mask all interrupt sources. * excessive collisions, and mask all interrupt sources.
*/ */
REG_WRITE(REG_GLOBAL, 0x04, 0x0000); REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, 0x0000);
/* Configure the upstream port, and configure the upstream /* Configure the upstream port, and configure the upstream
* port as the port to which ingress and egress monitor frames * port as the port to which ingress and egress monitor frames
* are to be sent. * are to be sent.
*/ */
REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1110)); reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
/* Disable remote management for now, and set the switch's /* Disable remote management for now, and set the switch's
* DSA device number. * DSA device number.
*/ */
REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f); REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds->index & 0x1f);
return 0; return 0;
} }
......
...@@ -44,7 +44,9 @@ static char *mv88e6131_probe(struct device *host_dev, int sw_addr) ...@@ -44,7 +44,9 @@ static char *mv88e6131_probe(struct device *host_dev, int sw_addr)
static int mv88e6131_setup_global(struct dsa_switch *ds) static int mv88e6131_setup_global(struct dsa_switch *ds)
{ {
u32 upstream_port = dsa_upstream_port(ds);
int ret; int ret;
u32 reg;
ret = mv88e6xxx_setup_global(ds); ret = mv88e6xxx_setup_global(ds);
if (ret) if (ret)
...@@ -55,30 +57,42 @@ static int mv88e6131_setup_global(struct dsa_switch *ds) ...@@ -55,30 +57,42 @@ static int mv88e6131_setup_global(struct dsa_switch *ds)
* to arbitrate between packet queues, set the maximum frame * to arbitrate between packet queues, set the maximum frame
* size to 1632, and mask all interrupt sources. * size to 1632, and mask all interrupt sources.
*/ */
REG_WRITE(REG_GLOBAL, 0x04, 0x4400); REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_MAX_FRAME_1632);
/* Set the VLAN ethertype to 0x8100. */ /* Set the VLAN ethertype to 0x8100. */
REG_WRITE(REG_GLOBAL, 0x19, 0x8100); REG_WRITE(REG_GLOBAL, GLOBAL_CORE_TAG_TYPE, 0x8100);
/* Disable ARP mirroring, and configure the upstream port as /* Disable ARP mirroring, and configure the upstream port as
* the port to which ingress and egress monitor frames are to * the port to which ingress and egress monitor frames are to
* be sent. * be sent.
*/ */
REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1100) | 0x00f0); reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
GLOBAL_MONITOR_CONTROL_ARP_DISABLED;
REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
/* Disable cascade port functionality unless this device /* Disable cascade port functionality unless this device
* is used in a cascade configuration, and set the switch's * is used in a cascade configuration, and set the switch's
* DSA device number. * DSA device number.
*/ */
if (ds->dst->pd->nr_chips > 1) if (ds->dst->pd->nr_chips > 1)
REG_WRITE(REG_GLOBAL, 0x1c, 0xf000 | (ds->index & 0x1f)); REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2,
GLOBAL_CONTROL_2_MULTIPLE_CASCADE |
(ds->index & 0x1f));
else else
REG_WRITE(REG_GLOBAL, 0x1c, 0xe000 | (ds->index & 0x1f)); REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2,
GLOBAL_CONTROL_2_NO_CASCADE |
(ds->index & 0x1f));
/* Force the priority of IGMP/MLD snoop frames and ARP frames /* Force the priority of IGMP/MLD snoop frames and ARP frames
* to the highest setting. * to the highest setting.
*/ */
REG_WRITE(REG_GLOBAL2, 0x0f, 0x00ff); REG_WRITE(REG_GLOBAL2, GLOBAL2_PRIO_OVERRIDE,
GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP |
7 << GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT |
GLOBAL2_PRIO_OVERRIDE_FORCE_ARP |
7 << GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT);
return 0; return 0;
} }
......
...@@ -38,6 +38,7 @@ static char *mv88e6171_probe(struct device *host_dev, int sw_addr) ...@@ -38,6 +38,7 @@ static char *mv88e6171_probe(struct device *host_dev, int sw_addr)
static int mv88e6171_setup_global(struct dsa_switch *ds) static int mv88e6171_setup_global(struct dsa_switch *ds)
{ {
u32 upstream_port = dsa_upstream_port(ds);
int ret; int ret;
ret = mv88e6xxx_setup_global(ds); ret = mv88e6xxx_setup_global(ds);
...@@ -47,21 +48,36 @@ static int mv88e6171_setup_global(struct dsa_switch *ds) ...@@ -47,21 +48,36 @@ static int mv88e6171_setup_global(struct dsa_switch *ds)
/* Discard packets with excessive collisions, mask all /* Discard packets with excessive collisions, mask all
* interrupt sources, enable PPU. * interrupt sources, enable PPU.
*/ */
REG_WRITE(REG_GLOBAL, 0x04, 0x6000); REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);
/* Configure the upstream port, and configure the upstream /* Configure the upstream port, and configure the upstream
* port as the port to which ingress and egress monitor frames * port as the port to which ingress and egress monitor frames
* are to be sent. * are to be sent.
*/ */
if (REG_READ(REG_PORT(0), 0x03) == 0x1710) if (REG_READ(REG_PORT(0), PORT_SWITCH_ID) == PORT_SWITCH_ID_6171)
REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1111)); REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL,
upstream_port <<
GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
upstream_port <<
GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
upstream_port <<
GLOBAL_MONITOR_CONTROL_ARP_SHIFT |
upstream_port <<
GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT);
else else
REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1110)); REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL,
upstream_port <<
GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
upstream_port <<
GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
upstream_port <<
GLOBAL_MONITOR_CONTROL_ARP_SHIFT);
/* Disable remote management for now, and set the switch's /* Disable remote management for now, and set the switch's
* DSA device number. * DSA device number.
*/ */
REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f); REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds->index & 0x1f);
return 0; return 0;
} }
......
...@@ -47,7 +47,9 @@ static char *mv88e6352_probe(struct device *host_dev, int sw_addr) ...@@ -47,7 +47,9 @@ static char *mv88e6352_probe(struct device *host_dev, int sw_addr)
static int mv88e6352_setup_global(struct dsa_switch *ds) static int mv88e6352_setup_global(struct dsa_switch *ds)
{ {
u32 upstream_port = dsa_upstream_port(ds);
int ret; int ret;
u32 reg;
ret = mv88e6xxx_setup_global(ds); ret = mv88e6xxx_setup_global(ds);
if (ret) if (ret)
...@@ -56,13 +58,17 @@ static int mv88e6352_setup_global(struct dsa_switch *ds) ...@@ -56,13 +58,17 @@ static int mv88e6352_setup_global(struct dsa_switch *ds)
/* Discard packets with excessive collisions, /* Discard packets with excessive collisions,
* mask all interrupt sources, enable PPU (bit 14, undocumented). * mask all interrupt sources, enable PPU (bit 14, undocumented).
*/ */
REG_WRITE(REG_GLOBAL, 0x04, 0x6000); REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);
/* Configure the upstream port, and configure the upstream /* Configure the upstream port, and configure the upstream
* port as the port to which ingress and egress monitor frames * port as the port to which ingress and egress monitor frames
* are to be sent. * are to be sent.
*/ */
REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1110)); reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
/* Disable remote management for now, and set the switch's /* Disable remote management for now, and set the switch's
* DSA device number. * DSA device number.
......
...@@ -216,7 +216,15 @@ ...@@ -216,7 +216,15 @@
#define GLOBAL_IEEE_PRI 0x18 #define GLOBAL_IEEE_PRI 0x18
#define GLOBAL_CORE_TAG_TYPE 0x19 #define GLOBAL_CORE_TAG_TYPE 0x19
#define GLOBAL_MONITOR_CONTROL 0x1a #define GLOBAL_MONITOR_CONTROL 0x1a
#define GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT 12
#define GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT 8
#define GLOBAL_MONITOR_CONTROL_ARP_SHIFT 4
#define GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT 0
#define GLOBAL_MONITOR_CONTROL_ARP_DISABLED (0xf0)
#define GLOBAL_CONTROL_2 0x1c #define GLOBAL_CONTROL_2 0x1c
#define GLOBAL_CONTROL_2_NO_CASCADE 0xe000
#define GLOBAL_CONTROL_2_MULTIPLE_CASCADE 0xf000
#define GLOBAL_STATS_OP 0x1d #define GLOBAL_STATS_OP 0x1d
#define GLOBAL_STATS_OP_BUSY BIT(15) #define GLOBAL_STATS_OP_BUSY BIT(15)
#define GLOBAL_STATS_OP_NOP (0 << 12) #define GLOBAL_STATS_OP_NOP (0 << 12)
...@@ -259,6 +267,10 @@ ...@@ -259,6 +267,10 @@
#define GLOBAL2_SWITCH_MAC_BUSY BIT(15) #define GLOBAL2_SWITCH_MAC_BUSY BIT(15)
#define GLOBAL2_ATU_STATS 0x0e #define GLOBAL2_ATU_STATS 0x0e
#define GLOBAL2_PRIO_OVERRIDE 0x0f #define GLOBAL2_PRIO_OVERRIDE 0x0f
#define GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP BIT(7)
#define GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT 4
#define GLOBAL2_PRIO_OVERRIDE_FORCE_ARP BIT(3)
#define GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT 0
#define GLOBAL2_EEPROM_OP 0x14 #define GLOBAL2_EEPROM_OP 0x14
#define GLOBAL2_EEPROM_OP_BUSY BIT(15) #define GLOBAL2_EEPROM_OP_BUSY BIT(15)
#define GLOBAL2_EEPROM_OP_LOAD BIT(11) #define GLOBAL2_EEPROM_OP_LOAD BIT(11)
......
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