Commit 1663682c authored by Peter Rosin's avatar Peter Rosin Committed by Linus Walleij

pinctrl: sx150x: use correct registers for reg_sense (sx1502 and sx1508)

All other registers on these chips are 8-bit, but reg_sense is 16-bits
and therefore needs to be moved down one notch.
This was apparently overlooked in the conversion to regmap, which only
updated the register locations for the 16-bit chips.

Fixes: 6489677f ("pinctrl-sx150x: Replace sx150x_*_cfg by means of regmap API")
Signed-off-by: default avatarPeter Rosin <peda@axentia.se>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 8f5983ad
...@@ -156,7 +156,7 @@ static const struct sx150x_device_data sx1508q_device_data = { ...@@ -156,7 +156,7 @@ static const struct sx150x_device_data sx1508q_device_data = {
.reg_data = 0x08, .reg_data = 0x08,
.reg_irq_mask = 0x09, .reg_irq_mask = 0x09,
.reg_irq_src = 0x0c, .reg_irq_src = 0x0c,
.reg_sense = 0x0b, .reg_sense = 0x0a,
.pri.x789 = { .pri.x789 = {
.reg_drain = 0x05, .reg_drain = 0x05,
.reg_polarity = 0x06, .reg_polarity = 0x06,
...@@ -221,7 +221,7 @@ static const struct sx150x_device_data sx1502q_device_data = { ...@@ -221,7 +221,7 @@ static const struct sx150x_device_data sx1502q_device_data = {
.reg_data = 0x00, .reg_data = 0x00,
.reg_irq_mask = 0x05, .reg_irq_mask = 0x05,
.reg_irq_src = 0x08, .reg_irq_src = 0x08,
.reg_sense = 0x07, .reg_sense = 0x06,
.pri.x123 = { .pri.x123 = {
.reg_pld_mode = 0x10, .reg_pld_mode = 0x10,
.reg_pld_table0 = 0x11, .reg_pld_table0 = 0x11,
......
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