Commit 16dfe72f authored by Ulrich Hecht's avatar Ulrich Hecht Committed by Mauro Carvalho Chehab

[media] media: adv7180: increase delay after reset to 5ms

Initialization of the ADV7180 chip fails on the Renesas R8A7790-based
Lager board about 50% of the time.  This patch resolves the issue by
increasing the minimum delay after reset from 2 ms to 5 ms, following the
recommendation in the ADV7180 datasheet:

"Executing a software reset takes approximately 2 ms. However, it is
recommended to wait 5 ms before any further I2C writes are performed."
Signed-off-by: default avatarUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: default avatarLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@osg.samsung.com>
parent 588afcc1
......@@ -1112,7 +1112,7 @@ static int init_device(struct adv7180_state *state)
mutex_lock(&state->mutex);
adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES);
usleep_range(2000, 10000);
usleep_range(5000, 10000);
ret = state->chip_info->init(state);
if (ret)
......
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