Commit 17212e71 authored by Mark Brown's avatar Mark Brown

Merge existing fixes from asoc/for-5.8

parents b3a9e3b9 4036d05c
......@@ -161,4 +161,15 @@ int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream,
#define SND_DMAENGINE_PCM_DRV_NAME "snd_dmaengine_pcm"
struct dmaengine_pcm {
struct dma_chan *chan[SNDRV_PCM_STREAM_LAST + 1];
const struct snd_dmaengine_pcm_config *config;
struct snd_soc_component component;
unsigned int flags;
};
static inline struct dmaengine_pcm *soc_component_to_pcm(struct snd_soc_component *p)
{
return container_of(p, struct dmaengine_pcm, component);
}
#endif
......@@ -444,6 +444,8 @@ int devm_snd_soc_register_component(struct device *dev,
const struct snd_soc_component_driver *component_driver,
struct snd_soc_dai_driver *dai_drv, int num_dai);
void snd_soc_unregister_component(struct device *dev);
struct snd_soc_component *snd_soc_lookup_component_nolocked(struct device *dev,
const char *driver_name);
struct snd_soc_component *snd_soc_lookup_component(struct device *dev,
const char *driver_name);
......@@ -1361,6 +1363,10 @@ void snd_soc_remove_pcm_runtime(struct snd_soc_card *card,
struct snd_soc_dai *snd_soc_register_dai(struct snd_soc_component *component,
struct snd_soc_dai_driver *dai_drv,
bool legacy_dai_naming);
struct snd_soc_dai *devm_snd_soc_register_dai(struct device *dev,
struct snd_soc_component *component,
struct snd_soc_dai_driver *dai_drv,
bool legacy_dai_naming);
void snd_soc_unregister_dai(struct snd_soc_dai *dai);
struct snd_soc_dai *snd_soc_find_dai(
......
......@@ -700,8 +700,8 @@ static bool max98390_readable_register(struct device *dev, unsigned int reg)
case MAX98390_IRQ_CTRL ... MAX98390_WDOG_CTRL:
case MAX98390_MEAS_ADC_THERM_WARN_THRESH
... MAX98390_BROWNOUT_INFINITE_HOLD:
case MAX98390_BROWNOUT_LVL_HOLD ... THERMAL_COILTEMP_RD_BACK_BYTE0:
case DSMIG_DEBUZZER_THRESHOLD ... MAX98390_R24FF_REV_ID:
case MAX98390_BROWNOUT_LVL_HOLD ... DSMIG_DEBUZZER_THRESHOLD:
case DSM_VOL_ENA ... MAX98390_R24FF_REV_ID:
return true;
default:
return false;
......@@ -717,7 +717,7 @@ static bool max98390_volatile_reg(struct device *dev, unsigned int reg)
case MAX98390_BROWNOUT_LOWEST_STATUS:
case MAX98390_ENV_TRACK_BOOST_VOUT_READ:
case DSM_STBASS_HPF_B0_BYTE0 ... DSM_DEBUZZER_ATTACK_TIME_BYTE2:
case THERMAL_RDC_RD_BACK_BYTE1 ... THERMAL_COILTEMP_RD_BACK_BYTE0:
case THERMAL_RDC_RD_BACK_BYTE1 ... DSMIG_DEBUZZER_THRESHOLD:
case DSM_THERMAL_GAIN ... DSM_WBDRC_GAIN:
return true;
default:
......
......@@ -34,30 +34,32 @@ static const struct reg_default rt1015_reg[] = {
{ 0x0000, 0x0000 },
{ 0x0004, 0xa000 },
{ 0x0006, 0x0003 },
{ 0x000a, 0x0802 },
{ 0x000c, 0x0020 },
{ 0x000a, 0x081e },
{ 0x000c, 0x0006 },
{ 0x000e, 0x0000 },
{ 0x0010, 0x0000 },
{ 0x0012, 0x0000 },
{ 0x0014, 0x0000 },
{ 0x0016, 0x0000 },
{ 0x0018, 0x0000 },
{ 0x0020, 0x8000 },
{ 0x0022, 0x471b },
{ 0x006a, 0x0000 },
{ 0x006c, 0x4020 },
{ 0x0022, 0x8043 },
{ 0x0076, 0x0000 },
{ 0x0078, 0x0000 },
{ 0x007a, 0x0000 },
{ 0x007a, 0x0002 },
{ 0x007c, 0x10ec },
{ 0x007d, 0x1015 },
{ 0x00f0, 0x5000 },
{ 0x00f2, 0x0774 },
{ 0x00f3, 0x8400 },
{ 0x00f2, 0x004c },
{ 0x00f3, 0xecfe },
{ 0x00f4, 0x0000 },
{ 0x00f6, 0x0400 },
{ 0x0100, 0x0028 },
{ 0x0102, 0xff02 },
{ 0x0104, 0x8232 },
{ 0x0104, 0xa213 },
{ 0x0106, 0x200c },
{ 0x010c, 0x002f },
{ 0x010e, 0xc000 },
{ 0x010c, 0x0000 },
{ 0x010e, 0x0058 },
{ 0x0111, 0x0200 },
{ 0x0112, 0x0400 },
{ 0x0114, 0x0022 },
......@@ -65,38 +67,46 @@ static const struct reg_default rt1015_reg[] = {
{ 0x0118, 0x0000 },
{ 0x011a, 0x0123 },
{ 0x011c, 0x4567 },
{ 0x0300, 0xdddd },
{ 0x0302, 0x0000 },
{ 0x0311, 0x9330 },
{ 0x0313, 0x0000 },
{ 0x0314, 0x0000 },
{ 0x0300, 0x203d },
{ 0x0302, 0x001e },
{ 0x0311, 0x0000 },
{ 0x0313, 0x6014 },
{ 0x0314, 0x00a2 },
{ 0x031a, 0x00a0 },
{ 0x031c, 0x001f },
{ 0x031d, 0xffff },
{ 0x031e, 0x0000 },
{ 0x031f, 0x0000 },
{ 0x0320, 0x0000 },
{ 0x0321, 0x0000 },
{ 0x0322, 0x0000 },
{ 0x0328, 0x0000 },
{ 0x0329, 0x0000 },
{ 0x032a, 0x0000 },
{ 0x032b, 0x0000 },
{ 0x032c, 0x0000 },
{ 0x032d, 0x0000 },
{ 0x032e, 0x030e },
{ 0x0330, 0x0080 },
{ 0x0322, 0xd7df },
{ 0x0328, 0x10b2 },
{ 0x0329, 0x0175 },
{ 0x032a, 0x36ad },
{ 0x032b, 0x7e55 },
{ 0x032c, 0x0520 },
{ 0x032d, 0xaa00 },
{ 0x032e, 0x570e },
{ 0x0330, 0xe180 },
{ 0x0332, 0x0034 },
{ 0x0334, 0x0000 },
{ 0x0336, 0x0000 },
{ 0x0334, 0x0001 },
{ 0x0336, 0x0010 },
{ 0x0338, 0x0000 },
{ 0x04fa, 0x0030 },
{ 0x04fc, 0x35c8 },
{ 0x04fe, 0x0800 },
{ 0x0500, 0x0400 },
{ 0x0502, 0x1000 },
{ 0x0504, 0x0000 },
{ 0x0506, 0x04ff },
{ 0x0508, 0x0030 },
{ 0x050a, 0x0018 },
{ 0x0519, 0x307f },
{ 0x051a, 0xffff },
{ 0x051b, 0x4000 },
{ 0x0508, 0x0010 },
{ 0x050a, 0x001a },
{ 0x0519, 0x1c68 },
{ 0x051a, 0x0ccc },
{ 0x051b, 0x0666 },
{ 0x051d, 0x0000 },
{ 0x051f, 0x0000 },
{ 0x0536, 0x1000 },
{ 0x0536, 0x061c },
{ 0x0538, 0x0000 },
{ 0x053a, 0x0000 },
{ 0x053c, 0x0000 },
......@@ -110,19 +120,18 @@ static const struct reg_default rt1015_reg[] = {
{ 0x0544, 0x0000 },
{ 0x0568, 0x0000 },
{ 0x056a, 0x0000 },
{ 0x1000, 0x0000 },
{ 0x1002, 0x6505 },
{ 0x1000, 0x0040 },
{ 0x1002, 0x5405 },
{ 0x1006, 0x5515 },
{ 0x1007, 0x003f },
{ 0x1009, 0x770f },
{ 0x100a, 0x01ff },
{ 0x100c, 0x0000 },
{ 0x1007, 0x05f7 },
{ 0x1009, 0x0b0a },
{ 0x100a, 0x00ef },
{ 0x100d, 0x0003 },
{ 0x1010, 0xa433 },
{ 0x1020, 0x0000 },
{ 0x1200, 0x3d02 },
{ 0x1202, 0x0813 },
{ 0x1204, 0x0211 },
{ 0x1200, 0x5a01 },
{ 0x1202, 0x6524 },
{ 0x1204, 0x1f00 },
{ 0x1206, 0x0000 },
{ 0x1208, 0x0000 },
{ 0x120a, 0x0000 },
......@@ -130,16 +139,16 @@ static const struct reg_default rt1015_reg[] = {
{ 0x120e, 0x0000 },
{ 0x1210, 0x0000 },
{ 0x1212, 0x0000 },
{ 0x1300, 0x0701 },
{ 0x1302, 0x12f9 },
{ 0x1304, 0x3405 },
{ 0x1300, 0x10a1 },
{ 0x1302, 0x12ff },
{ 0x1304, 0x0400 },
{ 0x1305, 0x0844 },
{ 0x1306, 0x1611 },
{ 0x1306, 0x4611 },
{ 0x1308, 0x555e },
{ 0x130a, 0x0000 },
{ 0x130c, 0x2400},
{ 0x130e, 0x7700 },
{ 0x130f, 0x0000 },
{ 0x130c, 0x2000 },
{ 0x130e, 0x0100 },
{ 0x130f, 0x0001 },
{ 0x1310, 0x0000 },
{ 0x1312, 0x0000 },
{ 0x1314, 0x0000 },
......@@ -209,6 +218,9 @@ static bool rt1015_volatile_register(struct device *dev, unsigned int reg)
case RT1015_DC_CALIB_CLSD7:
case RT1015_DC_CALIB_CLSD8:
case RT1015_S_BST_TIMING_INTER1:
case RT1015_OSCK_STA:
case RT1015_MONO_DYNA_CTRL1:
case RT1015_MONO_DYNA_CTRL5:
return true;
default:
......@@ -224,6 +236,12 @@ static bool rt1015_readable_register(struct device *dev, unsigned int reg)
case RT1015_CLK3:
case RT1015_PLL1:
case RT1015_PLL2:
case RT1015_DUM_RW1:
case RT1015_DUM_RW2:
case RT1015_DUM_RW3:
case RT1015_DUM_RW4:
case RT1015_DUM_RW5:
case RT1015_DUM_RW6:
case RT1015_CLK_DET:
case RT1015_SIL_DET:
case RT1015_CUSTOMER_ID:
......@@ -235,6 +253,7 @@ static bool rt1015_readable_register(struct device *dev, unsigned int reg)
case RT1015_PAD_DRV2:
case RT1015_GAT_BOOST:
case RT1015_PRO_ALT:
case RT1015_OSCK_STA:
case RT1015_MAN_I2C:
case RT1015_DAC1:
case RT1015_DAC2:
......@@ -272,6 +291,13 @@ static bool rt1015_readable_register(struct device *dev, unsigned int reg)
case RT1015_SMART_BST_CTRL2:
case RT1015_ANA_CTRL1:
case RT1015_ANA_CTRL2:
case RT1015_PWR_STATE_CTRL:
case RT1015_MONO_DYNA_CTRL:
case RT1015_MONO_DYNA_CTRL1:
case RT1015_MONO_DYNA_CTRL2:
case RT1015_MONO_DYNA_CTRL3:
case RT1015_MONO_DYNA_CTRL4:
case RT1015_MONO_DYNA_CTRL5:
case RT1015_SPK_VOL:
case RT1015_SHORT_DETTOP1:
case RT1015_SHORT_DETTOP2:
......
......@@ -21,6 +21,12 @@
#define RT1015_CLK3 0x0006
#define RT1015_PLL1 0x000a
#define RT1015_PLL2 0x000c
#define RT1015_DUM_RW1 0x000e
#define RT1015_DUM_RW2 0x0010
#define RT1015_DUM_RW3 0x0012
#define RT1015_DUM_RW4 0x0014
#define RT1015_DUM_RW5 0x0016
#define RT1015_DUM_RW6 0x0018
#define RT1015_CLK_DET 0x0020
#define RT1015_SIL_DET 0x0022
#define RT1015_CUSTOMER_ID 0x0076
......@@ -32,6 +38,7 @@
#define RT1015_PAD_DRV2 0x00f2
#define RT1015_GAT_BOOST 0x00f3
#define RT1015_PRO_ALT 0x00f4
#define RT1015_OSCK_STA 0x00f6
#define RT1015_MAN_I2C 0x0100
#define RT1015_DAC1 0x0102
#define RT1015_DAC2 0x0104
......@@ -70,7 +77,13 @@
#define RT1015_ANA_CTRL1 0x0334
#define RT1015_ANA_CTRL2 0x0336
#define RT1015_PWR_STATE_CTRL 0x0338
#define RT1015_SPK_VOL 0x0506
#define RT1015_MONO_DYNA_CTRL 0x04fa
#define RT1015_MONO_DYNA_CTRL1 0x04fc
#define RT1015_MONO_DYNA_CTRL2 0x04fe
#define RT1015_MONO_DYNA_CTRL3 0x0500
#define RT1015_MONO_DYNA_CTRL4 0x0502
#define RT1015_MONO_DYNA_CTRL5 0x0504
#define RT1015_SPK_VOL 0x0506
#define RT1015_SHORT_DETTOP1 0x0508
#define RT1015_SHORT_DETTOP2 0x050a
#define RT1015_SPK_DC_DETECT1 0x0519
......
......@@ -2829,12 +2829,13 @@ static int rt5682_probe(struct snd_soc_component *component)
return ret;
}
rt5682->mclk = NULL;
} else {
/* Register CCF DAI clock control */
ret = rt5682_register_dai_clks(component);
if (ret)
return ret;
}
/* Register CCF DAI clock control */
ret = rt5682_register_dai_clks(component);
if (ret)
return ret;
/* Initial setup for CCF */
rt5682->lrck[RT5682_AIF1] = CLK_48;
#endif
......
......@@ -32,6 +32,7 @@ enum asrc_pair_index {
* @dma_chan: inputer and output DMA channels
* @dma_data: private dma data
* @pos: hardware pointer position
* @req_dma_chan: flag to release dev_to_dev chan
* @private: pair private area
*/
struct fsl_asrc_pair {
......@@ -45,6 +46,7 @@ struct fsl_asrc_pair {
struct dma_chan *dma_chan[2];
struct imx_dma_data dma_data;
unsigned int pos;
bool req_dma_chan;
void *private;
};
......
......@@ -135,6 +135,8 @@ static int fsl_asrc_dma_hw_params(struct snd_soc_component *component,
struct snd_dmaengine_dai_dma_data *dma_params_be = NULL;
struct snd_pcm_runtime *runtime = substream->runtime;
struct fsl_asrc_pair *pair = runtime->private_data;
struct dma_chan *tmp_chan = NULL, *be_chan = NULL;
struct snd_soc_component *component_be = NULL;
struct fsl_asrc *asrc = pair->asrc;
struct dma_slave_config config_fe, config_be;
enum asrc_pair_index index = pair->index;
......@@ -142,7 +144,6 @@ static int fsl_asrc_dma_hw_params(struct snd_soc_component *component,
int stream = substream->stream;
struct imx_dma_data *tmp_data;
struct snd_soc_dpcm *dpcm;
struct dma_chan *tmp_chan;
struct device *dev_be;
u8 dir = tx ? OUT : IN;
dma_cap_mask_t mask;
......@@ -197,18 +198,30 @@ static int fsl_asrc_dma_hw_params(struct snd_soc_component *component,
dma_cap_set(DMA_SLAVE, mask);
dma_cap_set(DMA_CYCLIC, mask);
/*
* The Back-End device might have already requested a DMA channel,
* so try to reuse it first, and then request a new one upon NULL.
*/
component_be = snd_soc_lookup_component_nolocked(dev_be, SND_DMAENGINE_PCM_DRV_NAME);
if (component_be) {
be_chan = soc_component_to_pcm(component_be)->chan[substream->stream];
tmp_chan = be_chan;
}
if (!tmp_chan)
tmp_chan = dma_request_slave_channel(dev_be, tx ? "tx" : "rx");
/*
* An EDMA DEV_TO_DEV channel is fixed and bound with DMA event of each
* peripheral, unlike SDMA channel that is allocated dynamically. So no
* need to configure dma_request and dma_request2, but get dma_chan via
* dma_request_slave_channel directly with dma name of Front-End device
* need to configure dma_request and dma_request2, but get dma_chan of
* Back-End device directly via dma_request_slave_channel.
*/
if (!asrc->use_edma) {
/* Get DMA request of Back-End */
tmp_chan = dma_request_slave_channel(dev_be, tx ? "tx" : "rx");
tmp_data = tmp_chan->private;
pair->dma_data.dma_request = tmp_data->dma_request;
dma_release_channel(tmp_chan);
if (!be_chan)
dma_release_channel(tmp_chan);
/* Get DMA request of Front-End */
tmp_chan = asrc->get_dma_channel(pair, dir);
......@@ -220,9 +233,11 @@ static int fsl_asrc_dma_hw_params(struct snd_soc_component *component,
pair->dma_chan[dir] =
dma_request_channel(mask, filter, &pair->dma_data);
pair->req_dma_chan = true;
} else {
pair->dma_chan[dir] =
asrc->get_dma_channel(pair, dir);
pair->dma_chan[dir] = tmp_chan;
/* Do not flag to release if we are reusing the Back-End one */
pair->req_dma_chan = !be_chan;
}
if (!pair->dma_chan[dir]) {
......@@ -261,7 +276,8 @@ static int fsl_asrc_dma_hw_params(struct snd_soc_component *component,
ret = dmaengine_slave_config(pair->dma_chan[dir], &config_be);
if (ret) {
dev_err(dev, "failed to config DMA channel for Back-End\n");
dma_release_channel(pair->dma_chan[dir]);
if (pair->req_dma_chan)
dma_release_channel(pair->dma_chan[dir]);
return ret;
}
......@@ -273,19 +289,22 @@ static int fsl_asrc_dma_hw_params(struct snd_soc_component *component,
static int fsl_asrc_dma_hw_free(struct snd_soc_component *component,
struct snd_pcm_substream *substream)
{
bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
struct snd_pcm_runtime *runtime = substream->runtime;
struct fsl_asrc_pair *pair = runtime->private_data;
u8 dir = tx ? OUT : IN;
snd_pcm_set_runtime_buffer(substream, NULL);
if (pair->dma_chan[IN])
dma_release_channel(pair->dma_chan[IN]);
if (pair->dma_chan[!dir])
dma_release_channel(pair->dma_chan[!dir]);
if (pair->dma_chan[OUT])
dma_release_channel(pair->dma_chan[OUT]);
/* release dev_to_dev chan if we aren't reusing the Back-End one */
if (pair->dma_chan[dir] && pair->req_dma_chan)
dma_release_channel(pair->dma_chan[dir]);
pair->dma_chan[IN] = NULL;
pair->dma_chan[OUT] = NULL;
pair->dma_chan[!dir] = NULL;
pair->dma_chan[dir] = NULL;
return 0;
}
......
......@@ -4,6 +4,7 @@
#include <linux/module.h>
#include "common.h"
#include "qdsp6/q6afe.h"
int qcom_snd_parse_of(struct snd_soc_card *card)
{
......@@ -101,6 +102,15 @@ int qcom_snd_parse_of(struct snd_soc_card *card)
}
link->no_pcm = 1;
link->ignore_pmdown_time = 1;
if (q6afe_is_rx_port(link->id)) {
link->dpcm_playback = 1;
link->dpcm_capture = 0;
} else {
link->dpcm_playback = 0;
link->dpcm_capture = 1;
}
} else {
dlc = devm_kzalloc(dev, sizeof(*dlc), GFP_KERNEL);
if (!dlc)
......@@ -113,12 +123,12 @@ int qcom_snd_parse_of(struct snd_soc_card *card)
link->codecs->dai_name = "snd-soc-dummy-dai";
link->codecs->name = "snd-soc-dummy";
link->dynamic = 1;
link->dpcm_playback = 1;
link->dpcm_capture = 1;
}
link->ignore_suspend = 1;
link->nonatomic = 1;
link->dpcm_playback = 1;
link->dpcm_capture = 1;
link->stream_name = link->name;
link++;
......
......@@ -800,6 +800,14 @@ int q6afe_get_port_id(int index)
}
EXPORT_SYMBOL_GPL(q6afe_get_port_id);
int q6afe_is_rx_port(int index)
{
if (index < 0 || index >= AFE_PORT_MAX)
return -EINVAL;
return port_maps[index].is_rx;
}
EXPORT_SYMBOL_GPL(q6afe_is_rx_port);
static int afe_apr_send_pkt(struct q6afe *afe, struct apr_pkt *pkt,
struct q6afe_port *port)
{
......
......@@ -198,6 +198,7 @@ int q6afe_port_start(struct q6afe_port *port);
int q6afe_port_stop(struct q6afe_port *port);
void q6afe_port_put(struct q6afe_port *port);
int q6afe_get_port_id(int index);
int q6afe_is_rx_port(int index);
void q6afe_hdmi_port_prepare(struct q6afe_port *port,
struct q6afe_hdmi_cfg *cfg);
void q6afe_slim_port_prepare(struct q6afe_port *port,
......
......@@ -25,6 +25,7 @@
#define ASM_STREAM_CMD_FLUSH 0x00010BCE
#define ASM_SESSION_CMD_PAUSE 0x00010BD3
#define ASM_DATA_CMD_EOS 0x00010BDB
#define ASM_DATA_EVENT_RENDERED_EOS 0x00010C1C
#define ASM_NULL_POPP_TOPOLOGY 0x00010C68
#define ASM_STREAM_CMD_FLUSH_READBUFS 0x00010C09
#define ASM_STREAM_CMD_SET_ENCDEC_PARAM 0x00010C10
......@@ -622,9 +623,6 @@ static int32_t q6asm_stream_callback(struct apr_device *adev,
case ASM_SESSION_CMD_SUSPEND:
client_event = ASM_CLIENT_EVENT_CMD_SUSPEND_DONE;
break;
case ASM_DATA_CMD_EOS:
client_event = ASM_CLIENT_EVENT_CMD_EOS_DONE;
break;
case ASM_STREAM_CMD_FLUSH:
client_event = ASM_CLIENT_EVENT_CMD_FLUSH_DONE;
break;
......@@ -727,6 +725,9 @@ static int32_t q6asm_stream_callback(struct apr_device *adev,
spin_unlock_irqrestore(&ac->lock, flags);
}
break;
case ASM_DATA_EVENT_RENDERED_EOS:
client_event = ASM_CLIENT_EVENT_CMD_EOS_DONE;
break;
}
......
......@@ -310,7 +310,7 @@ struct snd_soc_component *snd_soc_rtdcom_lookup(struct snd_soc_pcm_runtime *rtd,
}
EXPORT_SYMBOL_GPL(snd_soc_rtdcom_lookup);
static struct snd_soc_component
struct snd_soc_component
*snd_soc_lookup_component_nolocked(struct device *dev, const char *driver_name)
{
struct snd_soc_component *component;
......@@ -329,6 +329,7 @@ static struct snd_soc_component
return found_component;
}
EXPORT_SYMBOL_GPL(snd_soc_lookup_component_nolocked);
struct snd_soc_component *snd_soc_lookup_component(struct device *dev,
const char *driver_name)
......
......@@ -9,6 +9,43 @@
#include <sound/soc.h>
#include <sound/dmaengine_pcm.h>
static void devm_dai_release(struct device *dev, void *res)
{
snd_soc_unregister_dai(*(struct snd_soc_dai **)res);
}
/**
* devm_snd_soc_register_dai - resource-managed dai registration
* @dev: Device used to manage component
* @component: The component the DAIs are registered for
* @dai_drv: DAI driver to use for the DAI
* @legacy_dai_naming: if %true, use legacy single-name format;
* if %false, use multiple-name format;
*/
struct snd_soc_dai *devm_snd_soc_register_dai(struct device *dev,
struct snd_soc_component *component,
struct snd_soc_dai_driver *dai_drv,
bool legacy_dai_naming)
{
struct snd_soc_dai **ptr;
struct snd_soc_dai *dai;
ptr = devres_alloc(devm_dai_release, sizeof(*ptr), GFP_KERNEL);
if (!ptr)
return NULL;
dai = snd_soc_register_dai(component, dai_drv, legacy_dai_naming);
if (dai) {
*ptr = dai;
devres_add(dev, ptr);
} else {
devres_free(ptr);
}
return dai;
}
EXPORT_SYMBOL_GPL(devm_snd_soc_register_dai);
static void devm_component_release(struct device *dev, void *res)
{
snd_soc_unregister_component(*(struct device **)res);
......
......@@ -21,18 +21,6 @@
*/
#define SND_DMAENGINE_PCM_FLAG_NO_RESIDUE BIT(31)
struct dmaengine_pcm {
struct dma_chan *chan[SNDRV_PCM_STREAM_LAST + 1];
const struct snd_dmaengine_pcm_config *config;
struct snd_soc_component component;
unsigned int flags;
};
static struct dmaengine_pcm *soc_component_to_pcm(struct snd_soc_component *p)
{
return container_of(p, struct dmaengine_pcm, component);
}
static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm,
struct snd_pcm_substream *substream)
{
......
......@@ -2630,15 +2630,15 @@ static int soc_dpcm_fe_runtime_update(struct snd_soc_pcm_runtime *fe, int new)
int count, paths;
int ret;
if (!fe->dai_link->dynamic)
return 0;
if (fe->num_cpus > 1) {
dev_err(fe->dev,
"%s doesn't support Multi CPU yet\n", __func__);
return -EINVAL;
}
if (!fe->dai_link->dynamic)
return 0;
/* only check active links */
if (!snd_soc_dai_active(asoc_rtd_to_cpu(fe, 0)))
return 0;
......
......@@ -1851,7 +1851,7 @@ static int soc_tplg_dai_create(struct soc_tplg *tplg,
list_add(&dai_drv->dobj.list, &tplg->comp->dobj_list);
/* register the DAI to the component */
dai = snd_soc_register_dai(tplg->comp, dai_drv, false);
dai = devm_snd_soc_register_dai(tplg->comp->dev, tplg->comp, dai_drv, false);
if (!dai)
return -ENOMEM;
......@@ -1859,7 +1859,6 @@ static int soc_tplg_dai_create(struct soc_tplg *tplg,
ret = snd_soc_dapm_new_dai_widgets(dapm, dai);
if (ret != 0) {
dev_err(dai->dev, "Failed to create DAI widgets %d\n", ret);
snd_soc_unregister_dai(dai);
return ret;
}
......
......@@ -653,11 +653,16 @@ irqreturn_t hda_dsp_stream_threaded_handler(int irq, void *context)
if (status & AZX_INT_CTRL_EN) {
rirb_status = snd_hdac_chip_readb(bus, RIRBSTS);
if (rirb_status & RIRB_INT_MASK) {
/*
* Clearing the interrupt status here ensures
* that no interrupt gets masked after the RIRB
* wp is read in snd_hdac_bus_update_rirb.
*/
snd_hdac_chip_writeb(bus, RIRBSTS,
RIRB_INT_MASK);
active = true;
if (rirb_status & RIRB_INT_RESPONSE)
snd_hdac_bus_update_rirb(bus);
snd_hdac_chip_writeb(bus, RIRBSTS,
RIRB_INT_MASK);
}
}
#endif
......
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