Commit 1790b649 authored by Eric Huang's avatar Eric Huang Committed by Alex Deucher

drm/amdkfd: enable heavy-weight TLB flush on Vega20

It is to meet the requirement for memory allocation
optimization on MI50.
Signed-off-by: default avatarEric Huang <jinhuieric.huang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 039cacd2
...@@ -1419,7 +1419,8 @@ static int kfd_ioctl_free_memory_of_gpu(struct file *filep, ...@@ -1419,7 +1419,8 @@ static int kfd_ioctl_free_memory_of_gpu(struct file *filep,
static bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev) { static bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev) {
return KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2) || return KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2) ||
(KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) && (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) &&
dev->adev->sdma.instance[0].fw_version >= 18); dev->adev->sdma.instance[0].fw_version >= 18) ||
KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 0);
} }
static int kfd_ioctl_map_memory_to_gpu(struct file *filep, static int kfd_ioctl_map_memory_to_gpu(struct file *filep,
......
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