Commit 17b96cc3 authored by Ben Skeggs's avatar Ben Skeggs

drm/nv50: output calculated crtc pll when debugging on

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 4c389f00
...@@ -279,6 +279,9 @@ nv50_crtc_set_clock(struct drm_device *dev, int head, int pclk) ...@@ -279,6 +279,9 @@ nv50_crtc_set_clock(struct drm_device *dev, int head, int pclk)
return ret; return ret;
if (limits.vco2.maxfreq) { if (limits.vco2.maxfreq) {
NV_DEBUG(dev, "pclk %d out %d NM1 %d %d NM2 %d %d P %d\n",
pclk, ret, pll.N1, pll.M1, pll.N2, pll.M2, pll.log2P);
reg1 = nv_rd32(dev, pll_reg + 4) & 0xff00ff00; reg1 = nv_rd32(dev, pll_reg + 4) & 0xff00ff00;
reg2 = nv_rd32(dev, pll_reg + 8) & 0x8000ff00; reg2 = nv_rd32(dev, pll_reg + 8) & 0x8000ff00;
nv_wr32(dev, pll_reg, 0x10000611); nv_wr32(dev, pll_reg, 0x10000611);
...@@ -286,6 +289,9 @@ nv50_crtc_set_clock(struct drm_device *dev, int head, int pclk) ...@@ -286,6 +289,9 @@ nv50_crtc_set_clock(struct drm_device *dev, int head, int pclk)
nv_wr32(dev, pll_reg + 8, nv_wr32(dev, pll_reg + 8,
reg2 | (pll.log2P << 28) | (pll.M2 << 16) | pll.N2); reg2 | (pll.log2P << 28) | (pll.M2 << 16) | pll.N2);
} else { } else {
NV_DEBUG(dev, "pclk %d out %d NM %d %d P %d\n",
pclk, ret, pll.N1, pll.M1, pll.log2P);
reg1 = nv_rd32(dev, pll_reg + 4) & 0xffc00000; reg1 = nv_rd32(dev, pll_reg + 4) & 0xffc00000;
nv_wr32(dev, pll_reg, 0x50000610); nv_wr32(dev, pll_reg, 0x50000610);
nv_wr32(dev, pll_reg + 4, reg1 | nv_wr32(dev, pll_reg + 4, reg1 |
......
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