Commit 1864b670 authored by Axel Lin's avatar Axel Lin Committed by Mark Brown

regulator: tps62360: Fix off-by-one shift for ramp_ctrl

According to the datasheet[1]

Register 0x06h Description: RmpCtrl (REGISTER ADDRESS: 0x06h Read/Write)
BIT[5..7]:
        RMP[2:0] Output voltage ramp timing
        D7-D5   Slope
        000     32mV/us
        001     16mV/us
        010     8mV/us
        ...
        110     0.5mV/us
        111     0.25mV/us

Thus to get correct ramp_ctrl value, we need to right-shift 5 bits.

[1] http://www.ti.com/lit/ds/symlink/tps62360.pdfSigned-off-by: default avatarAxel Lin <axel.lin@ingics.com>
Acked-by: default avatarLaxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 60d509fa
......@@ -278,7 +278,7 @@ static int tps62360_init_dcdc(struct tps62360_chip *tps,
__func__, REG_RAMPCTRL, ret);
return ret;
}
ramp_ctrl = (ramp_ctrl >> 4) & 0x7;
ramp_ctrl = (ramp_ctrl >> 5) & 0x7;
/* ramp mV/us = 32/(2^ramp_ctrl) */
tps->desc.ramp_delay = DIV_ROUND_UP(32000, BIT(ramp_ctrl));
......
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