Commit 190747f7 authored by Maxime Coquelin's avatar Maxime Coquelin Committed by Jiri Slaby

regmap: Fix possible shift overflow in regmap_field_init()

commit 921cc294 upstream.

The way the mask is generated in regmap_field_init() is wrong.
Indeed, a field initialized with msb = 31 and lsb = 0 provokes a shift
overflow while calculating the mask field.

On some 32 bits architectures, such as x86, the generated mask is 0,
instead of the expected 0xffffffff.

This patch uses GENMASK() to fix the problem, as this macro is already safe
regarding shift overflow.

[-js: in 3.12, we do not have GENMASK for general access. Define
locally as RM_GENMASK.]
Signed-off-by: default avatarMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
parent c28cdee6
...@@ -813,14 +813,16 @@ struct regmap *devm_regmap_init(struct device *dev, ...@@ -813,14 +813,16 @@ struct regmap *devm_regmap_init(struct device *dev,
} }
EXPORT_SYMBOL_GPL(devm_regmap_init); EXPORT_SYMBOL_GPL(devm_regmap_init);
#define RM_GENMASK(h, l) \
(((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
static void regmap_field_init(struct regmap_field *rm_field, static void regmap_field_init(struct regmap_field *rm_field,
struct regmap *regmap, struct reg_field reg_field) struct regmap *regmap, struct reg_field reg_field)
{ {
int field_bits = reg_field.msb - reg_field.lsb + 1;
rm_field->regmap = regmap; rm_field->regmap = regmap;
rm_field->reg = reg_field.reg; rm_field->reg = reg_field.reg;
rm_field->shift = reg_field.lsb; rm_field->shift = reg_field.lsb;
rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb); rm_field->mask = RM_GENMASK(reg_field.msb, reg_field.lsb);
} }
/** /**
......
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