Commit 19353881 authored by Peter Chen's avatar Peter Chen Committed by Greg Kroah-Hartman

usb: chipidea: enhance kernel-doc format

Some kernel-doc style comment are not satisfied for format, fix them.
Signed-off-by: default avatarPeter Chen <peter.chen@freescale.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 27c62c2d
...@@ -99,10 +99,10 @@ enum ci_role { ...@@ -99,10 +99,10 @@ enum ci_role {
/** /**
* struct ci_role_driver - host/gadget role driver * struct ci_role_driver - host/gadget role driver
* start: start this role * @start: start this role
* stop: stop this role * @stop: stop this role
* irq: irq handler for this role * @irq: irq handler for this role
* name: role name string (host/gadget) * @name: role name string (host/gadget)
*/ */
struct ci_role_driver { struct ci_role_driver {
int (*start)(struct ci_hdrc *); int (*start)(struct ci_hdrc *);
...@@ -245,6 +245,7 @@ static inline void ci_role_stop(struct ci_hdrc *ci) ...@@ -245,6 +245,7 @@ static inline void ci_role_stop(struct ci_hdrc *ci)
/** /**
* hw_read: reads from a hw register * hw_read: reads from a hw register
* @ci: the controller
* @reg: register index * @reg: register index
* @mask: bitfield mask * @mask: bitfield mask
* *
...@@ -277,6 +278,7 @@ static inline void __hw_write(struct ci_hdrc *ci, u32 val, ...@@ -277,6 +278,7 @@ static inline void __hw_write(struct ci_hdrc *ci, u32 val,
/** /**
* hw_write: writes to a hw register * hw_write: writes to a hw register
* @ci: the controller
* @reg: register index * @reg: register index
* @mask: bitfield mask * @mask: bitfield mask
* @data: new value * @data: new value
...@@ -293,6 +295,7 @@ static inline void hw_write(struct ci_hdrc *ci, enum ci_hw_regs reg, ...@@ -293,6 +295,7 @@ static inline void hw_write(struct ci_hdrc *ci, enum ci_hw_regs reg,
/** /**
* hw_test_and_clear: tests & clears a hw register * hw_test_and_clear: tests & clears a hw register
* @ci: the controller
* @reg: register index * @reg: register index
* @mask: bitfield mask * @mask: bitfield mask
* *
...@@ -309,6 +312,7 @@ static inline u32 hw_test_and_clear(struct ci_hdrc *ci, enum ci_hw_regs reg, ...@@ -309,6 +312,7 @@ static inline u32 hw_test_and_clear(struct ci_hdrc *ci, enum ci_hw_regs reg,
/** /**
* hw_test_and_write: tests & writes a hw register * hw_test_and_write: tests & writes a hw register
* @ci: the controller
* @reg: register index * @reg: register index
* @mask: bitfield mask * @mask: bitfield mask
* @data: new value * @data: new value
...@@ -327,6 +331,8 @@ static inline u32 hw_test_and_write(struct ci_hdrc *ci, enum ci_hw_regs reg, ...@@ -327,6 +331,8 @@ static inline u32 hw_test_and_write(struct ci_hdrc *ci, enum ci_hw_regs reg,
/** /**
* ci_otg_is_fsm_mode: runtime check if otg controller * ci_otg_is_fsm_mode: runtime check if otg controller
* is in otg fsm mode. * is in otg fsm mode.
*
* @ci: chipidea device
*/ */
static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci) static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci)
{ {
......
...@@ -139,6 +139,8 @@ static int hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm) ...@@ -139,6 +139,8 @@ static int hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm)
/** /**
* hw_read_intr_enable: returns interrupt enable register * hw_read_intr_enable: returns interrupt enable register
* *
* @ci: the controller
*
* This function returns register data * This function returns register data
*/ */
u32 hw_read_intr_enable(struct ci_hdrc *ci) u32 hw_read_intr_enable(struct ci_hdrc *ci)
...@@ -149,6 +151,8 @@ u32 hw_read_intr_enable(struct ci_hdrc *ci) ...@@ -149,6 +151,8 @@ u32 hw_read_intr_enable(struct ci_hdrc *ci)
/** /**
* hw_read_intr_status: returns interrupt status register * hw_read_intr_status: returns interrupt status register
* *
* @ci: the controller
*
* This function returns register data * This function returns register data
*/ */
u32 hw_read_intr_status(struct ci_hdrc *ci) u32 hw_read_intr_status(struct ci_hdrc *ci)
...@@ -176,6 +180,8 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode) ...@@ -176,6 +180,8 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode)
/** /**
* hw_port_test_get: reads port test mode value * hw_port_test_get: reads port test mode value
* *
* @ci: the controller
*
* This function returns port test mode value * This function returns port test mode value
*/ */
u8 hw_port_test_get(struct ci_hdrc *ci) u8 hw_port_test_get(struct ci_hdrc *ci)
...@@ -295,7 +301,7 @@ static void hw_phymode_configure(struct ci_hdrc *ci) ...@@ -295,7 +301,7 @@ static void hw_phymode_configure(struct ci_hdrc *ci)
/** /**
* ci_usb_phy_init: initialize phy according to different phy type * ci_usb_phy_init: initialize phy according to different phy type
* @ci: the controller * @ci: the controller
* *
* This function returns an error code if usb_phy_init has failed * This function returns an error code if usb_phy_init has failed
*/ */
static int ci_usb_phy_init(struct ci_hdrc *ci) static int ci_usb_phy_init(struct ci_hdrc *ci)
......
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