Commit 19565ea1 authored by Peng Fan's avatar Peng Fan Committed by Abel Vesa

clk: imx: add mcore_booted module paratemter

Add mcore_booted boot parameter which could simplify AMP clock
management. To i.MX8M, there is CCM(clock control Module) to generate
clock root clock, anatop(analog PLL module) to generate PLL, and CCGR
(clock gating) to gate clocks to peripherals. As below:
  anatop->ccm->ccgr->peripheral

Linux handles the clock management and the auxiliary core is under
control of Linux. Although there is per hardware domain control for CCGR
and CCM, auxiliary core normally only use CCGR hardware domain control
to avoid linux gate off the clk to peripherals and leave CCM ana anatop
to Linux.

Per NXP hardware design, because CCGR already support gate to
peripherals, and clk root gate power leakage is negligible. So
when in AMP case, we could not register the clk root gate.
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Reviewed-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220228124112.3974242-1-peng.fan@oss.nxp.comSigned-off-by: default avatarAbel Vesa <abel.vesa@nxp.com>
parent cdc86e47
......@@ -639,6 +639,8 @@ static struct platform_driver imx8mm_clk_driver = {
},
};
module_platform_driver(imx8mm_clk_driver);
module_param(mcore_booted, bool, S_IRUGO);
MODULE_PARM_DESC(mcore_booted, "See Cortex-M core is booted or not");
MODULE_AUTHOR("Bai Ping <ping.bai@nxp.com>");
MODULE_DESCRIPTION("NXP i.MX8MM clock driver");
......
......@@ -594,6 +594,8 @@ static struct platform_driver imx8mn_clk_driver = {
},
};
module_platform_driver(imx8mn_clk_driver);
module_param(mcore_booted, bool, S_IRUGO);
MODULE_PARM_DESC(mcore_booted, "See Cortex-M core is booted or not");
MODULE_AUTHOR("Anson Huang <Anson.Huang@nxp.com>");
MODULE_DESCRIPTION("NXP i.MX8MN clock driver");
......
......@@ -721,6 +721,8 @@ static struct platform_driver imx8mp_clk_driver = {
},
};
module_platform_driver(imx8mp_clk_driver);
module_param(mcore_booted, bool, S_IRUGO);
MODULE_PARM_DESC(mcore_booted, "See Cortex-M core is booted or not");
MODULE_AUTHOR("Anson Huang <Anson.Huang@nxp.com>");
MODULE_DESCRIPTION("NXP i.MX8MP clock driver");
......
......@@ -632,6 +632,8 @@ static struct platform_driver imx8mq_clk_driver = {
},
};
module_platform_driver(imx8mq_clk_driver);
module_param(mcore_booted, bool, S_IRUGO);
MODULE_PARM_DESC(mcore_booted, "See Cortex-M core is booted or not");
MODULE_AUTHOR("Abel Vesa <abel.vesa@nxp.com>");
MODULE_DESCRIPTION("NXP i.MX8MQ clock driver");
......
......@@ -17,6 +17,9 @@
DEFINE_SPINLOCK(imx_ccm_lock);
EXPORT_SYMBOL_GPL(imx_ccm_lock);
bool mcore_booted;
EXPORT_SYMBOL_GPL(mcore_booted);
void imx_unregister_clocks(struct clk *clks[], unsigned int count)
{
unsigned int i;
......
......@@ -7,6 +7,7 @@
#include <linux/clk-provider.h>
extern spinlock_t imx_ccm_lock;
extern bool mcore_booted;
void imx_check_clocks(struct clk *clks[], unsigned int count);
void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count);
......
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