Skip to content

L
linux
Commit 19e36308 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt
Browse files
Options

Merge kernel.crashing.org:/home/benh/kernels/linux-2.5 

into kernel.crashing.org:/home/benh/kernels/for-linus-ppc
parents 06cdb4a9 125a6aad
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 4955 additions and 68 deletions
arch/ppc/Kconfig
View file @ 19e36308
......@@ -66,6 +66,9 @@ config 6xx
config 40x
bool "40x"
config 44x
bool "44x"
config POWER3
bool "POWER3"
......@@ -74,6 +77,11 @@ config 8xx
endchoice
config PTE_64BIT
bool
depends on 44x
default y
source arch/ppc/platforms/4xx/Kconfig
config 8260
......@@ -766,8 +774,8 @@ config MCA
RS/6000 machines are currently not supported by Linux.
config PCI
bool "PCI support" if 4xx || 8260
default y if !4xx && !8260 && !8xx && !APUS
bool "PCI support" if 40x || 8260
default y if !40x && !8260 && !8xx && !APUS
default PCI_PERMEDIA if !4xx && !8260 && !8xx && APUS
default PCI_QSPAN if !4xx && !8260 && 8xx
help
......@@ -1143,6 +1151,7 @@ config BOOT_LOAD_BOOL
config BOOT_LOAD
hex "Link/load address for booting" if BOOT_LOAD_BOOL
default "0x00400000" if 40x || 8xx || 8260
default "0x01000000" if 44x
default "0x00800000"
config PIN_TLB
......
arch/ppc/Makefile
View file @ 19e36308
......@@ -29,7 +29,7 @@ CFLAGS += $(cflags-y)
head-y := arch/ppc/kernel/head.o
head-$(CONFIG_8xx) := arch/ppc/kernel/head_8xx.o
head-$(CONFIG_4xx) := arch/ppc/kernel/head_4xx.o
head-$(CONFIG_440) := arch/ppc/kernel/head_44x.o
head-$(CONFIG_44x) := arch/ppc/kernel/head_44x.o
head-$(CONFIG_6xx) += arch/ppc/kernel/idle_6xx.o
......
arch/ppc/boot/simple/Makefile
View file @ 19e36308
......@@ -48,11 +48,16 @@ zimageinitrd-$(CONFIG_IBM_OPENBIOS) := zImage.initrd-TREE
zimage-$(CONFIG_EBONY) := zImage-TREE
zimageinitrd-$(CONFIG_EBONY) := zImage.initrd-TREE
extra.o-$(CONFIG_EBONY) := direct.o
end-$(CONFIG_EBONY) := ebony
entrypoint-$(CONFIG_EBONY) := 0x01000000
tftpimage-$(CONFIG_EBONY) := /tftpboot/zImage.$(end-y)
zimage-$(CONFIG_OCOTEA) := zImage-TREE
zimageinitrd-$(CONFIG_OCOTEA) := zImage.initrd-TREE
end-$(CONFIG_OCOTEA) := ocotea
entrypoint-$(CONFIG_OCOTEA) := 0x01000000
tftpimage-$(CONFIG_OCOTEA) := /tftpboot/zImage.$(end-y)
extra.o-$(CONFIG_EV64260) := direct.o misc-ev64260.o
tftpimage-$(CONFIG_EV64260) := /tftpboot/zImage.ev64260
......
arch/ppc/boot/simple/misc.c
View file @ 19e36308
......@@ -25,6 +25,9 @@
#include <asm/processor.h>
#include <asm/mmu.h>
#include <asm/bootinfo.h>
#ifdef CONFIG_44x
#include <asm/ibm4xx.h>
#endif
#include "nonstdio.h"
#include "zlib.h"
......@@ -80,6 +83,16 @@ decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum)
serial_fixups();
com_port = serial_init(0, NULL);
#ifdef CONFIG_44x
/* Reset MAL */
mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR);
/* Wait for reset */
while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {};
/* Reset EMAC */
*(volatile unsigned long *)PPC44x_EMAC0_MR0 = 0x20000000;
__asm__ __volatile__("eieio");
#endif
#if defined(CONFIG_LOPEC) || defined(CONFIG_PAL4)
/*
* Call get_mem_size(), which is memory controller dependent,
......
arch/ppc/configs/ebony_defconfig 0 → 100644
View file @ 19e36308
#
# Automatically generated make config: don't edit
#
CONFIG_MMU=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_HAVE_DEC_LOCK=y
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_IKCONFIG is not set
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODULE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y
#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_40x is not set
CONFIG_44x=y
# CONFIG_POWER3 is not set
# CONFIG_8xx is not set
CONFIG_PTE_64BIT=y
CONFIG_4xx=y
#
# IBM 4xx options
#
CONFIG_EBONY=y
# CONFIG_OCOTEA is not set
CONFIG_440GP=y
CONFIG_440=y
CONFIG_PIN_TLB=y
CONFIG_BOOKE=y
CONFIG_IBM_OCP=y
# CONFIG_PM is not set
CONFIG_NOT_COHERENT_CACHE=y
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_MATH_EMULATION is not set
# CONFIG_CPU_FREQ is not set
#
# General setup
#
# CONFIG_HIGHMEM is not set
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PC_KEYBOARD is not set
CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_PCI_LEGACY_PROC is not set
# CONFIG_PCI_NAMES is not set
# CONFIG_HOTPLUG is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="ip=on"
#
# Advanced setup
#
# CONFIG_ADVANCED_OPTIONS is not set
#
# Default settings for advanced configuration options are used
#
CONFIG_HIGHMEM_START=0xfe000000
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_KERNEL_START=0xc0000000
CONFIG_TASK_SIZE=0x80000000
CONFIG_BOOT_LOAD=0x01000000
#
# Generic Driver Options
#
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_LBD=y
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Fusion MPT device support
#
#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
#
# IP: Virtual Server Configuration
#
# CONFIG_IP_VS is not set
# CONFIG_IPV6 is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
#
# IP: Netfilter Configuration
#
# CONFIG_IP_NF_CONNTRACK is not set
# CONFIG_IP_NF_QUEUE is not set
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# Ethernet (10 or 100Mbit)
#
# CONFIG_NET_ETHERNET is not set
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SIS190 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_IXGB is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Token Ring devices (depends on LLC=y)
#
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Macintosh device drivers
#
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
# CONFIG_SERIAL_8250_DETECT_IRQ is not set
# CONFIG_SERIAL_8250_MULTIPORT is not set
# CONFIG_SERIAL_8250_RSA is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
# CONFIG_DEVPTS_FS_XATTR is not set
# CONFIG_TMPFS is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB is not set
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
#
# Library routines
#
CONFIG_CRC32=y
#
# Kernel hacking
#
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SLAB is not set
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
CONFIG_BDI_SWITCH=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_SERIAL_TEXT_DEBUG is not set
CONFIG_OCP=y
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
arch/ppc/configs/ocotea_defconfig 0 → 100644
View file @ 19e36308
This diff is collapsed.
arch/ppc/kernel/Makefile
View file @ 19e36308
......@@ -12,6 +12,7 @@ endif
# Start off with 'head.o', change as needed.
extra-y := head.o
extra-$(CONFIG_40x) := head_4xx.o
extra-$(CONFIG_44x) := head_44x.o
extra-$(CONFIG_8xx) := head_8xx.o
extra-$(CONFIG_6xx) += idle_6xx.o
extra-y += vmlinux.lds.s
......
arch/ppc/kernel/cputable.c
View file @ 19e36308
......@@ -433,7 +433,7 @@ struct cpu_spec cpu_specs[] = {
},
#endif /* CONFIG_40x */
#ifdef CONFIG_440
#ifdef CONFIG_44x
{ /* 440GP Rev. B */
0xf0000fff, 0x40000440, "440GP Rev. B",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
......@@ -448,7 +448,14 @@ struct cpu_spec cpu_specs[] = {
32, 32,
0, /*__setup_cpu_440 */
},
#endif /* CONFIG_440 */
{ /* 440GX Rev. A */
0xf0000fff, 0x50000850, "440GX Rev. A",
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
32, 32,
0, /*__setup_cpu_440 */
},
#endif /* CONFIG_44x */
#if !CLASSIC_PPC
{ /* default match */
0x00000000, 0x00000000, "(generic PPC)",
......
arch/ppc/kernel/head_44x.S 0 → 100644
View file @ 19e36308
This diff is collapsed.
arch/ppc/kernel/misc.S
View file @ 19e36308
......@@ -405,16 +405,20 @@ _GLOBAL(_tlbia)
sync /* Flush to memory before changing mapping */
tlbia
isync /* Flush shadow TLB */
#elif defined(CONFIG_440)
#elif defined(CONFIG_44x)
lis r3,0
sync
1:
tlbwe r3,r3,PPC440_TLB_PAGEID
tlbwe r3,r3,PPC44x_TLB_PAGEID
addi r3,r3,1
cmpwi 0,r3,61
/* Load high watermark */
lis r4,tlb_44x_hwater@h
ori r4,r4,tlb_44x_hwater@l
lwz r5,0(r4)
cmpw 0,r3,r5
ble 1b
isync
#else /* !(CONFIG_40x || CONFIG_440) */
#else /* !(CONFIG_40x || CONFIG_44x) */
#if defined(CONFIG_SMP)
rlwinm r8,r1,0,0,18
lwz r8,TI_CPU(r8)
......@@ -465,17 +469,17 @@ _GLOBAL(_tlbie)
tlbwe r3, r3, TLB_TAG
isync
10:
#elif defined(CONFIG_440)
#elif defined(CONFIG_44x)
mfspr r4,SPRN_MMUCR /* Get MMUCR */
lis r5,PPC440_MMUCR_STS@h
ori r5,r5,PPC440_MMUCR_TID@l /* Create mask */
lis r5,PPC44x_MMUCR_STS@h
ori r5,r5,PPC44x_MMUCR_TID@l /* Create mask */
andc r4,r4,r5 /* Clear out TID/STS bits */
mfspr r5,SPRN_PID /* Get PID */
or r4,r4,r5 /* Set TID bits */
mfmsr r6 /* Get MSR */
andi. r6,r6,MSR_IS@l /* TS=1? */
beq 11f /* If not, leave STS=0 */
oris r4,r4,PPC440_MMUCR_STS@h /* Set STS=1 */
oris r4,r4,PPC44x_MMUCR_STS@h /* Set STS=1 */
11: mtspr SPRN_MMUCR, r4 /* Put MMUCR */
tlbsx. r3, 0, r3
......@@ -486,10 +490,10 @@ _GLOBAL(_tlbie)
* the V bit in the TLB_PAGEID, loading this
* value will invalidate the TLB entry.
*/
tlbwe r3, r3, PPC440_TLB_PAGEID
tlbwe r3, r3, PPC44x_TLB_PAGEID
isync
10:
#else /* !(CONFIG_40x || CONFIG_440) */
#else /* !(CONFIG_40x || CONFIG_44x) */
#if defined(CONFIG_SMP)
rlwinm r8,r1,0,0,18
lwz r8,TI_CPU(r8)
......@@ -658,9 +662,9 @@ _GLOBAL(invalidate_dcache_range)
#ifdef CONFIG_NOT_COHERENT_CACHE
/*
* 40x cores have 8K or 16K dcache and 32 byte line size.
* 440 has a 32K dcache and 32 byte line size.
* 44x has a 32K dcache and 32 byte line size.
* 8xx has 1, 2, 4, 8K variants.
* For now, cover the worst case of the 440.
* For now, cover the worst case of the 44x.
* Must be called with external interrupts disabled.
*/
#define CACHE_NWAYS 64
......
arch/ppc/kernel/ppc_ksyms.c
View file @ 19e36308
......@@ -155,6 +155,9 @@ EXPORT_SYMBOL(_outsl_ns);
EXPORT_SYMBOL(iopa);
EXPORT_SYMBOL(mm_ptov);
EXPORT_SYMBOL(ioremap);
#ifdef CONFIG_44x
EXPORT_SYMBOL(ioremap64);
#endif
EXPORT_SYMBOL(__ioremap);
EXPORT_SYMBOL(iounmap);
EXPORT_SYMBOL(ioremap_bot); /* aka VMALLOC_END */
......@@ -353,7 +356,7 @@ EXPORT_SYMBOL(debugger_fault_handler);
EXPORT_SYMBOL(cpm_install_handler);
EXPORT_SYMBOL(cpm_free_handler);
#endif /* CONFIG_8xx */
#if defined(CONFIG_8xx) || defined(CONFIG_40x)
#if defined(CONFIG_8xx) || defined(CONFIG_4xx)
EXPORT_SYMBOL(__res);
#endif
#if defined(CONFIG_8xx)
......
arch/ppc/mm/44x_mmu.c 0 → 100644
View file @ 19e36308
/*
* Modifications by Matt Porter (mporter@mvista.com) to support
* PPC44x Book E processors.
*
* This file contains the routines for initializing the MMU
* on the 4xx series of chips.
* -- paulus
*
* Derived from arch/ppc/mm/init.c:
* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
*
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
* Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
*/
#include <linux/config.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/ptrace.h>
#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/stddef.h>
#include <linux/vmalloc.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/bootmem.h>
#include <linux/highmem.h>
#include <asm/pgalloc.h>
#include <asm/prom.h>
#include <asm/io.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/uaccess.h>
#include <asm/smp.h>
#include <asm/bootx.h>
#include <asm/machdep.h>
#include <asm/setup.h>
#include "mmu_decl.h"
#include "mem_pieces.h"
extern char etext[], _stext[];
extern struct mem_pieces phys_avail;
/* Used by the 44x TLB replacement exception handler.
* Just needed it declared someplace.
*/
unsigned int tlb_44x_index = 0;
unsigned int tlb_44x_hwater = 61;
/*
* "Pins" a 256MB TLB entry in AS0 for kernel lowmem
*/
static void __init
ppc44x_pin_tlb(int slot, unsigned int virt, unsigned int phys)
{
unsigned long attrib;
__asm__ __volatile__("\
clrrwi %2,%2,10\n\
ori %2,%2,%4\n\
clrrwi %1,%1,10\n\
li %0,0\n\
ori %0,%0,%5\n\
tlbwe %2,%3,%6\n\
tlbwe %1,%3,%7\n\
tlbwe %0,%3,%8"
:
: "r" (attrib), "r" (phys), "r" (virt), "r" (slot),
"i" (PPC44x_TLB_VALID | PPC44x_TLB_PAGESZ(PPC44x_PAGESZ_256M)),
"i" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
"i" (PPC44x_TLB_PAGEID),
"i" (PPC44x_TLB_XLAT),
"i" (PPC44x_TLB_ATTRIB));
}
/*
* Configure PPC44x TLB for AS0 exception processing.
*/
static void __init
ppc44x_tlb_config(void)
{
unsigned int pinned_tlbs = 1;
int i;
/*
* If lowmem is not on a pin tlb entry size boundary,
* then reserve the last page of system memory. This
* eliminates the possibility of a speculative dcache
* fetch past the end of system memory that would
* result in a machine check exception.
*/
if (total_lowmem | (PPC44x_PIN_SIZE - 1))
mem_pieces_remove(&phys_avail, total_lowmem - PAGE_SIZE, PAGE_SIZE, 1);
/* Determine number of entries necessary to cover lowmem */
pinned_tlbs = (unsigned int)
(_ALIGN(total_lowmem, PPC44x_PIN_SIZE) >> PPC44x_PIN_SHIFT);
/* Write upper watermark to save location */
tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs;
/* If necessary, set additional pinned TLBs */
if (pinned_tlbs > 1)
for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) {
unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC44x_PIN_SIZE;
ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr);
}
}
/*
* MMU_init_hw does the chip-specific initialization of the MMU hardware.
*/
void __init MMU_init_hw(void)
{
flush_instruction_cache();
ppc44x_tlb_config();
}
/* TODO: Add large page lowmem mapping support */
unsigned long __init mmu_mapin_ram(void)
{
unsigned long v, s, f = _PAGE_GUARDED;
phys_addr_t p;
v = KERNELBASE;
p = PPC_MEMSTART;
for (s = 0; s < total_lowmem; s += PAGE_SIZE) {
if ((char *) v >= _stext && (char *) v < etext)
f |= _PAGE_RAM_TEXT;
else
f |= _PAGE_RAM;
map_page(v, p, f);
v += PAGE_SIZE;
p += PAGE_SIZE;
}
if (ppc_md.progress)
ppc_md.progress("MMU:mmu_mapin_ram done", 0x401);
return s;
}
arch/ppc/mm/Makefile
View file @ 19e36308
......@@ -11,4 +11,5 @@ obj-y := fault.o init.o mem_pieces.o extable.o \
obj-$(CONFIG_PPC_STD_MMU) += hashtable.o ppc_mmu.o tlb.o
obj-$(CONFIG_40x) += 4xx_mmu.o
obj-$(CONFIG_44x) += 44x_mmu.o
obj-$(CONFIG_NOT_COHERENT_CACHE) += cachemap.o
arch/ppc/mm/cachemap.c
View file @ 19e36308
......@@ -48,7 +48,7 @@
#include <asm/smp.h>
#include <asm/machdep.h>
int map_page(unsigned long va, unsigned long pa, int flags);
int map_page(unsigned long va, phys_addr_t pa, int flags);
/* This function will allocate the requested contiguous pages and
* map them into the kernel's vmalloc() space. This is done so we
......@@ -61,7 +61,8 @@ void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle)
{
int order, err;
struct page *page, *free, *end;
unsigned long pa, flags, offset;
phys_addr_t pa;
unsigned long flags, offset;
struct vm_struct *area = NULL;
unsigned long va = 0;
......
arch/ppc/mm/init.c
View file @ 19e36308
......@@ -6,6 +6,7 @@
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
* Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
* PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
......
arch/ppc/mm/mmu_decl.h
View file @ 19e36308
......@@ -20,9 +20,10 @@
*
*/
#include <asm/tlbflush.h>
#include <asm/mmu.h>
extern void mapin_ram(void);
extern int map_page(unsigned long va, unsigned long pa, int flags);
extern int map_page(unsigned long va, phys_addr_t pa, int flags);
extern void setbat(int index, unsigned long virt, unsigned long phys,
unsigned int size, int flags);
extern void reserve_phys_mem(unsigned long start, unsigned long size);
......
arch/ppc/mm/pgtable.c
View file @ 19e36308
......@@ -55,11 +55,18 @@ void setbat(int index, unsigned long virt, unsigned long phys,
#define p_mapped_by_bats(x) (0UL)
#endif /* HAVE_BATS */
#ifdef CONFIG_44x
/* 44x uses an 8kB pgdir because it has 8-byte Linux PTEs. */
#define PGDIR_ORDER 1
#else
#define PGDIR_ORDER 0
#endif
pgd_t *pgd_alloc(struct mm_struct *mm)
{
pgd_t *ret;
if ((ret = (pgd_t *)__get_free_page(GFP_KERNEL)) != NULL)
if ((ret = (pgd_t *)__get_free_pages(GFP_KERNEL, PGDIR_ORDER)) != NULL)
clear_page(ret);
return ret;
}
......@@ -110,16 +117,33 @@ void pte_free(struct page *pte)
__free_page(pte);
}
#ifndef CONFIG_44x
void *
ioremap(phys_addr_t addr, unsigned long size)
{
return __ioremap(addr, size, _PAGE_NO_CACHE);
}
#else /* CONFIG_44x */
void *
ioremap(unsigned long addr, unsigned long size)
ioremap64(unsigned long long addr, unsigned long size)
{
return __ioremap(addr, size, _PAGE_NO_CACHE);
}
void *
__ioremap(unsigned long addr, unsigned long size, unsigned long flags)
ioremap(phys_addr_t addr, unsigned long size)
{
phys_addr_t addr64 = fixup_bigphys_addr(addr, size);;
return ioremap64(addr64, size);
}
#endif /* CONFIG_44x */
void *
__ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
{
unsigned long p, v, i;
unsigned long v, i;
phys_addr_t p;
int err;
/*
......@@ -144,7 +168,7 @@ __ioremap(unsigned long addr, unsigned long size, unsigned long flags)
*/
if ( mem_init_done && (p < virt_to_phys(high_memory)) )
{
printk("__ioremap(): phys addr %0lx is RAM lr %p\n", p,
printk("__ioremap(): phys addr "PTE_FMT" is RAM lr %p\n", p,
__builtin_return_address(0));
return NULL;
}
......@@ -195,7 +219,7 @@ __ioremap(unsigned long addr, unsigned long size, unsigned long flags)
}
out:
return (void *) (v + (addr & ~PAGE_MASK));
return (void *) (v + ((unsigned long)addr & ~PAGE_MASK));
}
void iounmap(void *addr)
......@@ -211,7 +235,7 @@ void iounmap(void *addr)
}
int
map_page(unsigned long va, unsigned long pa, int flags)
map_page(unsigned long va, phys_addr_t pa, int flags)
{
pmd_t *pd;
pte_t *pg;
......@@ -261,7 +285,7 @@ void __init mapin_ram(void)
* virt, phys, size must all be page-aligned.
* This should only be called before ioremap is called.
*/
void __init io_block_mapping(unsigned long virt, unsigned long phys,
void __init io_block_mapping(unsigned long virt, phys_addr_t phys,
unsigned int size, int flags)
{
int i;
......
arch/ppc/ocp/ocp-probe.c
View file @ 19e36308
......@@ -62,7 +62,6 @@ ocp_setup_dev(struct ocp_def *odef, unsigned int index)
(unsigned long) dev->paddr, dev->irq, dev->pm);
/* now put in global tree */
strcpy(dev->dev.name, dev->name);
sprintf(dev->dev.bus_id, "%d", index);
dev->dev.parent = ocp_bus;
dev->dev.bus = &ocp_bus_type;
......@@ -80,7 +79,7 @@ static struct device * __devinit ocp_alloc_primary_bus(void)
return NULL;
memset(b, 0, sizeof(struct device));
strcpy(b->bus_id, "ocp");
strcpy(b->name, "Host/OCP Bridge");
device_register(b);
return b;
......
arch/ppc/platforms/4xx/Kconfig
View file @ 19e36308
config 4xx
bool
depends on 40x
depends on 40x || 44x
default y
menu "IBM 4xx options"
......@@ -57,6 +57,23 @@ config WALNUT
endchoice
choice
prompt "Machine Type"
depends on 44x
default EBONY
config EBONY
bool "Ebony"
help
This option enables support for the IBM PPC440GP evaluation board.
config OCOTEA
bool "Ocotea"
help
This option enables support for the IBM PPC440GX evaluation board.
endchoice
config EP405PC
bool "EP405PC Support"
depends on EP405
......@@ -70,6 +87,26 @@ config NP405H
depends on ASH
default y
config 440GP
bool
depends on EBONY
default y
config 440GX
bool
depends on OCOTEA
default y
config 440
bool
depends on 440GP
default y
config 440A
bool
depends on 440GX
default y
# All 405-based cores up until the 405GPR and 405EP have this errata.
config IBM405_ERR77
bool
......@@ -82,9 +119,25 @@ config IBM405_ERR51
depends on 40x && !405GPR
default y
config PIN_TLB
bool
depends on 44x
default y
config BOOKE
bool
depends on 44x
default y
config IBM_OCP
bool
depends on ASH || BEECH || CEDAR || CPCI405 || EP405 || REDWOOD_4 || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
depends on ASH || BEECH || CEDAR || CPCI405 || EBONY || EP405 || OCOTEA || REDWOOD_4 || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
default y
config IBM_EMAC4
bool
depends on 440GX
default y
config NP405L
......
arch/ppc/platforms/4xx/Makefile
View file @ 19e36308
......@@ -5,8 +5,10 @@ obj-$(CONFIG_ASH) += ash.o
obj-$(CONFIG_BEECH) += beech.o
obj-$(CONFIG_CEDAR) += cedar.o
obj-$(CONFIG_CPCI405) += cpci405.o
obj-$(CONFIG_EBONY) += ebony.o
obj-$(CONFIG_EP405) += ep405.o
obj-$(CONFIG_OAK) += oak.o
obj-$(CONFIG_OCOTEA) += ocotea.o
obj-$(CONFIG_REDWOOD_4) += redwood.o
obj-$(CONFIG_REDWOOD_5) += redwood5.o
obj-$(CONFIG_REDWOOD_6) += redwood6.o
......@@ -21,4 +23,6 @@ obj-$(CONFIG_NP405H) += ibmnp405h.o
obj-$(CONFIG_REDWOOD_6) += ibmstbx25.o
obj-$(CONFIG_NP4GS3) += ibmnp4gs.o
obj-$(CONFIG_405LP) += ibm405lp.o
obj-$(CONFIG_EBONY) += ibm440gp.o
obj-$(CONFIG_OCOTEA) += ibm440gx.o
obj-$(CONFIG_405GPR) += ibm405gpr.o
arch/ppc/platforms/4xx/ebony.c 0 → 100644
View file @ 19e36308
This diff is collapsed.
arch/ppc/platforms/4xx/ebony.h 0 → 100755
View file @ 19e36308
/*
* arch/ppc/platforms/ebony.h
*
* Ebony board definitions
*
* Matt Porter <mporter@mvista.com>
*
* Copyright 2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifdef __KERNEL__
#ifndef __ASM_EBONY_H__
#define __ASM_EBONY_H__
#include <linux/config.h>
#include <platforms/4xx/ibm440gp.h>
/* F/W TLB mapping used in bootloader glue to reset EMAC */
#define PPC44x_EMAC0_MR0 0xE0000800
/* Macros to get at Ebony VPD info */
#define EBONY_VPD_BASE 0x00000001fffffe00ULL
#define EBONY_VPD_SIZE 0x24
#define EBONY_NA0_OFFSET 0x0c
#define EBONY_NA1_OFFSET 0x18
#define EBONY_NA0_ADDR(base) (base + EBONY_NA0_OFFSET)
#define EBONY_NA1_ADDR(base) (base + EBONY_NA1_OFFSET)
/* Default clock rates for Rev. B and Rev. C silicon */
#define EBONY_440GP_RB_SYSCLK 33000000
#define EBONY_440GP_RC_SYSCLK 400000000
/* RTC/NVRAM location */
#define EBONY_RTC_ADDR 0x0000000148000000ULL
#define EBONY_RTC_SIZE 0x2000
/* Flash */
#define EBONY_FPGA_ADDR 0x0000000148300000
#define EBONY_BOOT_SMALL_FLASH(x) (x & 0x20)
#define EBONY_ONBRD_FLASH_EN(x) (x & 0x02)
#define EBONY_FLASH_SEL(x) (x & 0x01)
#define EBONY_SMALL_FLASH_LOW1 0x00000001ff800000
#define EBONY_SMALL_FLASH_LOW2 0x00000001ff880000
#define EBONY_SMALL_FLASH_HIGH1 0x00000001fff00000
#define EBONY_SMALL_FLASH_HIGH2 0x00000001fff80000
#define EBONY_SMALL_FLASH_SIZE 0x80000
#define EBONY_LARGE_FLASH_LOW 0x00000001ff800000
#define EBONY_LARGE_FLASH_HIGH 0x00000001ffc00000
#define EBONY_LARGE_FLASH_SIZE 0x400000
#define EBONY_SMALL_FLASH_BASE 0x00000001fff80000
#define EBONY_LARGE_FLASH_BASE 0x00000001ff800000
/*
* Serial port defines
*/
/* OpenBIOS defined UART mappings, used before early_serial_setup */
#define UART0_IO_BASE (u8 *) 0xE0000200
#define UART1_IO_BASE (u8 *) 0xE0000300
#define BASE_BAUD 33000000/3/16
#define UART0_INT 0
#define UART1_INT 1
#define STD_UART_OP(num) \
{ 0, BASE_BAUD, 0, UART##num##_INT, \
(ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
iomem_base: UART##num##_IO_BASE, \
io_type: SERIAL_IO_MEM},
#define SERIAL_PORT_DFNS \
STD_UART_OP(0) \
STD_UART_OP(1)
/* PCI support */
#define EBONY_PCI_LOWER_IO 0x00000000
#define EBONY_PCI_UPPER_IO 0x0000ffff
#define EBONY_PCI_LOWER_MEM 0x80002000
#define EBONY_PCI_UPPER_MEM 0xffffefff
#define EBONY_PCI_CFGREGS_BASE 0x000000020ec00000
#define EBONY_PCI_CFGA_PLB32 0x0ec00000
#define EBONY_PCI_CFGD_PLB32 0x0ec00004
#define EBONY_PCI_IO_BASE 0x0000000208000000ULL
#define EBONY_PCI_IO_SIZE 0x00010000
#define EBONY_PCI_MEM_OFFSET 0x00000000
#endif /* __ASM_EBONY_H__ */
#endif /* __KERNEL__ */
arch/ppc/platforms/4xx/ibm440gp.c 0 → 100644
View file @ 19e36308
/*
* arch/ppc/platforms/4xx/ibm440gp.c
*
* PPC440GP I/O descriptions
*
* Matt Porter <mporter@mvista.com>
*
* Copyright 2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <platforms/4xx/ibm440gp.h>
#include <asm/ocp.h>
#include <linux/init.h>
struct ocp_def core_ocp[] __initdata = {
{OCP_VENDOR_IBM, OCP_FUNC_OPB, PPC440GP_OPB_BASE_START, OCP_IRQ_NA, OCP_CPM_NA},
{OCP_VENDOR_IBM, OCP_FUNC_16550, PPC440GP_UART0_ADDR, UART0_INT, IBM_CPM_UART0},
{OCP_VENDOR_IBM, OCP_FUNC_16550, PPC440GP_UART1_ADDR, UART1_INT, IBM_CPM_UART1},
{OCP_VENDOR_IBM, OCP_FUNC_IIC, PPC440GP_IIC0_ADDR, IIC0_IRQ, IBM_CPM_IIC0},
{OCP_VENDOR_IBM, OCP_FUNC_IIC, PPC440GP_IIC1_ADDR, IIC1_IRQ, IBM_CPM_IIC1},
{OCP_VENDOR_IBM, OCP_FUNC_GPIO, PPC440GP_GPIO0_ADDR, OCP_IRQ_NA, IBM_CPM_GPIO0},
{OCP_VENDOR_IBM, OCP_FUNC_EMAC, PPC440GP_EMAC0_ADDR, BL_MAC_ETH0, OCP_CPM_NA},
{OCP_VENDOR_IBM, OCP_FUNC_EMAC, PPC440GP_EMAC1_ADDR, BL_MAC_ETH1, OCP_CPM_NA},
{OCP_VENDOR_IBM, OCP_FUNC_ZMII, PPC440GP_ZMII_ADDR, OCP_IRQ_NA, OCP_CPM_NA},
{OCP_VENDOR_INVALID, OCP_FUNC_INVALID, 0x0, OCP_IRQ_NA, OCP_CPM_NA},
};
arch/ppc/platforms/4xx/ibm440gp.h 0 → 100644
View file @ 19e36308
/*
* arch/ppc/platforms/4xx/ibm440gp.h
*
* PPC440GP definitions
*
* Roland Dreier <roland@digitalvampire.org>
*
* Copyright 2002 Roland Dreier
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* This file contains code that was originally in the files ibm44x.h
* and ebony.h, which were written by Matt Porter of MontaVista Software Inc.
*/
#ifdef __KERNEL__
#ifndef __PPC_PLATFORMS_IBM440GP_H
#define __PPC_PLATFORMS_IBM440GP_H
#include <linux/config.h>
#define EMAC_NUMS 2
#define UART_NUMS 2
#define ZMII_NUMS 1
#define IIC_NUMS 2
#define IIC0_IRQ 2
#define IIC1_IRQ 3
#define GPIO_NUMS 1
/* UART location */
#define PPC440GP_UART0_ADDR 0x0000000140000200ULL
#define PPC440GP_UART1_ADDR 0x0000000140000300ULL
/* EMAC location */
#define PPC440GP_EMAC0_ADDR 0x0000000140000800ULL
#define PPC440GP_EMAC1_ADDR 0x0000000140000900ULL
#define PPC440GP_EMAC_SIZE 0x70
/* EMAC IRQ's */
#define BL_MAC_WOL 61 /* WOL */
#define BL_MAC_WOL1 63 /* WOL */
#define BL_MAL_SERR 32 /* MAL SERR */
#define BL_MAL_TXDE 33 /* MAL TXDE */
#define BL_MAL_RXDE 34 /* MAL RXDE */
#define BL_MAL_TXEOB 10 /* MAL TX EOB */
#define BL_MAL_RXEOB 11 /* MAL RX EOB */
#define BL_MAC_ETH0 60 /* MAC */
#define BL_MAC_ETH1 62 /* MAC */
/* ZMII location */
#define PPC440GP_ZMII_ADDR 0x0000000140000780ULL
#define PPC440GP_ZMII_SIZE 0x0c
/* I2C location */
#define PPC440GP_IIC0_ADDR 0x40000400
#define PPC440GP_IIC1_ADDR 0x40000500
/* GPIO location */
#define PPC440GP_GPIO0_ADDR 0x0000000140000700ULL
/* Clock and Power Management */
#define IBM_CPM_IIC0 0x80000000 /* IIC interface */
#define IBM_CPM_IIC1 0x40000000 /* IIC interface */
#define IBM_CPM_PCI 0x20000000 /* PCI bridge */
#define IBM_CPM_CPU 0x02000000 /* processor core */
#define IBM_CPM_DMA 0x01000000 /* DMA controller */
#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */
#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */
#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */
#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */
#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */
#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */
#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */
#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */
#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */
#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */
#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */
#define IBM_CPM_UART0 0x00000200 /* serial port 0 */
#define IBM_CPM_UART1 0x00000100 /* serial port 1 */
#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */
#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */
#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \
| IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \
| IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \
| IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI)
#define PPC440GP_OPB_BASE_START 0x0000000140000000ULL
/*
* Serial port defines
*/
#define RS_TABLE_SIZE 2
#include <asm/ibm44x.h>
#include <syslib/ibm440gp_common.h>
#endif /* __PPC_PLATFORMS_IBM440GP_H */
#endif /* __KERNEL__ */
arch/ppc/platforms/4xx/ibm440gx.c 0 → 100644
View file @ 19e36308
/*
* arch/ppc/platforms/ibm440gx.c
*
* PPC440GX I/O descriptions
*
* Matt Porter <mporter@mvista.com>
*
* Copyright 2002-2003 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/threads.h>
#include <linux/param.h>
#include <linux/string.h>
#include <asm/ocp.h>
#include <platforms/4xx/ibm440gx.h>
struct ocp_def core_ocp[] __initdata = {
{OCP_VENDOR_IBM, OCP_FUNC_OPB, PPC440GX_OPB_BASE_START, OCP_IRQ_NA, OCP_CPM_NA},
{OCP_VENDOR_IBM, OCP_FUNC_16550, PPC440GX_UART0_ADDR, UART0_IRQ, IBM_CPM_UART0},
{OCP_VENDOR_IBM, OCP_FUNC_16550, PPC440GX_UART1_ADDR, UART1_IRQ, IBM_CPM_UART1},
{OCP_VENDOR_IBM, OCP_FUNC_IIC, PPC440GX_IIC0_ADDR, IIC0_IRQ, IBM_CPM_IIC0},
{OCP_VENDOR_IBM, OCP_FUNC_IIC, PPC440GX_IIC1_ADDR, IIC1_IRQ, IBM_CPM_IIC1},
{OCP_VENDOR_IBM, OCP_FUNC_GPIO, PPC440GX_GPIO0_ADDR, OCP_IRQ_NA, IBM_CPM_GPIO0},
{OCP_VENDOR_IBM, OCP_FUNC_EMAC, PPC440GX_EMAC0_ADDR, BL_MAC_ETH0, OCP_CPM_NA},
{OCP_VENDOR_IBM, OCP_FUNC_EMAC, PPC440GX_EMAC1_ADDR, BL_MAC_ETH1, OCP_CPM_NA},
{OCP_VENDOR_IBM, OCP_FUNC_ZMII, PPC440GX_ZMII_ADDR, OCP_IRQ_NA, OCP_CPM_NA},
{OCP_VENDOR_INVALID, OCP_FUNC_INVALID, 0x0, OCP_IRQ_NA, OCP_CPM_NA},
};
arch/ppc/platforms/4xx/ibm440gx.h 0 → 100644
View file @ 19e36308
/*
* arch/ppc/platforms/ibm440gx.h
*
* PPC440GX definitions
*
* Matt Porter <mporter@mvista.com>
*
* Copyright 2002 Roland Dreier
* Copyright 2003 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifdef __KERNEL__
#ifndef __PPC_PLATFORMS_IBM440GX_H
#define __PPC_PLATFORMS_IBM440GX_H
#include <linux/config.h>
#include <asm/ibm44x.h>
/* UART */
#define PPC440GX_UART0_ADDR 0x0000000140000200ULL
#define PPC440GX_UART1_ADDR 0x0000000140000300ULL
#define UART0_IRQ 0
#define UART1_IRQ 1
/* EMAC */
#define PPC440GX_EMAC0_ADDR 0x0000000140000800ULL
#define PPC440GX_EMAC1_ADDR 0x0000000140000900ULL
#define PPC440GX_EMAC2_ADDR 0x0000000140000C00ULL
#define PPC440GX_EMAC3_ADDR 0x0000000140000E00ULL
#define PPC440GX_EMAC_SIZE 0xFC
#define EMAC_NUMS 2
#define BL_MAC_WOL 61 /* WOL */
#define BL_MAC_WOL1 63 /* WOL */
#define BL_MAC_WOL2 65 /* WOL */
#define BL_MAC_WOL3 67 /* WOL */
#define BL_MAL_SERR 32 /* MAL SERR */
#define BL_MAL_TXDE 33 /* MAL TXDE */
#define BL_MAL_RXDE 34 /* MAL RXDE */
#define BL_MAL_TXEOB 10 /* MAL TX EOB */
#define BL_MAL_RXEOB 11 /* MAL RX EOB */
#define BL_MAC_ETH0 60 /* MAC */
#define BL_MAC_ETH1 62 /* MAC */
#define BL_MAC_ETH2 64 /* MAC */
#define BL_MAC_ETH3 66 /* MAC */
#define BL_TAH0 68 /* TAH 0 */
#define BL_TAH1 69 /* TAH 1 */
/* TAH */
#define PPC440GX_TAH0_ADDR 0x0000000140000B00ULL
#define PPC440GX_TAH1_ADDR 0x0000000140000D00ULL
#define PPC440GX_TAH_SIZE 0xFC
/* ZMII */
#define PPC440GX_ZMII_ADDR 0x0000000140000780ULL
#define PPC440GX_ZMII_SIZE 0x0c
/* RGMII */
#define PPC440GX_RGMII_ADDR 0x0000000140000790ULL
#define PPC440GX_RGMII_SIZE 0x0c
/* IIC */
#define PPC440GX_IIC0_ADDR 0x40000400
#define PPC440GX_IIC1_ADDR 0x40000500
#define IIC0_IRQ 2
#define IIC1_IRQ 3
/* GPIO */
#define PPC440GX_GPIO0_ADDR 0x0000000140000700ULL
/* Clock and Power Management */
#define IBM_CPM_IIC0 0x80000000 /* IIC interface */
#define IBM_CPM_IIC1 0x40000000 /* IIC interface */
#define IBM_CPM_PCI 0x20000000 /* PCI bridge */
#define IBM_CPM_RGMII 0x10000000 /* RGMII */
#define IBM_CPM_TAHOE0 0x08000000 /* TAHOE 0 */
#define IBM_CPM_TAHOE1 0x04000000 /* TAHOE 1 */
#define IBM_CPM_CPU 0x02000000 /* processor core */
#define IBM_CPM_DMA 0x01000000 /* DMA controller */
#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */
#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */
#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */
#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */
#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */
#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */
#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */
#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */
#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */
#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */
#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */
#define IBM_CPM_UART0 0x00000200 /* serial port 0 */
#define IBM_CPM_UART1 0x00000100 /* serial port 1 */
#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */
#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */
#define IBM_CPM_EMAC0 0x00000020 /* EMAC 0 */
#define IBM_CPM_EMAC1 0x00000010 /* EMAC 1 */
#define IBM_CPM_EMAC2 0x00000008 /* EMAC 2 */
#define IBM_CPM_EMAC3 0x00000004 /* EMAC 3 */
#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \
| IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \
| IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \
| IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \
| IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \
| IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \
| IBM_CPM_EMAC2 | IBM_CPM_EMAC3 )
/* OPB */
#define PPC440GX_OPB_BASE_START 0x0000000140000000ULL
/*
* Serial port defines
*/
#define RS_TABLE_SIZE 2
#endif /* __PPC_PLATFORMS_IBM440GX_H */
#endif /* __KERNEL__ */
arch/ppc/platforms/4xx/ocotea.c 0 → 100644
View file @ 19e36308
This diff is collapsed.
arch/ppc/platforms/4xx/ocotea.h 0 → 100644
View file @ 19e36308
/*
* arch/ppc/platforms/ocotea.h
*
* Ocotea board definitions
*
* Matt Porter <mporter@mvista.com>
*
* Copyright 2003 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifdef __KERNEL__
#ifndef __ASM_OCOTEA_H__
#define __ASM_OCOTEA_H__
#include <linux/config.h>
#include <platforms/4xx/ibm440gx.h>
/* F/W TLB mapping used in bootloader glue to reset EMAC */
#define PPC44x_EMAC0_MR0 0xE0000800
/* Location of MAC addresses in firmware */
#define OCOTEA_MAC_BASE (OCOTEA_SMALL_FLASH_HIGH+0xc0500)
#define OCOTEA_MAC_SIZE 0x200
#define OCOTEA_MAC1_OFFSET 0x100
/* Default clock rate */
#define OCOTEA_SYSCLK 25000000
/* RTC/NVRAM location */
#define OCOTEA_RTC_ADDR 0x0000000148000000ULL
#define OCOTEA_RTC_SIZE 0x2000
/* Flash */
#define OCOTEA_FPGA_ADDR 0x0000000148300000ULL
#define OCOTEA_BOOT_LARGE_FLASH(x) (x & 0x40)
#define OCOTEA_SMALL_FLASH_LOW 0x00000001ff900000ULL
#define OCOTEA_SMALL_FLASH_HIGH 0x00000001fff00000ULL
#define OCOTEA_SMALL_FLASH_SIZE 0x100000
#define OCOTEA_LARGE_FLASH_LOW 0x00000001ff800000ULL
#define OCOTEA_LARGE_FLASH_HIGH 0x00000001ffc00000ULL
#define OCOTEA_LARGE_FLASH_SIZE 0x400000
/*
* Serial port defines
*/
#define RS_TABLE_SIZE 2
/* OpenBIOS defined UART mappings, used before early_serial_setup */
#define UART0_IO_BASE (u8 *) 0xE0000200
#define UART1_IO_BASE (u8 *) 0xE0000300
#define BASE_BAUD 11059200/16
#define STD_UART_OP(num) \
{ 0, BASE_BAUD, 0, UART##num##_IRQ, \
(ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
iomem_base: UART##num##_IO_BASE, \
io_type: SERIAL_IO_MEM},
#define SERIAL_PORT_DFNS \
STD_UART_OP(0) \
STD_UART_OP(1)
/* PCI support */
#define OCOTEA_PCI_LOWER_IO 0x00000000
#define OCOTEA_PCI_UPPER_IO 0x0000ffff
#define OCOTEA_PCI_LOWER_MEM 0x80000000
#define OCOTEA_PCI_UPPER_MEM 0xffffefff
#define OCOTEA_PCI_CFGREGS_BASE 0x000000020ec00000ULL
#define OCOTEA_PCI_CFGA_PLB32 0x0ec00000
#define OCOTEA_PCI_CFGD_PLB32 0x0ec00004
#define OCOTEA_PCI_IO_BASE 0x0000000208000000ULL
#define OCOTEA_PCI_IO_SIZE 0x00010000
#define OCOTEA_PCI_MEM_OFFSET 0x00000000
#endif /* __ASM_OCOTEA_H__ */
#endif /* __KERNEL__ */
arch/ppc/syslib/Makefile
View file @ 19e36308
......@@ -13,6 +13,8 @@ CFLAGS_prom_init.o += -mrelocatable-lib
CFLAGS_btext.o += -mrelocatable-lib
obj-$(CONFIG_PPCBUG_NVRAM) += prep_nvram.o
obj-$(CONFIG_44x) += ibm44x_common.o
obj-$(CONFIG_440GP) += ibm440gp_common.o
ifeq ($(CONFIG_4xx),y)
obj-$(CONFIG_4xx) += ppc4xx_pic.o
obj-$(CONFIG_40x) += ppc4xx_setup.o
......@@ -33,6 +35,7 @@ obj-$(CONFIG_PPC_CHRP) += open_pic.o indirect_pci.o i8259.o
obj-$(CONFIG_PPC_PREP) += open_pic.o indirect_pci.o i8259.o
obj-$(CONFIG_ADIR) += i8259.o indirect_pci.o pci_auto.o \
todc_time.o
obj-$(CONFIG_EBONY) += indirect_pci.o pci_auto.o todc_time.o
obj-$(CONFIG_EV64260) += gt64260_common.o gt64260_pic.o \
indirect_pci.o todc_time.o pci_auto.o
obj-$(CONFIG_GEMINI) += open_pic.o i8259.o indirect_pci.o
......@@ -46,6 +49,7 @@ obj-$(CONFIG_MENF1) += todc_time.o i8259.o mpc10x_common.o \
pci_auto.o indirect_pci.o
obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o indirect_pci.o \
i8259.o pci_auto.o pplus_common.o
obj-$(CONFIG_OCOTEA) += indirect_pci.o pci_auto.o todc_time.o
obj-$(CONFIG_PAL4) += cpc700_pic.o
obj-$(CONFIG_PCORE) += mpc10x_common.o todc_time.o i8259.o \
indirect_pci.o pci_auto.o
......
arch/ppc/syslib/ibm440gp_common.c 0 → 100644
View file @ 19e36308
/*
* arch/ppc/syslib/ibm440gp_common.c
*
* PPC440GP system library
*
* Matt Porter <mporter@mvista.com>
* Copyright 2002-2003 MontaVista Software Inc.
*
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
* Copyright (c) 2003 Zultys Technologies
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/config.h>
#include <linux/types.h>
#include <asm/ibm44x.h>
#include <asm/mmu.h>
/*
* Calculate 440GP clocks
*/
void __init ibm440gp_get_clocks(struct ibm440gp_clocks* p,
unsigned int sys_clk,
unsigned int ser_clk)
{
u32 cpc0_sys0 = mfdcr(DCRN_CPC0_SYS0);
u32 cpc0_cr0 = mfdcr(DCRN_CPC0_CR0);
u32 opdv, epdv;
if (cpc0_sys0 & 0x2){
/* Bypass system PLL */
p->cpu = p->plb = sys_clk;
}
else {
u32 fbdv, fwdva, fwdvb, m, vco;
fbdv = (cpc0_sys0 >> 18) & 0x0f;
if (!fbdv)
fbdv = 16;
fwdva = 8 - ((cpc0_sys0 >> 15) & 0x7);
fwdvb = 8 - ((cpc0_sys0 >> 12) & 0x7);
/* Feedback path */
if (cpc0_sys0 & 0x00000080){
/* PerClk */
m = fwdvb * opdv * epdv;
}
else {
/* CPU clock */
m = fbdv * fwdva;
}
vco = sys_clk * m;
p->cpu = vco / fwdva;
p->plb = vco / fwdvb;
}
opdv = ((cpc0_sys0 >> 10) & 0x3) + 1;
epdv = ((cpc0_sys0 >> 8) & 0x3) + 1;
p->opb = p->plb / opdv;
p->ebc = p->opb / epdv;
if (cpc0_cr0 & 0x00400000){
/* External UART clock */
p->uart = ser_clk;
}
else {
/* Internal UART clock */
u32 uart_div = ((cpc0_cr0 >> 16) & 0x1f) + 1;
p->uart = p->plb / uart_div;
}
}
arch/ppc/syslib/ibm440gp_common.h 0 → 100644
View file @ 19e36308
/*
* arch/ppc/syslib/ibm440gp_common.h
*
* PPC440GP system library
*
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
* Copyright (c) 2003 Zultys Technologies
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifdef __KERNEL__
#ifndef __PPC_SYSLIB_IBM440GP_COMMON_H
#define __PPC_SYSLIB_IBM440GP_COMMON_H
#ifndef __ASSEMBLY__
#include <linux/config.h>
#include <linux/init.h>
/*
* All clocks are in Hz
*/
struct ibm440gp_clocks {
unsigned int cpu; /* CPUCoreClk */
unsigned int plb; /* PLBClk */
unsigned int opb; /* OPBClk */
unsigned int ebc; /* PerClk */
unsigned int uart;
};
/*
* Please, refer to the Figure 13.1 in 440GP user manual
*
* if internal UART clock is used, ser_clk is ignored
*/
void ibm440gp_get_clocks(struct ibm440gp_clocks*, unsigned int sys_clk,
unsigned int ser_clk) __init;
#endif /* __ASSEMBLY__ */
#endif /* __PPC_SYSLIB_IBM440GP_COMMON_H */
#endif /* __KERNEL__ */
arch/ppc/syslib/ibm44x_common.c 0 → 100644
View file @ 19e36308
/*
* arch/ppc/syslib/ibm44x_common.c
*
* PPC44x system library
*
* Matt Porter <mporter@mvista.com>
* Copyright 2002-2003 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/config.h>
#include <linux/types.h>
#include <asm/ibm44x.h>
#include <asm/mmu.h>
phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size)
{
phys_addr_t page_4gb = 0;
/*
* Trap the least significant 32-bit portions of an
* address in the 440's 36-bit address space. Fix
* them up with the appropriate ERPN
*/
if ((addr >= PPC44x_IO_LO) && (addr < PPC44x_IO_HI))
page_4gb = PPC44x_IO_PAGE;
else if ((addr >= PPC44x_PCICFG_LO) && (addr < PPC44x_PCICFG_HI))
page_4gb = PPC44x_PCICFG_PAGE;
else if ((addr >= PPC44x_PCIMEM_LO) && (addr < PPC44x_PCIMEM_HI))
page_4gb = PPC44x_PCIMEM_PAGE;
return (page_4gb | addr);
};
include/asm-ppc/ibm44x.h 0 → 100644
View file @ 19e36308
This diff is collapsed.
include/asm-ppc/ibm4xx.h
View file @ 19e36308
......@@ -122,7 +122,25 @@ void ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
#define PCI_DRAM_OFFSET 0
#endif
#elif CONFIG_44x
#if defined(CONFIG_EBONY)
#include <platforms/4xx/ebony.h>
#endif
#if defined(CONFIG_OCOTEA)
#include <platforms/4xx/ocotea.h>
#endif
#endif /* CONFIG_40x */
#ifndef __ASSEMBLY__
/*
* The "residual" board information structure the boot loader passes
* into the kernel.
*/
extern bd_t __res;
#endif
#endif /* __ASM_IBM4XX_H__ */
#endif /* __KERNEL__ */
include/asm-ppc/io.h
View file @ 19e36308
......@@ -4,9 +4,11 @@
#include <linux/config.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <asm/page.h>
#include <asm/byteorder.h>
#include <asm/mmu.h>
#define SIO_CONFIG_RA 0x398
#define SIO_CONFIG_RD 0x399
......@@ -22,7 +24,7 @@
#define PREP_ISA_MEM_BASE 0xc0000000
#define PREP_PCI_DRAM_OFFSET 0x80000000
#if defined(CONFIG_40x)
#if defined(CONFIG_4xx)
#include <asm/ibm4xx.h>
#elif defined(CONFIG_8xx)
#include <asm/mpc8xx.h>
......@@ -197,14 +199,17 @@ extern void _outsl_ns(volatile u32 *port, const void *buf, int nl);
* Map in an area of physical address space, for accessing
* I/O devices etc.
*/
extern void *__ioremap(unsigned long address, unsigned long size,
extern void *__ioremap(phys_addr_t address, unsigned long size,
unsigned long flags);
extern void *ioremap(unsigned long address, unsigned long size);
extern void *ioremap(phys_addr_t address, unsigned long size);
#ifdef CONFIG_44x
extern void *ioremap64(unsigned long long address, unsigned long size);
#endif
#define ioremap_nocache(addr, size) ioremap((addr), (size))
extern void iounmap(void *addr);
extern unsigned long iopa(unsigned long addr);
extern unsigned long mm_ptov(unsigned long addr) __attribute__ ((const));
extern void io_block_mapping(unsigned long virt, unsigned long phys,
extern void io_block_mapping(unsigned long virt, phys_addr_t phys,
unsigned int size, int flags);
/*
......
include/asm-ppc/irq.h
View file @ 19e36308
......@@ -71,11 +71,11 @@ irq_canonicalize(int irq)
return (irq);
}
#elif defined(CONFIG_440)
#include <asm/ibm440.h>
#elif defined(CONFIG_44x)
#include <asm/ibm44x.h>
#define NR_UIC_IRQS 64
#define NR_IRQS (NR_UIC_IRQS + NR_BOARD_IRQS)
#define NR_UIC_IRQS 32
#define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS)
static __inline__ int
irq_canonicalize(int irq)
......
include/asm-ppc/mmu.h
View file @ 19e36308
This diff is collapsed.
include/asm-ppc/page.h
View file @ 19e36308
This diff is collapsed.
include/asm-ppc/pgalloc.h
View file @ 19e36308
......@@ -20,10 +20,17 @@ extern void pgd_free(pgd_t *pgd);
#define __pmd_free_tlb(tlb,x) do { } while (0)
#define pgd_populate(mm, pmd, pte) BUG()
#ifndef CONFIG_BOOKE
#define pmd_populate_kernel(mm, pmd, pte) \
(pmd_val(*(pmd)) = __pa(pte) | _PMD_PRESENT)
#define pmd_populate(mm, pmd, pte) \
(pmd_val(*(pmd)) = (page_to_pfn(pte) << PAGE_SHIFT) | _PMD_PRESENT)
#else
#define pmd_populate_kernel(mm, pmd, pte) \
(pmd_val(*(pmd)) = (unsigned long)pte | _PMD_PRESENT)
#define pmd_populate(mm, pmd, pte) \
(pmd_val(*(pmd)) = (unsigned long)page_to_virt(pte) | _PMD_PRESENT)
#endif
extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
extern struct page *pte_alloc_one(struct mm_struct *mm, unsigned long addr);
......
include/asm-ppc/pgtable.h
View file @ 19e36308
This diff is collapsed.
include/asm-ppc/ppc_asm.h
View file @ 19e36308
......@@ -107,7 +107,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
bdnz 0b
#endif
#if !defined(CONFIG_440)
#if !defined(CONFIG_44x)
/*
* On APUS (Amiga PowerPC cpu upgrade board), we don't know the
* physical base address of RAM at compile time.
......@@ -125,7 +125,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
.align 1; \
.long 0b; \
.previous
#else /* CONFIG_440 */
#else /* CONFIG_44x */
#define tophys(rd,rs) \
mr rd,rs
......@@ -133,7 +133,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
#define tovirt(rd,rs) \
mr rd,rs
#endif /* CONFIG_440 */
#endif /* CONFIG_44x */
/*
* On 64-bit cpus, we use the rfid instruction instead of rfi, but
......
include/asm-ppc/processor.h
View file @ 19e36308
This diff is collapsed.
include/asm-ppc/serial.h
View file @ 19e36308
This diff is collapsed.
include/asm-ppc/tlbflush.h
View file @ 19e36308
This diff is collapsed.
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7