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Kirill Smelkov
linux
Commits
19fef52d
Commit
19fef52d
authored
Aug 20, 2015
by
Ben Skeggs
Browse files
Options
Browse Files
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Plain Diff
drm/nouveau/dma: split user classes out from engine implementations
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
0e29998a
Changes
21
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Showing
21 changed files
with
349 additions
and
174 deletions
+349
-174
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
+2
-2
drivers/gpu/drm/nouveau/include/nvkm/engine/dma.h
drivers/gpu/drm/nouveau/include/nvkm/engine/dma.h
+3
-3
drivers/gpu/drm/nouveau/nvkm/engine/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/Kbuild
+1
-1
drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h
drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h
+1
-1
drivers/gpu/drm/nouveau/nvkm/engine/device/user.c
drivers/gpu/drm/nouveau/nvkm/engine/device/user.c
+0
-4
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
+1
-1
drivers/gpu/drm/nouveau/nvkm/engine/dma/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/dma/Kbuild
+11
-0
drivers/gpu/drm/nouveau/nvkm/engine/dma/base.c
drivers/gpu/drm/nouveau/nvkm/engine/dma/base.c
+110
-0
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.c
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.c
+38
-0
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf110.c
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf110.c
+38
-0
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.c
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.c
+38
-0
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.c
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.c
+38
-0
drivers/gpu/drm/nouveau/nvkm/engine/dma/priv.h
drivers/gpu/drm/nouveau/nvkm/engine/dma/priv.h
+18
-0
drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c
drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c
+1
-85
drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h
drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h
+29
-0
drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c
drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c
+4
-17
drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf110.c
drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf110.c
+4
-17
drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c
drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c
+4
-17
drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c
drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c
+4
-17
drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild
+0
-5
drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
+4
-4
No files found.
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
View file @
19fef52d
...
...
@@ -133,7 +133,7 @@ struct nvkm_device {
struct
nvkm_engine
*
ce
[
3
];
struct
nvkm_engine
*
cipher
;
struct
nvkm_disp
*
disp
;
struct
nvkm_dma
eng
*
dma
;
struct
nvkm_dma
*
dma
;
struct
nvkm_fifo
*
fifo
;
struct
nvkm_gr
*
gr
;
struct
nvkm_engine
*
ifb
;
...
...
@@ -193,7 +193,7 @@ struct nvkm_device_chip {
int
(
*
ce
[
3
]
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_engine
**
);
int
(
*
cipher
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_engine
**
);
int
(
*
disp
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_disp
**
);
int
(
*
dma
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_dma
eng
**
);
int
(
*
dma
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_dma
**
);
int
(
*
fifo
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_fifo
**
);
int
(
*
gr
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_gr
**
);
int
(
*
ifb
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_engine
**
);
...
...
drivers/gpu/drm/nouveau/include/nvkm/engine/dma
obj
.h
→
drivers/gpu/drm/nouveau/include/nvkm/engine/dma.h
View file @
19fef52d
#ifndef __NVKM_DMA
OBJ
_H__
#define __NVKM_DMA
OBJ
_H__
#ifndef __NVKM_DMA_H__
#define __NVKM_DMA_H__
#include <core/engine.h>
struct
nvkm_gpuobj
;
...
...
@@ -11,7 +11,7 @@ struct nvkm_dmaobj {
u64
limit
;
};
struct
nvkm_dma
eng
{
struct
nvkm_dma
{
struct
nvkm_engine
engine
;
/* creates a "physical" dma object from a struct nvkm_dmaobj */
...
...
drivers/gpu/drm/nouveau/nvkm/engine/Kbuild
View file @
19fef52d
...
...
@@ -6,7 +6,7 @@ include $(src)/nvkm/engine/ce/Kbuild
include $(src)/nvkm/engine/cipher/Kbuild
include $(src)/nvkm/engine/device/Kbuild
include $(src)/nvkm/engine/disp/Kbuild
include $(src)/nvkm/engine/dma
obj
/Kbuild
include $(src)/nvkm/engine/dma/Kbuild
include $(src)/nvkm/engine/fifo/Kbuild
include $(src)/nvkm/engine/gr/Kbuild
include $(src)/nvkm/engine/mpeg/Kbuild
...
...
drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h
View file @
19fef52d
...
...
@@ -26,7 +26,7 @@
#include <engine/ce.h>
#include <engine/cipher.h>
#include <engine/disp.h>
#include <engine/dma
obj
.h>
#include <engine/dma.h>
#include <engine/fifo.h>
#include <engine/gr.h>
#include <engine/mpeg.h>
...
...
drivers/gpu/drm/nouveau/nvkm/engine/device/user.c
View file @
19fef52d
...
...
@@ -30,10 +30,6 @@
#include <subdev/fb.h>
#include <subdev/instmem.h>
#include <subdev/timer.h>
#include <engine/disp.h>
#include <engine/dmaobj.h>
#include <engine/fifo.h>
#include <engine/pm.h>
#include <nvif/class.h>
#include <nvif/unpack.h>
...
...
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
View file @
19fef52d
...
...
@@ -30,7 +30,7 @@
#include <core/enum.h>
#include <core/handle.h>
#include <core/ramht.h>
#include <engine/dma
obj
.h>
#include <engine/dma.h>
#include <subdev/bios.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/disp.h>
...
...
drivers/gpu/drm/nouveau/nvkm/engine/dma/Kbuild
0 → 100644
View file @
19fef52d
nvkm-y += nvkm/engine/dma/base.o
nvkm-y += nvkm/engine/dma/nv04.o
nvkm-y += nvkm/engine/dma/nv50.o
nvkm-y += nvkm/engine/dma/gf100.o
nvkm-y += nvkm/engine/dma/gf110.o
nvkm-y += nvkm/engine/dma/user.o
nvkm-y += nvkm/engine/dma/usernv04.o
nvkm-y += nvkm/engine/dma/usernv50.o
nvkm-y += nvkm/engine/dma/usergf100.o
nvkm-y += nvkm/engine/dma/usergf110.o
drivers/gpu/drm/nouveau/nvkm/engine/dma/base.c
0 → 100644
View file @
19fef52d
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include "priv.h"
#include <core/client.h>
#include <core/gpuobj.h>
struct
hack
{
struct
nvkm_gpuobj
object
;
struct
nvkm_gpuobj
*
parent
;
};
static
void
dtor
(
struct
nvkm_object
*
object
)
{
struct
hack
*
hack
=
(
void
*
)
object
;
nvkm_gpuobj_del
(
&
hack
->
parent
);
nvkm_object_destroy
(
&
hack
->
object
.
object
);
}
static
struct
nvkm_oclass
hack
=
{
.
handle
=
NV_GPUOBJ_CLASS
,
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
dtor
=
dtor
,
.
init
=
_nvkm_object_init
,
.
fini
=
_nvkm_object_fini
,
},
};
static
int
nvkm_dmaobj_bind
(
struct
nvkm_dmaobj
*
dmaobj
,
struct
nvkm_gpuobj
*
pargpu
,
struct
nvkm_gpuobj
**
pgpuobj
)
{
const
struct
nvkm_dma_impl
*
impl
=
(
void
*
)
nv_oclass
(
nv_object
(
dmaobj
)
->
engine
);
int
ret
=
0
;
if
(
&
dmaobj
->
base
==
&
pargpu
->
object
)
{
/* ctor bind */
struct
nvkm_object
*
parent
=
(
void
*
)
pargpu
;
struct
hack
*
object
;
if
(
parent
->
parent
->
parent
==
&
nvkm_client
(
parent
)
->
object
)
{
/* delayed, or no, binding */
return
0
;
}
pargpu
=
(
void
*
)
nv_pclass
((
void
*
)
pargpu
,
NV_GPUOBJ_CLASS
);
ret
=
nvkm_object_create
(
parent
,
NULL
,
&
hack
,
NV_GPUOBJ_CLASS
,
&
object
);
if
(
ret
==
0
)
{
nvkm_object_ref
(
NULL
,
&
parent
);
*
pgpuobj
=
&
object
->
object
;
ret
=
impl
->
bind
(
dmaobj
,
pargpu
,
&
object
->
parent
);
if
(
ret
)
return
ret
;
object
->
object
.
node
=
object
->
parent
->
node
;
object
->
object
.
addr
=
object
->
parent
->
addr
;
object
->
object
.
size
=
object
->
parent
->
size
;
return
0
;
}
return
ret
;
}
return
impl
->
bind
(
dmaobj
,
pargpu
,
pgpuobj
);
}
int
_nvkm_dma_ctor
(
struct
nvkm_object
*
parent
,
struct
nvkm_object
*
engine
,
struct
nvkm_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nvkm_object
**
pobject
)
{
const
struct
nvkm_dma_impl
*
impl
=
(
void
*
)
oclass
;
struct
nvkm_dma
*
dmaeng
;
int
ret
;
ret
=
nvkm_engine_create
(
parent
,
engine
,
oclass
,
true
,
"DMAOBJ"
,
"dmaobj"
,
&
dmaeng
);
*
pobject
=
nv_object
(
dmaeng
);
if
(
ret
)
return
ret
;
nv_engine
(
dmaeng
)
->
sclass
=
impl
->
sclass
;
dmaeng
->
bind
=
nvkm_dmaobj_bind
;
return
0
;
}
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.c
0 → 100644
View file @
19fef52d
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include "priv.h"
#include "user.h"
struct
nvkm_oclass
*
gf100_dmaeng_oclass
=
&
(
struct
nvkm_dma_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0xc0
),
.
base
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
ctor
=
_nvkm_dma_ctor
,
.
dtor
=
_nvkm_dma_dtor
,
.
init
=
_nvkm_dma_init
,
.
fini
=
_nvkm_dma_fini
,
},
.
sclass
=
gf100_dmaeng_sclass
,
.
bind
=
gf100_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf110.c
0 → 100644
View file @
19fef52d
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include "priv.h"
#include "user.h"
struct
nvkm_oclass
*
gf110_dmaeng_oclass
=
&
(
struct
nvkm_dma_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0xd0
),
.
base
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
ctor
=
_nvkm_dma_ctor
,
.
dtor
=
_nvkm_dma_dtor
,
.
init
=
_nvkm_dma_init
,
.
fini
=
_nvkm_dma_fini
,
},
.
sclass
=
gf110_dmaeng_sclass
,
.
bind
=
gf110_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.c
0 → 100644
View file @
19fef52d
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include "priv.h"
#include "user.h"
struct
nvkm_oclass
*
nv04_dmaeng_oclass
=
&
(
struct
nvkm_dma_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0x04
),
.
base
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
ctor
=
_nvkm_dma_ctor
,
.
dtor
=
_nvkm_dma_dtor
,
.
init
=
_nvkm_dma_init
,
.
fini
=
_nvkm_dma_fini
,
},
.
sclass
=
nv04_dmaeng_sclass
,
.
bind
=
nv04_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.c
0 → 100644
View file @
19fef52d
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include "priv.h"
#include "user.h"
struct
nvkm_oclass
*
nv50_dmaeng_oclass
=
&
(
struct
nvkm_dma_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0x50
),
.
base
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
ctor
=
_nvkm_dma_ctor
,
.
dtor
=
_nvkm_dma_dtor
,
.
init
=
_nvkm_dma_init
,
.
fini
=
_nvkm_dma_fini
,
},
.
sclass
=
nv50_dmaeng_sclass
,
.
bind
=
nv50_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/nvkm/engine/dma/priv.h
0 → 100644
View file @
19fef52d
#ifndef __NVKM_DMA_PRIV_H__
#define __NVKM_DMA_PRIV_H__
#include <engine/dma.h>
int
_nvkm_dma_ctor
(
struct
nvkm_object
*
,
struct
nvkm_object
*
,
struct
nvkm_oclass
*
,
void
*
,
u32
,
struct
nvkm_object
**
);
#define _nvkm_dma_dtor _nvkm_engine_dtor
#define _nvkm_dma_init _nvkm_engine_init
#define _nvkm_dma_fini _nvkm_engine_fini
struct
nvkm_dma_impl
{
struct
nvkm_oclass
base
;
struct
nvkm_oclass
*
sclass
;
int
(
*
bind
)(
struct
nvkm_dmaobj
*
,
struct
nvkm_gpuobj
*
,
struct
nvkm_gpuobj
**
);
};
#endif
drivers/gpu/drm/nouveau/nvkm/engine/dma
obj/base
.c
→
drivers/gpu/drm/nouveau/nvkm/engine/dma
/user
.c
View file @
19fef52d
...
...
@@ -21,79 +21,15 @@
*
* Authors: Ben Skeggs
*/
#include "
priv
.h"
#include "
user
.h"
#include <core/client.h>
#include <core/gpuobj.h>
#include <subdev/fb.h>
#include <subdev/instmem.h>
#include <nvif/class.h>
#include <nvif/unpack.h>
struct
hack
{
struct
nvkm_gpuobj
object
;
struct
nvkm_gpuobj
*
parent
;
};
static
void
dtor
(
struct
nvkm_object
*
object
)
{
struct
hack
*
hack
=
(
void
*
)
object
;
nvkm_gpuobj_del
(
&
hack
->
parent
);
nvkm_object_destroy
(
&
hack
->
object
.
object
);
}
static
struct
nvkm_oclass
hack
=
{
.
handle
=
NV_GPUOBJ_CLASS
,
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
dtor
=
dtor
,
.
init
=
_nvkm_object_init
,
.
fini
=
_nvkm_object_fini
,
},
};
static
int
nvkm_dmaobj_bind
(
struct
nvkm_dmaobj
*
dmaobj
,
struct
nvkm_gpuobj
*
pargpu
,
struct
nvkm_gpuobj
**
pgpuobj
)
{
const
struct
nvkm_dmaeng_impl
*
impl
=
(
void
*
)
nv_oclass
(
nv_object
(
dmaobj
)
->
engine
);
int
ret
=
0
;
if
(
&
dmaobj
->
base
==
&
pargpu
->
object
)
{
/* ctor bind */
struct
nvkm_object
*
parent
=
(
void
*
)
pargpu
;
struct
hack
*
object
;
if
(
parent
->
parent
->
parent
==
&
nvkm_client
(
parent
)
->
object
)
{
/* delayed, or no, binding */
return
0
;
}
pargpu
=
(
void
*
)
nv_pclass
((
void
*
)
pargpu
,
NV_GPUOBJ_CLASS
);
ret
=
nvkm_object_create
(
parent
,
NULL
,
&
hack
,
NV_GPUOBJ_CLASS
,
&
object
);
if
(
ret
==
0
)
{
nvkm_object_ref
(
NULL
,
&
parent
);
*
pgpuobj
=
&
object
->
object
;
ret
=
impl
->
bind
(
dmaobj
,
pargpu
,
&
object
->
parent
);
if
(
ret
)
return
ret
;
object
->
object
.
node
=
object
->
parent
->
node
;
object
->
object
.
addr
=
object
->
parent
->
addr
;
object
->
object
.
size
=
object
->
parent
->
size
;
return
0
;
}
return
ret
;
}
return
impl
->
bind
(
dmaobj
,
pargpu
,
pgpuobj
);
}
int
nvkm_dmaobj_create_
(
struct
nvkm_object
*
parent
,
struct
nvkm_object
*
engine
,
...
...
@@ -183,23 +119,3 @@ nvkm_dmaobj_create_(struct nvkm_object *parent,
return
ret
;
}
int
_nvkm_dmaeng_ctor
(
struct
nvkm_object
*
parent
,
struct
nvkm_object
*
engine
,
struct
nvkm_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nvkm_object
**
pobject
)
{
const
struct
nvkm_dmaeng_impl
*
impl
=
(
void
*
)
oclass
;
struct
nvkm_dmaeng
*
dmaeng
;
int
ret
;
ret
=
nvkm_engine_create
(
parent
,
engine
,
oclass
,
true
,
"DMAOBJ"
,
"dmaobj"
,
&
dmaeng
);
*
pobject
=
nv_object
(
dmaeng
);
if
(
ret
)
return
ret
;
nv_engine
(
dmaeng
)
->
sclass
=
impl
->
sclass
;
dmaeng
->
bind
=
nvkm_dmaobj_bind
;
return
0
;
}
drivers/gpu/drm/nouveau/nvkm/engine/dma
obj/priv
.h
→
drivers/gpu/drm/nouveau/nvkm/engine/dma
/user
.h
View file @
19fef52d
#ifndef __NVKM_DMA
OBJ_PRIV
_H__
#define __NVKM_DMA
OBJ_PRIV
_H__
#include
<engine/dmaobj.h>
#ifndef __NVKM_DMA
_USER
_H__
#define __NVKM_DMA
_USER
_H__
#include
"priv.h"
#define nvkm_dmaobj_create(p,e,c,pa,sa,d) \
nvkm_dmaobj_create_((p), (e), (c), (pa), (sa), sizeof(**d), (void **)d)
...
...
@@ -12,17 +12,18 @@ int nvkm_dmaobj_create_(struct nvkm_object *, struct nvkm_object *,
#define _nvkm_dmaobj_init _nvkm_object_init
#define _nvkm_dmaobj_fini _nvkm_object_fini
int
_nvkm_dmaeng_ctor
(
struct
nvkm_object
*
,
struct
nvkm_object
*
,
struct
nvkm_oclass
*
,
void
*
,
u32
,
struct
nvkm_object
**
);
#define _nvkm_dmaeng_dtor _nvkm_engine_dtor
#define _nvkm_dmaeng_init _nvkm_engine_init
#define _nvkm_dmaeng_fini _nvkm_engine_fini
extern
struct
nvkm_oclass
nv04_dmaeng_sclass
[];
extern
struct
nvkm_oclass
nv50_dmaeng_sclass
[];
extern
struct
nvkm_oclass
gf100_dmaeng_sclass
[];
extern
struct
nvkm_oclass
gf110_dmaeng_sclass
[];
int
nv04_dmaobj_bind
(
struct
nvkm_dmaobj
*
,
struct
nvkm_gpuobj
*
,
struct
nvkm_gpuobj
**
);
int
nv50_dmaobj_bind
(
struct
nvkm_dmaobj
*
,
struct
nvkm_gpuobj
*
,
struct
nvkm_gpuobj
**
);
int
gf100_dmaobj_bind
(
struct
nvkm_dmaobj
*
,
struct
nvkm_gpuobj
*
,
struct
nvkm_gpuobj
**
);
int
gf110_dmaobj_bind
(
struct
nvkm_dmaobj
*
,
struct
nvkm_gpuobj
*
,
struct
nvkm_gpuobj
**
);
struct
nvkm_dmaeng_impl
{
struct
nvkm_oclass
base
;
struct
nvkm_oclass
*
sclass
;
int
(
*
bind
)(
struct
nvkm_dmaobj
*
,
struct
nvkm_gpuobj
*
,
struct
nvkm_gpuobj
**
);
};
#endif
drivers/gpu/drm/nouveau/nvkm/engine/dma
obj/
gf100.c
→
drivers/gpu/drm/nouveau/nvkm/engine/dma
/user
gf100.c
View file @
19fef52d
...
...
@@ -21,7 +21,7 @@
*
* Authors: Ben Skeggs
*/
#include "
priv
.h"
#include "
user
.h"
#include <core/client.h>
#include <core/gpuobj.h>
...
...
@@ -36,7 +36,7 @@ struct gf100_dmaobj {
u32
flags5
;
};
static
int
int
gf100_dmaobj_bind
(
struct
nvkm_dmaobj
*
obj
,
struct
nvkm_gpuobj
*
parent
,
struct
nvkm_gpuobj
**
pgpuobj
)
{
...
...
@@ -65,7 +65,7 @@ gf100_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct
nvkm_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nvkm_object
**
pobject
)
{
struct
nvkm_dma
eng
*
dmaeng
=
(
void
*
)
engine
;
struct
nvkm_dma
*
dmaeng
=
(
void
*
)
engine
;
union
{
struct
gf100_dma_v0
v0
;
}
*
args
;
...
...
@@ -146,23 +146,10 @@ gf100_dmaobj_ofuncs = {
.
fini
=
_nvkm_dmaobj_fini
,
};
st
atic
st
ruct
nvkm_oclass
struct
nvkm_oclass
gf100_dmaeng_sclass
[]
=
{
{
NV_DMA_FROM_MEMORY
,
&
gf100_dmaobj_ofuncs
},
{
NV_DMA_TO_MEMORY
,
&
gf100_dmaobj_ofuncs
},
{
NV_DMA_IN_MEMORY
,
&
gf100_dmaobj_ofuncs
},
{}
};
struct
nvkm_oclass
*
gf100_dmaeng_oclass
=
&
(
struct
nvkm_dmaeng_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0xc0
),
.
base
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
ctor
=
_nvkm_dmaeng_ctor
,
.
dtor
=
_nvkm_dmaeng_dtor
,
.
init
=
_nvkm_dmaeng_init
,
.
fini
=
_nvkm_dmaeng_fini
,
},
.
sclass
=
gf100_dmaeng_sclass
,
.
bind
=
gf100_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/nvkm/engine/dma
obj/
gf110.c
→
drivers/gpu/drm/nouveau/nvkm/engine/dma
/user
gf110.c
View file @
19fef52d
...
...
@@ -21,7 +21,7 @@
*
* Authors: Ben Skeggs
*/
#include "
priv
.h"
#include "
user
.h"
#include <core/client.h>
#include <core/gpuobj.h>
...
...
@@ -35,7 +35,7 @@ struct gf110_dmaobj {
u32
flags0
;
};
static
int
int
gf110_dmaobj_bind
(
struct
nvkm_dmaobj
*
obj
,
struct
nvkm_gpuobj
*
parent
,
struct
nvkm_gpuobj
**
pgpuobj
)
{
...
...
@@ -63,7 +63,7 @@ gf110_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct
nvkm_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nvkm_object
**
pobject
)
{
struct
nvkm_dma
eng
*
dmaeng
=
(
void
*
)
engine
;
struct
nvkm_dma
*
dmaeng
=
(
void
*
)
engine
;
union
{
struct
gf110_dma_v0
v0
;
}
*
args
;
...
...
@@ -128,23 +128,10 @@ gf110_dmaobj_ofuncs = {
.
fini
=
_nvkm_dmaobj_fini
,
};
st
atic
st
ruct
nvkm_oclass
struct
nvkm_oclass
gf110_dmaeng_sclass
[]
=
{
{
NV_DMA_FROM_MEMORY
,
&
gf110_dmaobj_ofuncs
},
{
NV_DMA_TO_MEMORY
,
&
gf110_dmaobj_ofuncs
},
{
NV_DMA_IN_MEMORY
,
&
gf110_dmaobj_ofuncs
},
{}
};
struct
nvkm_oclass
*
gf110_dmaeng_oclass
=
&
(
struct
nvkm_dmaeng_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0xd0
),
.
base
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
ctor
=
_nvkm_dmaeng_ctor
,
.
dtor
=
_nvkm_dmaeng_dtor
,
.
init
=
_nvkm_dmaeng_init
,
.
fini
=
_nvkm_dmaeng_fini
,
},
.
sclass
=
gf110_dmaeng_sclass
,
.
bind
=
gf110_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/nvkm/engine/dma
obj/
nv04.c
→
drivers/gpu/drm/nouveau/nvkm/engine/dma
/user
nv04.c
View file @
19fef52d
...
...
@@ -21,7 +21,7 @@
*
* Authors: Ben Skeggs
*/
#include "
priv
.h"
#include "
user
.h"
#include <core/gpuobj.h>
#include <subdev/fb.h>
...
...
@@ -36,7 +36,7 @@ struct nv04_dmaobj {
u32
flags2
;
};
static
int
int
nv04_dmaobj_bind
(
struct
nvkm_dmaobj
*
obj
,
struct
nvkm_gpuobj
*
parent
,
struct
nvkm_gpuobj
**
pgpuobj
)
{
...
...
@@ -76,7 +76,7 @@ nv04_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct
nvkm_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nvkm_object
**
pobject
)
{
struct
nvkm_dma
eng
*
dmaeng
=
(
void
*
)
engine
;
struct
nvkm_dma
*
dmaeng
=
(
void
*
)
engine
;
struct
nv04_mmu
*
mmu
=
nv04_mmu
(
engine
);
struct
nv04_dmaobj
*
dmaobj
;
int
ret
;
...
...
@@ -132,23 +132,10 @@ nv04_dmaobj_ofuncs = {
.
fini
=
_nvkm_dmaobj_fini
,
};
st
atic
st
ruct
nvkm_oclass
struct
nvkm_oclass
nv04_dmaeng_sclass
[]
=
{
{
NV_DMA_FROM_MEMORY
,
&
nv04_dmaobj_ofuncs
},
{
NV_DMA_TO_MEMORY
,
&
nv04_dmaobj_ofuncs
},
{
NV_DMA_IN_MEMORY
,
&
nv04_dmaobj_ofuncs
},
{}
};
struct
nvkm_oclass
*
nv04_dmaeng_oclass
=
&
(
struct
nvkm_dmaeng_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0x04
),
.
base
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
ctor
=
_nvkm_dmaeng_ctor
,
.
dtor
=
_nvkm_dmaeng_dtor
,
.
init
=
_nvkm_dmaeng_init
,
.
fini
=
_nvkm_dmaeng_fini
,
},
.
sclass
=
nv04_dmaeng_sclass
,
.
bind
=
nv04_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/nvkm/engine/dma
obj/
nv50.c
→
drivers/gpu/drm/nouveau/nvkm/engine/dma
/user
nv50.c
View file @
19fef52d
...
...
@@ -21,7 +21,7 @@
*
* Authors: Ben Skeggs
*/
#include "
priv
.h"
#include "
user
.h"
#include <core/client.h>
#include <core/gpuobj.h>
...
...
@@ -36,7 +36,7 @@ struct nv50_dmaobj {
u32
flags5
;
};
static
int
int
nv50_dmaobj_bind
(
struct
nvkm_dmaobj
*
obj
,
struct
nvkm_gpuobj
*
parent
,
struct
nvkm_gpuobj
**
pgpuobj
)
{
...
...
@@ -65,7 +65,7 @@ nv50_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct
nvkm_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nvkm_object
**
pobject
)
{
struct
nvkm_dma
eng
*
dmaeng
=
(
void
*
)
engine
;
struct
nvkm_dma
*
dmaeng
=
(
void
*
)
engine
;
union
{
struct
nv50_dma_v0
v0
;
}
*
args
;
...
...
@@ -152,23 +152,10 @@ nv50_dmaobj_ofuncs = {
.
fini
=
_nvkm_dmaobj_fini
,
};
st
atic
st
ruct
nvkm_oclass
struct
nvkm_oclass
nv50_dmaeng_sclass
[]
=
{
{
NV_DMA_FROM_MEMORY
,
&
nv50_dmaobj_ofuncs
},
{
NV_DMA_TO_MEMORY
,
&
nv50_dmaobj_ofuncs
},
{
NV_DMA_IN_MEMORY
,
&
nv50_dmaobj_ofuncs
},
{}
};
struct
nvkm_oclass
*
nv50_dmaeng_oclass
=
&
(
struct
nvkm_dmaeng_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0x50
),
.
base
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
ctor
=
_nvkm_dmaeng_ctor
,
.
dtor
=
_nvkm_dmaeng_dtor
,
.
init
=
_nvkm_dmaeng_init
,
.
fini
=
_nvkm_dmaeng_fini
,
},
.
sclass
=
nv50_dmaeng_sclass
,
.
bind
=
nv50_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild
deleted
100644 → 0
View file @
0e29998a
nvkm-y += nvkm/engine/dmaobj/base.o
nvkm-y += nvkm/engine/dmaobj/nv04.o
nvkm-y += nvkm/engine/dmaobj/nv50.o
nvkm-y += nvkm/engine/dmaobj/gf100.o
nvkm-y += nvkm/engine/dmaobj/gf110.o
drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
View file @
19fef52d
...
...
@@ -26,7 +26,7 @@
#include <core/client.h>
#include <core/handle.h>
#include <core/notify.h>
#include <engine/dma
obj
.h>
#include <engine/dma.h>
#include <nvif/class.h>
#include <nvif/event.h>
...
...
@@ -104,7 +104,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent,
struct
nvkm_fifo
*
fifo
=
(
void
*
)
engine
;
struct
nvkm_fifo_base
*
base
=
(
void
*
)
parent
;
struct
nvkm_fifo_chan
*
chan
;
struct
nvkm_dma
eng
*
dmaeng
;
struct
nvkm_dma
*
dma
;
struct
nvkm_subdev
*
subdev
=
&
fifo
->
engine
.
subdev
;
struct
nvkm_device
*
device
=
subdev
->
device
;
unsigned
long
flags
;
...
...
@@ -124,7 +124,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent,
return
-
ENOENT
;
dmaobj
=
(
void
*
)
handle
->
object
;
dma
eng
=
(
void
*
)
dmaobj
->
base
.
engine
;
dma
=
(
void
*
)
dmaobj
->
base
.
engine
;
switch
(
dmaobj
->
base
.
oclass
->
handle
)
{
case
NV_DMA_FROM_MEMORY
:
case
NV_DMA_IN_MEMORY
:
...
...
@@ -133,7 +133,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent,
return
-
EINVAL
;
}
ret
=
dma
eng
->
bind
(
dmaobj
,
&
base
->
gpuobj
,
&
chan
->
pushgpu
);
ret
=
dma
->
bind
(
dmaobj
,
&
base
->
gpuobj
,
&
chan
->
pushgpu
);
if
(
ret
)
return
ret
;
}
...
...
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