Commit 1a03f867 authored by David S. Miller's avatar David S. Miller

Merge branch 'qed-Fix-series-II'

Sudarsana Reddy Kalluru says:

====================
qed: Fix series II.

The patch series fixes few issues in the qed driver.

Please  consider applying it to 'net' branch.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 64119e05 25c020a9
...@@ -665,7 +665,7 @@ qed_sp_update_mcast_bin(struct qed_hwfn *p_hwfn, ...@@ -665,7 +665,7 @@ qed_sp_update_mcast_bin(struct qed_hwfn *p_hwfn,
p_ramrod->common.update_approx_mcast_flg = 1; p_ramrod->common.update_approx_mcast_flg = 1;
for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) { for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
u32 *p_bins = (u32 *)p_params->bins; u32 *p_bins = p_params->bins;
p_ramrod->approx_mcast.bins[i] = cpu_to_le32(p_bins[i]); p_ramrod->approx_mcast.bins[i] = cpu_to_le32(p_bins[i]);
} }
...@@ -1476,8 +1476,8 @@ qed_sp_eth_filter_mcast(struct qed_hwfn *p_hwfn, ...@@ -1476,8 +1476,8 @@ qed_sp_eth_filter_mcast(struct qed_hwfn *p_hwfn,
enum spq_mode comp_mode, enum spq_mode comp_mode,
struct qed_spq_comp_cb *p_comp_data) struct qed_spq_comp_cb *p_comp_data)
{ {
unsigned long bins[ETH_MULTICAST_MAC_BINS_IN_REGS];
struct vport_update_ramrod_data *p_ramrod = NULL; struct vport_update_ramrod_data *p_ramrod = NULL;
u32 bins[ETH_MULTICAST_MAC_BINS_IN_REGS];
struct qed_spq_entry *p_ent = NULL; struct qed_spq_entry *p_ent = NULL;
struct qed_sp_init_data init_data; struct qed_sp_init_data init_data;
u8 abs_vport_id = 0; u8 abs_vport_id = 0;
...@@ -1513,26 +1513,25 @@ qed_sp_eth_filter_mcast(struct qed_hwfn *p_hwfn, ...@@ -1513,26 +1513,25 @@ qed_sp_eth_filter_mcast(struct qed_hwfn *p_hwfn,
/* explicitly clear out the entire vector */ /* explicitly clear out the entire vector */
memset(&p_ramrod->approx_mcast.bins, 0, memset(&p_ramrod->approx_mcast.bins, 0,
sizeof(p_ramrod->approx_mcast.bins)); sizeof(p_ramrod->approx_mcast.bins));
memset(bins, 0, sizeof(unsigned long) * memset(bins, 0, sizeof(bins));
ETH_MULTICAST_MAC_BINS_IN_REGS);
/* filter ADD op is explicit set op and it removes /* filter ADD op is explicit set op and it removes
* any existing filters for the vport * any existing filters for the vport
*/ */
if (p_filter_cmd->opcode == QED_FILTER_ADD) { if (p_filter_cmd->opcode == QED_FILTER_ADD) {
for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) { for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
u32 bit; u32 bit, nbits;
bit = qed_mcast_bin_from_mac(p_filter_cmd->mac[i]); bit = qed_mcast_bin_from_mac(p_filter_cmd->mac[i]);
__set_bit(bit, bins); nbits = sizeof(u32) * BITS_PER_BYTE;
bins[bit / nbits] |= 1 << (bit % nbits);
} }
/* Convert to correct endianity */ /* Convert to correct endianity */
for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) { for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
struct vport_update_ramrod_mcast *p_ramrod_bins; struct vport_update_ramrod_mcast *p_ramrod_bins;
u32 *p_bins = (u32 *)bins;
p_ramrod_bins = &p_ramrod->approx_mcast; p_ramrod_bins = &p_ramrod->approx_mcast;
p_ramrod_bins->bins[i] = cpu_to_le32(p_bins[i]); p_ramrod_bins->bins[i] = cpu_to_le32(bins[i]);
} }
} }
......
...@@ -215,7 +215,7 @@ struct qed_sp_vport_update_params { ...@@ -215,7 +215,7 @@ struct qed_sp_vport_update_params {
u8 anti_spoofing_en; u8 anti_spoofing_en;
u8 update_accept_any_vlan_flg; u8 update_accept_any_vlan_flg;
u8 accept_any_vlan; u8 accept_any_vlan;
unsigned long bins[8]; u32 bins[8];
struct qed_rss_params *rss_params; struct qed_rss_params *rss_params;
struct qed_filter_accept_flags accept_flags; struct qed_filter_accept_flags accept_flags;
struct qed_sge_tpa_params *sge_tpa_params; struct qed_sge_tpa_params *sge_tpa_params;
......
...@@ -1211,6 +1211,7 @@ static void qed_mcp_handle_link_change(struct qed_hwfn *p_hwfn, ...@@ -1211,6 +1211,7 @@ static void qed_mcp_handle_link_change(struct qed_hwfn *p_hwfn,
break; break;
default: default:
p_link->speed = 0; p_link->speed = 0;
p_link->link_up = 0;
} }
if (p_link->link_up && p_link->speed) if (p_link->link_up && p_link->speed)
...@@ -1308,9 +1309,15 @@ int qed_mcp_set_link(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool b_up) ...@@ -1308,9 +1309,15 @@ int qed_mcp_set_link(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool b_up)
phy_cfg.pause |= (params->pause.forced_tx) ? ETH_PAUSE_TX : 0; phy_cfg.pause |= (params->pause.forced_tx) ? ETH_PAUSE_TX : 0;
phy_cfg.adv_speed = params->speed.advertised_speeds; phy_cfg.adv_speed = params->speed.advertised_speeds;
phy_cfg.loopback_mode = params->loopback_mode; phy_cfg.loopback_mode = params->loopback_mode;
if (p_hwfn->mcp_info->capabilities & FW_MB_PARAM_FEATURE_SUPPORT_EEE) {
if (params->eee.enable) /* There are MFWs that share this capability regardless of whether
phy_cfg.eee_cfg |= EEE_CFG_EEE_ENABLED; * this is feasible or not. And given that at the very least adv_caps
* would be set internally by qed, we want to make sure LFA would
* still work.
*/
if ((p_hwfn->mcp_info->capabilities &
FW_MB_PARAM_FEATURE_SUPPORT_EEE) && params->eee.enable) {
phy_cfg.eee_cfg |= EEE_CFG_EEE_ENABLED;
if (params->eee.tx_lpi_enable) if (params->eee.tx_lpi_enable)
phy_cfg.eee_cfg |= EEE_CFG_TX_LPI; phy_cfg.eee_cfg |= EEE_CFG_TX_LPI;
if (params->eee.adv_caps & QED_EEE_1G_ADV) if (params->eee.adv_caps & QED_EEE_1G_ADV)
......
...@@ -2831,7 +2831,7 @@ qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn, ...@@ -2831,7 +2831,7 @@ qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
p_data->update_approx_mcast_flg = 1; p_data->update_approx_mcast_flg = 1;
memcpy(p_data->bins, p_mcast_tlv->bins, memcpy(p_data->bins, p_mcast_tlv->bins,
sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS); sizeof(u32) * ETH_MULTICAST_MAC_BINS_IN_REGS);
*tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST; *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
} }
......
...@@ -1126,7 +1126,7 @@ int qed_vf_pf_vport_update(struct qed_hwfn *p_hwfn, ...@@ -1126,7 +1126,7 @@ int qed_vf_pf_vport_update(struct qed_hwfn *p_hwfn,
resp_size += sizeof(struct pfvf_def_resp_tlv); resp_size += sizeof(struct pfvf_def_resp_tlv);
memcpy(p_mcast_tlv->bins, p_params->bins, memcpy(p_mcast_tlv->bins, p_params->bins,
sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS); sizeof(u32) * ETH_MULTICAST_MAC_BINS_IN_REGS);
} }
update_rx = p_params->accept_flags.update_rx_mode_config; update_rx = p_params->accept_flags.update_rx_mode_config;
...@@ -1272,7 +1272,7 @@ void qed_vf_pf_filter_mcast(struct qed_hwfn *p_hwfn, ...@@ -1272,7 +1272,7 @@ void qed_vf_pf_filter_mcast(struct qed_hwfn *p_hwfn,
u32 bit; u32 bit;
bit = qed_mcast_bin_from_mac(p_filter_cmd->mac[i]); bit = qed_mcast_bin_from_mac(p_filter_cmd->mac[i]);
__set_bit(bit, sp_params.bins); sp_params.bins[bit / 32] |= 1 << (bit % 32);
} }
} }
......
...@@ -392,7 +392,12 @@ struct vfpf_vport_update_mcast_bin_tlv { ...@@ -392,7 +392,12 @@ struct vfpf_vport_update_mcast_bin_tlv {
struct channel_tlv tl; struct channel_tlv tl;
u8 padding[4]; u8 padding[4];
u64 bins[8]; /* There are only 256 approx bins, and in HSI they're divided into
* 32-bit values. As old VFs used to set-bit to the values on its side,
* the upper half of the array is never expected to contain any data.
*/
u64 bins[4];
u64 obsolete_bins[4];
}; };
struct vfpf_vport_update_accept_param_tlv { struct vfpf_vport_update_accept_param_tlv {
......
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