Commit 1a5e6326 authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville

ath9k_hw: remove IS_CHAN_B()

Hardware 802.11b-only mode isn't supported by the driver (the device is
configured for 802.11n/g instead). Simplify the code by removing checks
for it.
Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 8896934c
...@@ -794,8 +794,10 @@ static void ar5008_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) ...@@ -794,8 +794,10 @@ static void ar5008_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan)
if (chan == NULL) if (chan == NULL)
return; return;
rfMode |= (IS_CHAN_B(chan) || IS_CHAN_G(chan)) if (IS_CHAN_2GHZ(chan))
? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM; rfMode |= AR_PHY_MODE_DYNAMIC;
else
rfMode |= AR_PHY_MODE_OFDM;
if (!AR_SREV_9280_20_OR_LATER(ah)) if (!AR_SREV_9280_20_OR_LATER(ah))
rfMode |= (IS_CHAN_5GHZ(chan)) ? rfMode |= (IS_CHAN_5GHZ(chan)) ?
......
...@@ -33,15 +33,12 @@ static bool ar9002_hw_is_cal_supported(struct ath_hw *ah, ...@@ -33,15 +33,12 @@ static bool ar9002_hw_is_cal_supported(struct ath_hw *ah,
bool supported = false; bool supported = false;
switch (ah->supp_cals & cal_type) { switch (ah->supp_cals & cal_type) {
case IQ_MISMATCH_CAL: case IQ_MISMATCH_CAL:
/* Run IQ Mismatch for non-CCK only */ supported = true;
if (!IS_CHAN_B(chan))
supported = true;
break; break;
case ADC_GAIN_CAL: case ADC_GAIN_CAL:
case ADC_DC_CAL: case ADC_DC_CAL:
/* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */ /* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */
if (!IS_CHAN_B(chan) && if (!((IS_CHAN_2GHZ(chan) || IS_CHAN_A_FAST_CLOCK(ah, chan)) &&
!((IS_CHAN_2GHZ(chan) || IS_CHAN_A_FAST_CLOCK(ah, chan)) &&
IS_CHAN_HT20(chan))) IS_CHAN_HT20(chan)))
supported = true; supported = true;
break; break;
......
...@@ -808,8 +808,10 @@ static void ar9003_hw_set_rfmode(struct ath_hw *ah, ...@@ -808,8 +808,10 @@ static void ar9003_hw_set_rfmode(struct ath_hw *ah,
if (chan == NULL) if (chan == NULL)
return; return;
rfMode |= (IS_CHAN_B(chan) || IS_CHAN_G(chan)) if (IS_CHAN_2GHZ(chan))
? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM; rfMode |= AR_PHY_MODE_DYNAMIC;
else
rfMode |= AR_PHY_MODE_OFDM;
if (IS_CHAN_A_FAST_CLOCK(ah, chan)) if (IS_CHAN_A_FAST_CLOCK(ah, chan))
rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE); rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE);
......
...@@ -190,10 +190,7 @@ EXPORT_SYMBOL(ath9k_hw_wait); ...@@ -190,10 +190,7 @@ EXPORT_SYMBOL(ath9k_hw_wait);
void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan, void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
int hw_delay) int hw_delay)
{ {
if (IS_CHAN_B(chan)) hw_delay /= 10;
hw_delay = (4 * hw_delay) / 22;
else
hw_delay /= 10;
if (IS_CHAN_HALF_RATE(chan)) if (IS_CHAN_HALF_RATE(chan))
hw_delay *= 2; hw_delay *= 2;
...@@ -1159,9 +1156,7 @@ u32 ath9k_regd_get_ctl(struct ath_regulatory *reg, struct ath9k_channel *chan) ...@@ -1159,9 +1156,7 @@ u32 ath9k_regd_get_ctl(struct ath_regulatory *reg, struct ath9k_channel *chan)
{ {
u32 ctl = ath_regd_get_band_ctl(reg, chan->chan->band); u32 ctl = ath_regd_get_band_ctl(reg, chan->chan->band);
if (IS_CHAN_B(chan)) if (IS_CHAN_G(chan))
ctl |= CTL_11B;
else if (IS_CHAN_G(chan))
ctl |= CTL_11G; ctl |= CTL_11G;
else else
ctl |= CTL_11A; ctl |= CTL_11A;
......
...@@ -455,7 +455,6 @@ struct ath9k_channel { ...@@ -455,7 +455,6 @@ struct ath9k_channel {
((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)) ((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK))
/* These macros check chanmode and not channelFlags */ /* These macros check chanmode and not channelFlags */
#define IS_CHAN_B(_c) ((_c)->chanmode == CHANNEL_B)
#define IS_CHAN_HT20(_c) (((_c)->chanmode == CHANNEL_A_HT20) || \ #define IS_CHAN_HT20(_c) (((_c)->chanmode == CHANNEL_A_HT20) || \
((_c)->chanmode == CHANNEL_G_HT20)) ((_c)->chanmode == CHANNEL_G_HT20))
#define IS_CHAN_HT40(_c) (((_c)->chanmode == CHANNEL_A_HT40PLUS) || \ #define IS_CHAN_HT40(_c) (((_c)->chanmode == CHANNEL_A_HT40PLUS) || \
......
...@@ -374,7 +374,6 @@ EXPORT_SYMBOL(ath9k_hw_releasetxqueue); ...@@ -374,7 +374,6 @@ EXPORT_SYMBOL(ath9k_hw_releasetxqueue);
bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q) bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
{ {
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
struct ath9k_channel *chan = ah->curchan;
struct ath9k_tx_queue_info *qi; struct ath9k_tx_queue_info *qi;
u32 cwMin, chanCwMin, value; u32 cwMin, chanCwMin, value;
...@@ -387,10 +386,7 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q) ...@@ -387,10 +386,7 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
ath_dbg(common, QUEUE, "Reset TX queue: %u\n", q); ath_dbg(common, QUEUE, "Reset TX queue: %u\n", q);
if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) { if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) {
if (chan && IS_CHAN_B(chan)) chanCwMin = INIT_CWMIN;
chanCwMin = INIT_CWMIN_11B;
else
chanCwMin = INIT_CWMIN;
for (cwMin = 1; cwMin < chanCwMin; cwMin = (cwMin << 1) | 1); for (cwMin = 1; cwMin < chanCwMin; cwMin = (cwMin << 1) | 1);
} else } else
......
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